KR20080047891A - Method and apparatus for compensating line defect of flat display - Google Patents

Abstract

A method and an apparatus for compensating a line defect of a flat panel display device are provided to compensate luminance of a black line perfectly by modulating digital video data to be displayed on a black line and a white line by using a determined compensation value. Upper and lower plates are fabricated(S1,S2) and then attached with a sealant or a frit glass(S3). A test image is displayed, and luminance and chrominance of the entire display surface are measured by performing an electrical inspection with a detecting device and/or through eye inspection(S4). If a black line is found(S5), the position and luminance of the black line are analyzed(S6). Position data indicating positions of each pixel of the black line and black line compensation values are stored in a memory(S7,S8). If a black line is not seen on the entire display surface, it is checked whether a white line is seen(S9). If a white line is found, the position and luminance of the white line are analyzed(S10). Position data indicating positions of each pixel of the white line and white line compensation values are stored in the memory(S11,S12).

Description

Line defect compensation method and apparatus of flat panel display device {Method and Apparatus for Compensating Line Defect of Flat Display}

1 is a view showing an example of a black line.

2 shows an example of ringworm;

FIG. 3 is a diagram illustrating a black line compensation method of a flat panel display device according to an exemplary embodiment of the present invention, illustrating sections in which compensation values are differently applied based on luminance patterns of black lines. FIG.

4 to 7 are diagrams showing the number of sections of a gradual compensation area that varies depending on the compensation value given to the central compensation area of the black line.

8 is a graph showing gamma characteristics of data.

FIG. 9 is a diagram illustrating a white line compensation method of a flat panel display device according to an exemplary embodiment of the present invention. FIG. 9 is a view illustrating sections in which compensation values are differently applied based on luminance patterns of white lines.

10 to 13 are diagrams showing the number of sections of a gradual compensation area that varies depending on the compensation value given to the center compensation area of a white line.

14 is a flowchart for explaining step by step a method of manufacturing a flat panel display device according to an embodiment of the present invention;

15 is a diagram illustrating a system for analyzing line defects and determining a compensation value used in the manufacturing method of FIG. 14.

FIG. 16 is a diagram illustrating an example of a dither pattern of an FRC applicable in the present invention. FIG.

17 is a block diagram illustrating a liquid crystal display according to an exemplary embodiment of the present invention.

18 is a block diagram illustrating in detail the compensation circuit of FIG. 17;

<Description of Major Symbols in Drawing>

101: data driving circuit 102: gate driving circuit

103: liquid crystal display panel 104: timing controller

105: compensation circuit 111: FRC control unit

112: EEPROM 113: Register

114: interface circuit

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flat panel display device, and more particularly, to a method and an apparatus for compensating for line defects in a flat panel display device to electrically compensate for black lines and white lines that appear as line defects appearing on a display surface due to a process error.

The flat panel display device includes a liquid crystal display (LCD), a field emission display (FED), a plasma display panel (PDP), and an organic light emitting diode display (OLED). OLED), and most of them are commercially available and commercially available.

Liquid crystal display devices can meet the trend of light and short and short of electronic products and mass production is improving, and are rapidly replacing cathode ray tubes in many applications.

In particular, an active matrix type liquid crystal display device that drives a liquid crystal cell using a thin film transistor (hereinafter referred to as "TFT") has the advantages of excellent image quality and low power consumption, and secures the latest mass production technology. As a result of research and development, it is rapidly developing into larger size and higher resolution.

The manufacturing process of the liquid crystal display device is to produce a TFT array substrate by a semiconductor process including a photolithography process. The photolithography process will include a series of exposure, development, and etching processes. In such a photolithography process, a defect in the form of a line (hereinafter, referred to as a “line defect”) may appear on the finished substrate due to the variation in the exposure amount. This defect is caused by the difference in the exposure amount in the photolithography process, the overlapping area between the gate and the drain of the TFT, the height of the spacer, the parasitic capacitance between the signal wirings, and the parasitic capacitance between the signal wiring and the pixel electrode. This is due to the difference from the normal display surface at. In order to reduce the defective level of the display panel in which such a line defect exists, each manufacturer is currently mitigating the defective part only by the repair process, but discards the panel when the relaxed level does not meet the quality standard.

1 shows an example in which dark line defects appear. In the black line defect, the overlap area between the gate-source, the height of the spacer, the parasitic capacitance between the signal line and the pixel electrode, etc., which are formed in the portion shown by the black line may appear different from the reference plane due to the exposure amount or the lens aberration. Occurs when. When the same gray level data is applied to all the pixels of the display panel, the luminance is lower than that of the normal display surface around the black line. The border of the black line is not clearly visible but wide and faint. This is due to the overlap of the luminance of the black line and the luminance of the reference plane at the boundary of the black line.

2 shows an example in which a bright line defect appears. As shown in FIG. 2, the defect of the white line may be different from the reference plane due to the exposure difference or the lens aberration due to the overlapping area between the gate and source, the height of the spacer, the parasitic capacitance between the signal line and the pixel electrode, and the like. Occurs when. When the same gray level data is applied to all the pixels of such a display panel, the luminance appears brighter than the normal display surface around the white line. The border of the ringworm does not appear as clear as the black line, but wide and faint. This is due to the overlap of the luminance of the white line and the luminance of the reference plane at the boundary of the white line.

Black lines and white lines sometimes appear together in one panel. Such black lines or white lines can be alleviated by the repair process, but stains of the black lines or white lines still remain on the display surface. Therefore, black and white line defects cannot be solved only by a fair solution.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method and apparatus for compensating for line defects in a flat panel display device, which is designed to solve the problems caused by the prior art and to electrically compensate black and white lines appearing on the display surface.

In order to achieve the above object, a line defect compensation method of a flat panel display device according to an embodiment of the present invention comprises the steps of detecting a line defect showing a luminance difference from the reference surface in the display panel; Analyzing the luminance of the central portion within the line defect; Determining the number of sections to be divided in each of the boundary regions on both sides of the central portion where the luminance of the line defect and the luminance of the reference surface overlap with each other according to the luminance difference between the luminance of the central portion and the reference plane; Determining a first compensation value for adjusting digital video data to be displayed in the central portion such that the luminance of the central portion and the luminance of the reference plane are the same; Determining second compensation values for adjusting the digital video data to be displayed in the boundary regions based on the first compensation value in the interval unit; Storing position data indicating the compensation values and the position of the line defect in a memory; And modulating the digital video data to be displayed on the line defect using the compensation values and the position data stored in the memory to display an image on the flat panel display panel.

The determining of the number of sections divided in each of the boundary regions on both sides of the central portion may include: increasing the number of sections of the boundary regions to which the second compensation values are assigned as the first compensation value is higher; And decreasing the number of sections of the boundary regions to which the second compensation values are assigned as the first compensation value is higher.

The second compensation values are determined to be symmetrically different in each of the boundary regions on both sides of the central portion.

The luminance of the line defect is lower than the luminance of the reference plane, and the second compensation values are higher in a section closer to the center part and lower in a section farther from the center part. The first and second compensation values are added to the digital video data to be displayed in the line defect.

The luminance of the line defect is higher than the luminance of the reference plane, the second compensation values are higher in a section closer to the center portion, and lower in a section farther from the center portion. The first and second compensation values are subtracted from the digital video data to be displayed in the line defect.

If the first compensation value is less than 6/8 gray scale of the display panel, the second compensation value provided to the outermost section farthest from the center portion among the sections to which the second compensation values are applied is 1 of the display panel. It is determined by the value corresponding to / 8 gradation.

If the first compensation value is equal to or greater than 7/8 gray scale of the display panel, the second compensation value provided to the outermost section farthest from the center portion among the sections to which the second compensation values are applied is 2 of the display panel. It is decided by / 8 gradation.

If the first compensation value is less than or equal to 3/8 gradation of the display panel, the second compensation is provided to the two sections of the outermost side from the center in each of the boundary regions positioned at the left and right sides of the center portion. The value is determined by the 1/8 gradation of the display panel, and the second compensation values applied to the remaining sections except for the two sections of the outer edge are different from the compensation value of the adjacent section by the 1/8 gradation of the display panel. Are determined by

If the first compensation value is 4/8 gray or 5/8 gray of the display panel, the first compensation value is applied to two sections of the outermost side from the center in each of the boundary regions positioned at the left and right sides of the center portion. The second compensation value to be determined is determined by 1/8 gray scale of the display panel.

If the first compensation value is equal to or greater than 6/8 gray scale of the display panel, a second compensation applied to two sections of the outermost side from the center in each of the boundary regions positioned on the left and right sides of the center; The value is determined by 2/8 gradation of the display panel.

When the first compensation value is equal to or greater than 0.5 gray and less than 1 gray of the display panel, the second compensation values of neighboring sections in each of the boundary regions positioned on the left and right sides of the center portion are 1/1 of the display panel. It is decided by eight gradation difference.

When the first compensation value is 9/8 gray level or 10/8 gray level of the display panel, second compensation values of adjacent sections in each of the boundary regions positioned at the left and right sides of the center portion are included in the display panel. 2/8 gradation difference.

If the first compensation value is greater than or equal to 1 and less than 10/8 of the display panel, the compensation value of two sections close to the center in each of the boundary regions positioned on the left and right sides of the center portion is equal to the It is determined by the 2/8 gradation difference of the display panel.

If the first compensation value is equal to or less than 7/8 gray scale of the display panel, the compensation value of two sections close to the center portion of each of the boundary regions positioned at the left and right sides of the center portion is 1. It is decided by / 8 gradation difference.

When the first compensation value is 10/8 gradation of the display panel, the second compensation value applied to a section closest to the center portion in each of the boundary regions positioned at the left / right side of the center portion is the first compensation value. The difference from the 1 compensation value is determined to be the value of 2/8 gray scale of the display panel.

When the first compensation value is less than or equal to 9/8 gradation of the display panel, the second compensation value applied to a section closest to the center portion in each of the boundary regions positioned on the left / right side of the center portion is The difference from the first compensation value is determined to be a value of 1/8 gray scale of the display panel.

Line defect compensation apparatus of a flat panel display device according to an embodiment of the present invention includes a display panel; A first compensation value for adjusting the luminance of the central portion existing in the predecessor of the display panel, and is provided for each section of the boundary regions existing on both sides of the central portion based on the first compensation value; Memory for storing position data indicating positions of the center portion and each of the boundary regions; Receiving digital video data, the data to be displayed in the center portion of the first defect among the digital video data is adjusted to the first compensation value, and the data to be displayed in each of the boundary areas of the first defect are the second compensation values. Compensation department adjusted with; And a driving unit for displaying the digital video data adjusted by the compensation values on the flat panel display panel, wherein each of the first and second defects is formed in each of the boundary regions of the line defects according to the luminance difference between the center portion and the reference plane. The number of intervals to which 2 compensation values are given varies.

Hereinafter, a preferred embodiment of the present invention will be described with reference to FIGS. 3 to 18 mainly based on a liquid crystal display.

3 to 7 are diagrams for describing a black line compensation method of a flat panel display device according to an exemplary embodiment of the present invention.

Referring to FIG. 3, a black line is an area where luminance is lower than a reference plane when data of the same gradation is applied to the entire display surface. The black line appears vertically long at an arbitrary position on the display surface due to a process error. And progressive compensation areas SG1 and SG2.

Electrical compensation for black lines is obtained as a result of repeatedly observing changes in luminance of the black line and the reference plane while varying the luminance of the black line appearing on the display panel and the compensation value added to the data to be displayed on the black line. As a result of repeating the experiments for a large number of various display panels, the width or luminance of the black line may vary slightly from display panel to display panel, but it appears darkest in the center compensation region C1 of the black line and from the center compensation region C1. It was found that the basic luminance pattern converging to the luminance of the reference plane was substantially the same toward the non-overlapping plane of the reference plane. Also, the lower the luminance of the central compensation area C1, the wider the border of the black line and the central compensation area C1. It has been found that the higher the luminance of, the narrower the border of the black line. Based on the experimental results, a compensation value for electrically compensating the luminance of the central compensation area C1 and the progressive compensation areas SG1 and SG2 of the black line is determined as follows.

The central compensation area C1 corresponds to the central position of the black line in the width direction x of the black line and is the darkest region in the black line. Since the center compensation region C1 does not overlap with the reference plane, it appears darkest and the highest compensation value a1 is applied within the black line. The compensation value a1 of the central compensation area C1 is based on the subjective luminance difference in which the luminance difference between the luminance of the central compensation area C1 and the reference plane is visually sensed by the luminance measuring equipment or the naked eye, and the reference compensation plane a1. The luminance difference is determined to be a value that cannot be felt by the naked eye.

Gradient compensating regions SG1 and SG2 are areas where the center compensating region C1 and the reference plane overlap, and are located on the left side SG1 and the right side SG2 of the central compensating region within the black line. The closer to C1, the luminance is closer to the luminance of the central compensation region C1, and the closer to the non-overlapping surface of the reference surface, the closer to the luminance of the reference surface. That is, the progressive compensation areas SG1 and SG2 appear darker as they approach the central compensation area C1 and become brighter toward the non-overlapping plane of the reference plane. The progressive compensation areas SG1 and SG2 are divided into a plurality of sections. Here, the plurality of sections are defined as a width obtained by dividing the widthwise length x of the progressive compensation areas SG1 and SG2 by the number of pixels and dividing the converted length by a multiple of four. In the progressive compensation areas SG1 and SG2, the compensation values b1 to e1 and b1 ′ to e1 ′ are gradually smaller from a section closer to the center compensation region C1 to a section closer to the non-overlapping surface of the reference plane. It is determined automatically. In other words, the compensation values b1 to e1 and b1 'to e1' applied to the sections of the progressive compensation areas SG1 and SG2 are determined when the compensation value a1 of the central compensation area C1 is determined. It is automatically determined between the value a1 and '0', which satisfies the perfect symmetry. The number of sections of the progressive compensation areas SG1 and SG2 increases as the compensation value a1 of the central compensation area C1 is higher, and decreases as the compensation value a1 of the central compensation area C1 is lower.

4 to 7 illustrate sections of the progressive compensation areas SG1 and SG2 that are divided according to the compensation value a1 of the central compensation area C1 in the black line.

When the compensation value a1 of the central compensation area C1 is determined as 4/8 (= 0.5) in the black line, the left progressive compensation area SG1 and the right progressive compensation area SG2 are automatically determined symmetrically. Each is divided into four sections as shown in FIG.

If the compensation value a1 of the central compensation area C1 is determined to be 3/8 (= 0.375) in the black line, the left progressive compensation area SG1 and the right progressive compensation area SG2 are automatically symmetrically determined. Each is divided into three sections as shown in FIG.

When the compensation value a1 of the central compensation area C1 is determined to be 2/8 (= 0.25) in the black line, the left progressive compensation area SG1 and the right progressive compensation area SG2 are automatically symmetrically determined. Each is divided into two sections as shown in FIG.

When the compensation value a1 of the central compensation area C1 is determined to be 1/8 (= 0.125) in the black line, the left progressive compensation area SG1 and the right progressive compensation area SG2 are automatically symmetrically determined. Each is divided into two sections as shown in FIG.

Tables 1 to 10 below show examples of progressive compensation values automatically determined in respective sections of the left and right progressive compensation areas SG1 and SG2 according to the compensation value a1 of the central compensation area C1 in the black line. Indicates. These compensation values are expressed in gray scales displayed on the display panel.

SG1 (e1) SG1 (d1) SG1 (c1) SG1 (b1) C (a1) SG2 (b1 ') SG2 (c1 ') SG2 (d1 ') SG2 (e1 ') 0 0 0 1/8 1/8 1/8 0 0 0

SG1 (e1) SG1 (d1) SG1 (c1) SG1 (b1) C (a1) SG2 (b1 ') SG2 (c1 ') SG2 (d1 ') SG2 (e1 ') 0 0 1/8 1/8 2/8 1/8 1/8 0 0

SG1 (e1) SG1 (d1) SG1 (c1) SG1 (b1) C (a1) SG2 (b1 ') SG2 (c1 ') SG2 (d1 ') SG2 (e1 ') 0 1/8 1/8 2/8 3/8 2/8 1/8 1/8 0

SG1 (e1) SG1 (d1) SG1 (c1) SG1 (b1) C (a1) SG2 (b1 ') SG2 (c1 ') SG2 (d1 ') SG2 (e1 ') 1/8 1/8 2/8 3/8 4/8 3/8 2/8 1/8 1/8

SG1 (e1) SG1 (d1) SG1 (c1) SG1 (b1) C (a1) SG2 (b1 ') SG2 (c1 ') SG2 (d1 ') SG2 (e1 ') 1/8 2/8 3/8 4/8 5/8 4/8 3/8 2/8 1/8

SG1 (e1) SG1 (d1) SG1 (c1) SG1 (b1) C (a1) SG2 (b1 ') SG2 (c1 ') SG2 (d1 ') SG2 (e1 ') 1/8 3/8 4/8 5/8 6/8 5/8 4/8 3/8 1/8

SG1 (e1) SG1 (d1) SG1 (c1) SG1 (b1) C (a1) SG2 (b1 ') SG2 (c1 ') SG2 (d1 ') SG2 (e1 ') 2/8 4/8 5/8 6/8 7/8 6/8 5/8 4/8 2/8

SG1 (e1) SG1 (d1) SG1 (c1) SG1 (b1) C (a1) SG2 (b1 ') SG2 (c1 ') SG2 (d1 ') SG2 (e1 ') 2/8 4/8 5/8 7/8 8/8 7/8 5/8 4/8 2/8

SG1 (e1) SG1 (d1) SG1 (c1) SG1 (b1) C (a1) SG2 (b1 ') SG2 (c1 ') SG2 (d1 ') SG2 (e1 ') 2/8 4/8 6/8 8/8 9/8 8/8 6/8 4/8 2/8

SG1 (e1) SG1 (d1) SG1 (c1) SG1 (b1) C (a1) SG2 (b1 ') SG2 (c1 ') SG2 (d1 ') SG2 (e1 ') 2/8 4/8 6/8 8/8 10/8 8/8 6/8 4/8 2/8

As can be seen from Tables 1 to 10, the compensation values of the central compensation area C1 and the progressive compensation areas SG1 and SG2 in the black line must satisfy the following conditions.

(1) When the compensation value a1 of the central compensation area C1 is equal to or less than '6/8 gray scale', sections in which the compensation value is determined to be equal to or greater than '0' in each of the left and right gradual compensation areas SG1 and SG2. The compensation value of the outermost section is automatically determined as '1/8 gradation'. In contrast, when the compensation value a1 of the central compensation area C1 is equal to or greater than '7/8 gray scale', sections in which the compensation value is determined to be equal to or greater than '0' in each of the left and right progressive compensation areas SG1 and SG2. The compensation value of the outermost section is automatically determined as '2/8 gray scale'.

(2) When the compensation value a1 of the central compensation area C1 is equal to or less than '3/8 gradation', the lower the compensation value, the less the number of sections of the left and right progressive compensation areas SG1 and SG2, In each of the progressive compensation areas SG1 and SG2, the compensation value of two or less outer sections close to the non-overlapping plane of the reference plane is automatically determined as '1/8 gray scale'. The remaining sections having the compensation value '1/8 gray scale' are automatically determined by the difference between the compensation values of the adjacent sections and the '1/8 gray scale'.

(3) When the compensation value a1 of the central compensation area C1 is '4/8 gray scale', compensation of two outer sections close to the non-overlapping plane of the reference plane in each of the left and right progressive compensation areas SG1 and SG2 The value is automatically determined by '1/8 gradation'.

(4) When the compensation value a1 of the central compensation area C1 is '5/8 gray scale', compensation of two outer sections close to the non-overlapping plane of the reference plane in each of the left and right progressive compensation areas SG1 and SG2 The value is automatically determined by the values of the '1/8 gradation'.

(5) When the compensation value a1 of the central compensation area C1 is equal to or greater than '6/8 gradation', the two outer sections closer to the non-overlapping plane of the reference plane in each of the left and right progressive compensation areas SG1 and SG2 are provided. The compensation value is automatically determined by '2/8 gradation'.

(6) If the compensation value a1 of the central compensation area C1 is greater than or equal to 4/8 gradation and less than or equal to 8/8, compensation of neighboring sections in each of the left and right progressive compensation areas SG1 and SG2 is performed. The value is automatically determined by the difference of '1/8 gradation'. When the compensation value a1 of the central compensation area C1 is' 9/8 gray scale 'and '10 / 8', the compensation value of neighboring sections in each of the left and right progressive compensation areas SG1 and SG2 is' 2 / '. It is automatically determined by 8 gradations.

(7) If the compensation value a1 of the central compensation area C1 is greater than or equal to 8/8 gradation and less than or equal to 10/8, the central compensation area C1 in each of the left and right incremental compensation areas SG1 and SG2 is respectively. The compensation value of the two sections close to) is automatically determined by the difference of '2/8 gray scale'. When the compensation value a1 of the central compensation area C1 is less than or equal to '7/8 gradation', the compensation value of two sections close to the central compensation area C1 in each of the left and right progressive compensation areas SG1 and SG2 is It is automatically determined by the difference of '1/8 gradation'.

(8) When the compensation value a1 of the central compensation area C1 is '10 / 8 gradation ', the compensation value of the section closest to the central compensation area C1 in each of the left and right progressive compensation areas SG1 and SG2. And the compensation value of the central compensation area C1 are automatically determined by the difference of '2/8 gradation'. If the compensation value a1 of the central compensation area C1 is equal to or less than '9/8 gray scale', the compensation value and the center of the section closest to the central compensation area C1 in each of the left and right progressive compensation areas SG1 and SG2 are respectively. The compensation value of the compensation area C1 is automatically determined by the difference of '1/8 gradation'.

The black line compensation method of the flat panel display device according to an embodiment of the present invention determines the compensation values satisfying the basic conditions of the black line compensation, and stores the black line compensation value and position data indicating the position of each pixel of the black line in the memory. . The memory is a nonvolatile memory that stores the black line compensation value and the position data of the black line in the form of a look-up table, for example, EEPROM (Electrically Erasable Programmable Read Only Memory) or EDID ROM (Extended Display Identification Data ROM). . The EDID ROM stores seller / producer identification information (ID) of the display element and variables and characteristics of the basic display element, in addition to the compensation value and position data of the black line. This memory is added to the driving circuit of the flat panel display with an adder for adding the black line compensation value to the data. The compensation value stored in the memory is added to the digital video data to be displayed on the black line, and the data is adjusted upward to compensate for the luminance of the black line defect equal to the luminance of the reference plane. The luminance of the black line may be compensated for in all gray levels only when the black value is optimized for each gray level or for a plurality of gray levels such as low gray level, intermediate gray level, and high gray level based on the gamma characteristics of the data as shown in FIG. 8. On the other hand, if the compensation value is determined to be the same value in each gradation while ignoring the gamma characteristic of the data, the luminance of the black line may be compensated at a specific gradation, but the luminance of the black line is compensated at another gradation so that the black line is still visible or the black line according to the gradation. The luminance of can be reversed. The black line compensation value becomes higher from low to high gradations in consideration of the gamma characteristics of the data as shown in FIG. 8, and increases from full gradation to darker black lines.

The black line compensation values may be determined by a decimal number less than an integer +1, and the compensation value of the decimal value is represented by a frame rate control (hereinafter referred to as "FRC") using a dither pattern.

9 to 13 are diagrams for describing a white line compensation method of a flat panel display device according to an exemplary embodiment of the present invention.

Referring to FIG. 9, a white line is an area where luminance is higher than a reference plane when data of the same gradation is applied to the entire display surface, and appears vertically long at an arbitrary position on the display surface due to a process error. And progressive compensation areas SG3 and SG4.

The electrical compensation for the white line is obtained by repeatedly observing changes in the luminance of the white line and the reference plane while changing the luminance of the white line appearing on the display panel and the compensation value subtracted from the data to be displayed on the white line. As a result of repeating the experiment on a large number of various display panels, the width or brightness of the white line may be slightly different for each display panel, but it appears brightest in the center compensation region C2 of the white line and from the center compensation region C2. It was found that the basic luminance pattern converging to the luminance of the reference plane is substantially the same as the non-overlapping plane of the reference plane. Also, the higher the luminance of the central compensation area C2, the wider the boundary of the white line and the central compensation area C2. It was found that the lower the luminance of N, the narrower the boundary between white lines. Based on the experimental results, a compensation value for electrically compensating the luminance of the central compensation area C2 and the progressive compensation areas SG3 and SG4 of the white line is determined as follows.

The center compensation area C2 corresponds to the central position of the white line in the width direction x of the white line and is the brightest region in the white line. Since the center compensation region C2 does not overlap with the reference plane, it appears brightest and the compensation value a2 is applied highest in the white line. The compensation value a2 of the central compensation area C2 is based on the subjective luminance difference in which the luminance difference between the luminance of the central compensation area C2 and the reference plane is visually sensed by the luminance measuring equipment or the naked eye, and the reference compensation plane a. The luminance difference is determined to be a value that cannot be felt by the naked eye.

The progressive compensation areas SG3 and SG4 are areas where the center compensation area C2 and the reference plane overlap and are located on the left side SG3 and the right side SG4 of the center compensation area within the white line, and are close to the center compensation area C2. The position is seen as the luminance closer to the luminance of the center compensation region C2, and toward the non-overlapping surface of the reference plane, the luminance is closer to the luminance of the reference plane. That is, the progressive compensation areas SG3 and SG4 appear brighter as they approach the center compensation area C2 and become darker toward the non-overlapping planes of the reference plane. The progressive compensation areas SG3 and SG4 are divided into a plurality of sections. Here, the plurality of sections are defined as a width obtained by dividing the widthwise length x of the progressive compensation areas SG3 and SG4 by the number of pixels and dividing the converted length by a multiple of four. In these progressive compensation areas SG3 and SG4, the compensation values b2 to e2 and b2 'to e2' are gradually smaller from the section closer to the center compensation region C2 to the section closer to the non-overlapping surface of the reference plane. It is determined automatically. In other words, the compensation values b2 to e2 and b2 'to e2' applied to the respective sections of the progressive compensation areas SG3 and SG4 are determined when the compensation value a2 of the central compensation area C2 is determined. It is automatically determined between the value a2 and '0', which satisfies the perfect symmetry. The number of sections of the progressive compensation areas SG3 and SG4 increases as the compensation value a2 of the central compensation area C2 increases, and decreases as the compensation value a2 of the central compensation area C2 decreases.

10 to 13 illustrate sections of progressive compensation areas SG3 and SG4 divided according to the compensation value a2 of the central compensation area C2 in the white line.

If the compensation value a2 of the central compensation area C2 is determined to be 4/8 (= 0.5) in the white line, the left progressive compensation area SG3 and the right progressive compensation area SG4 are automatically determined symmetrically. Each is divided into four sections as shown in FIG.

When the compensation value a2 of the central compensation area C2 is determined to be 3/8 (= 0.375) on the white line, the left progressive compensation area SG3 and the right progressive compensation area SG4 are automatically determined symmetrically. Each is divided into three sections as shown in FIG.

If the compensation value a2 of the central compensation area C2 is determined to be 2/8 (= 0.25) on the white line, the left progressive compensation area SG3 and the right progressive compensation area SG4 are automatically determined symmetrically. Each is divided into two sections as shown in FIG.

If the compensation value a2 of the central compensation area C2 is determined to be 1/8 (= 0.125) in the white line, the left progressive compensation area SG3 and the right progressive compensation area SG4 are automatically determined symmetrically. Each is divided into two sections as shown in FIG.

The compensation values of the progressive compensation areas SG3 and SG3 satisfy the above-described conditions (1) to (8) in the same manner as the compensation value of the black line. Therefore, the compensation values of the progressive compensation areas SG3 and SG4 are automatically determined in the same manner as in Tables 1 to 10.

The white line compensation method of the flat panel display according to the exemplary embodiment of the present invention determines compensation values satisfying the basic conditions of the white line compensation, and stores the compensation value and position data indicating the position of each pixel of the white line in the memory. The memory is a nonvolatile memory that stores the compensation value of the white line and the position data of the white line in the form of a look-up table and may include an EEPROM or an EDID ROM. The memory can store not only the compensation value of the white line and the position data of the white line, but also the compensation value of the black line and the position data of the black line. This memory is added to the driving circuit of the flat panel display with a subtractor for subtracting the white line compensation value to the data. The white line compensation value stored in the memory is subtracted from the digital video data to be displayed on the white line and adjusted downward to compensate for the luminance of the white line defect equal to the luminance of the reference plane. The compensation value of the white line should be optimized for each gradation or for a plurality of gradation groups such as low gradation group, intermediate gradation group, and high gradation group based on the gamma characteristics of the data as shown in FIG. 8 so that the luminance of the white line may be compensated for in all gradations. On the other hand, if the compensation value is determined to be the same value in each gradation while ignoring the gamma characteristic of the data, the luminance of the white line may be compensated at a specific gradation, but the luminance of the white line is compensated at another gradation so that the white line is still visible or the white line according to the gradation. The luminance of can be reversed. The compensation value of the white line becomes higher from low to high gradations in consideration of the gamma characteristics of the data as shown in FIG. 8, and also increases from dark to dark gradations.

The compensation values of the white line may be determined by a decimal number less than an integer + 1, and the compensation values of the decimal values are represented by FRC using a dither pattern.

14 is a flowchart for explaining a manufacturing method of a flat panel display device according to an exemplary embodiment of the present invention step by step. FIG. 15 illustrates an analysis and compensation value determination system of black lines and white lines used in the manufacturing method of FIG. 14.

Referring to FIGS. 14 and 15, in the manufacturing method of the flat panel display device according to the exemplary embodiment of the present invention, after manufacturing the upper and lower plates, respectively, the upper and lower plates are bonded with sealant or frit glass. (S1, S2, S3) The upper plate and the lower plate may be manufactured in various forms according to the flat panel display panel 40. For example, in the case of a liquid crystal display panel, a color filter, a black matrix, a common electrode, an upper alignment layer, etc. may be formed on an upper plate, and a data line, a gate line, a TFT, a pixel electrode, a lower alignment layer, a column spacer, etc. may be formed on a lower plate. Can be. In the case of a plasma display panel, an address electrode, a lower dielectric, a partition, a phosphor, and the like may be formed on a lower plate, and an upper dielectric, an MgO passivation layer, and a sustain electrode pair may be formed on an upper plate.

Subsequently, in the inspection process of the flat panel display device, test data of each gray level is applied to the flat panel display panel 40 to display a test image, and the image is electrically inspected using the sensing device 42 as shown in FIG. 15. The brightness and chromaticity of the entire display surface are measured by visual inspection (S4). If black lines are found on the flat panel display in the inspection process (S5), the positions where the black lines appear and the luminance of the black lines are analyzed.

Next, the present invention determines the position data indicating each pixel in the black line, and determines the black line compensation value a1 of the center compensation region C1 for each gray level. When the compensation value of the central compensation area C1 is determined, the black line compensation values b1 to e1 and b1 'to e1' applied to the respective sections of the progressive compensation areas SG1 and SG2 are compensated for the central compensation area C1. It is automatically determined between the value a1 and '0'. The gradual compensation areas SG1 and SG2 should also be optimized for each gray level like the central compensation area C1. The present invention stores the position data indicating the position of each pixel of the black line and the black line compensation values in a memory through a user connector and a ROM writer (S7, S8).

If the black line is not visible in the entire display surface in step S5, it is determined whether the white line is visible on the flat panel display in the inspection process of S4 (S9). Analyze the position and the brightness of the white line (S10).

Next, the present invention determines position data indicating each pixel in the white line, and determines the white line compensation value a2 of the center compensation area C2 for each gray level. When the white line compensation value of the center compensation area C2 is determined, the white line compensation values b2 to e2 and b2 'to e2' applied to the respective sections of the progressive compensation areas SG3 and SG4 are set to the center compensation area C1. It is automatically determined between the compensation value a2 and '0'. The gradual compensation areas SG3 and SG4 should also be optimized for each gray level like the central compensation area C1. The present invention stores position data indicating the position of each pixel of the white line and the white line compensation values in the memory through the user connector and the ROM recorder (S11 and S12).

If the black line and the white line are not visible with each gray level in the inspection process of S4, the flat panel display device is determined as good quality and shipped.

The analysis and compensation value determination system supplies data to the sensing device 42 and the flat panel display panel 40 for sensing the luminance and chromaticity of the flat panel display panel 40 as shown in FIG. 15, and outputs the output signal of the sensing device 42. A computer 44 for analyzing the luminance and chromaticity of the flat panel display panel 40, and a memory 46 in which the optimized compensation value determined by the computer 44 is stored.

The sensing device 42 detects the brightness and chromaticity of the test image displayed on the flat panel display panel 40 including a camera and / or an optical sensor to generate voltage or current, and then converts the voltage or current into digital sensing data. Supply to computer 44.

The computer 44 supplies the test data for each gray level to the driving circuit of the flat panel display panel, and the luminance of the test image with respect to the entire display surface of the flat panel display panel for each gray level according to the digital sensing data input from the sensing device 42. And chromaticity. When the black line or the white line is detected on the flat panel display panel 40 or the position data of the black line or the white line is input by the administrator in a subjective evaluation, the computer 44 automatically changes the compensation value and displays a test to be displayed on the black line or the white line. The data is added or subtracted to supply the test data added or subtracted with the compensation value to the flat panel display panel 40. The computer 44 observes the change in luminance and chromaticity of the black line or the white line, and as a result, if the luminance of the black line or the white line and the luminance of the reference plane are determined to be less than or equal to a preset threshold value, the computer 44 uses the memory ( 46). Here, the threshold value is an experimentally determined value in which the luminance difference between the black line and the reference plane is not seen when viewed visually at the same gray scale.

FIG. 16 illustrates an example of a dither pattern of an FRC that represents a fine compensation value of less than '1' among compensation values for compensating luminance of the black and white lines described above.

Referring to FIG. 16, the FRC has a size of 8 pixels by 8 pixels and the number of pixels to which '1' is added is set differently according to the compensation value to express the compensation value corresponding to the fractional gray scale of less than one. Patterns to 8/7 dither patterns are used.

The 1/8 dither pattern sets 8 pixels to which '1' is added among the 64 pixels to express a compensation value corresponding to 1/8 (= 0.125) gray scale, and the 2/8 dither pattern shows 64 pixels. 16 pixels to which '1' is added are set to express a compensation value corresponding to 2/8 (= 0.250) gray scale, and 3/8 dither pattern is 24 pixels to which '1' is added among 64 pixels. Set these to represent the compensation value corresponding to 3/8 (= 0.375) gradation. The 4/8 dither pattern sets 32 pixels to which '1' is added among 64 pixels to express a compensation value corresponding to 4/8 (= 0.500) gray scale, and the 5/8 dither pattern is 64 pixels 40 pixels to which '1' is added are set to express a compensation value corresponding to 5/8 (= 0.625) gray scale, and the 6/8 dither pattern is 48 pixels to which '1' is added among 64 pixels. Set these to represent the compensation value corresponding to 6/8 (= 0.750) gradation. The 7/8 dither pattern expresses a compensation value corresponding to 7/8 (= 0.875) gray level by setting 56 pixels to which '1' is added among 64 pixels. Each of these dither patterns changes the positions of pixels to which '1' is added every frame period.

7 illustrates a flat panel display device according to an exemplary embodiment of the present invention. This flat panel display device will be described by taking a liquid crystal display device as an example.

Referring to FIG. 7, in the flat panel display of the present invention, the display panel 103 in which the data lines 106 and the gate lines 108 cross each other and TFTs for driving the liquid crystal cells Clc are formed at the intersection thereof. ); A compensation circuit 105 for modulating the digital video data Ri / Gi / Bi to be displayed on the black line by using a previously stored compensation value; A data driving circuit 101 for supplying modulated data Rc / Gc / Bc to the data lines 106; A gate driving circuit 102 for supplying a scan signal to the gate lines 106; And a timing controller 104 for controlling the driving circuits 101 and 102.

Liquid crystal molecules are injected into the liquid crystal display panel 103 between two substrates (a TFT substrate and a color filter substrate). The data lines 106 and the gate lines 108 formed on the TFT substrate are perpendicular to each other. The TFT formed at the intersection of the data lines 106 and the gate lines 108 receives a data voltage supplied via the data line 106 in response to a scan signal from the gate line 108. To the pixel electrode. A black matrix, a color filter, and the like, which are not shown, are formed on the color filter substrate. The common electrode supplied with the common voltage Vcom is formed on a TFT substrate in an IPS (In-plain Switching) mode or a FFS (Fringe Field Switching) mode, and is formed in a twisted nematic (TN) mode, an optically compensated bent (OCB) mode, It is formed on the color filter substrate in a VA (Vertically Alignment) mode or the like. Polarizers having light absorption axes perpendicular to each other are attached to the TFT substrate and the color filter substrate.

The compensation circuit 105 receives input data Ri / Gi / Bi from a system interface and uses a black line compensation value previously stored in digital video data Ri / Gi / Bi to be displayed on each pixel of the black line. The digital video data Rc / Gc / Bc adjusted up and the unmodulated data Ri / Gi / Bi to be displayed on the reference plane are output. In addition, the compensation circuit 105 outputs the digital video data Rc / Gc / Bc which is adjusted downward by subtracting the white line compensation value previously stored in the digital video data Ri / Gi / Bi to be displayed on the pixels of the white line. do.

The timing controller 104 supplies the digital video data Rc / Gc / Bc, Ri / Gi / Bi from the compensating circuit 105 to the data driving circuit 101 in accordance with the dot clock DCLK and vertical / horizontal. Controlling the gate control signal GDC and the data driving circuit 101 for controlling the gate driving circuit 102 by using the synchronization signals Vsync and Hsync, the data enable signal DE, and the dot clock DCLK. To generate a data control signal DDC. The compensation circuit 105 and the timing controller 104 may be integrated into one chip.

The data driving circuit 101 converts the digital video data Rc / Gc / Bc, Ri / Gi / Bi supplied from the timing controller 104 into an analog gamma compensation voltage and converts the analog gamma compensation voltage into a data line as a data voltage. To the field 106.

The gate driving circuit 102 sequentially supplies a scan signal to the gate lines 108 to select a horizontal line to which a data voltage is supplied.

18 shows the compensation circuit 105 in detail.

Referring to FIG. 18, a compensation circuit 105 according to an exemplary embodiment of the present invention includes an FRC controller 111, an EEPROM 112, a register 113, and an interface circuit 114.

The FRC control unit 111 determines the display position of the digital video data Ri, Bi, and Gi according to the vertical and horizontal synchronization signals Vsync and Hsync, the data enable signal DE, and the dot clock DCLK. The position determination result is compared with the position information PD from the EEPROM 112 to detect digital video data Ri / Bi / Gi to be displayed on the black and white lines. The FRC control unit 111 supplies the digital video data Ri, Bi, Gi to be displayed on the black and white lines as the lead address to the EEPROM 112, and compensates the output from the EEPROM 112 in response to the lead address. The values CD are added and subtracted to the digital video data Ri / Bi / Gi to be displayed on the black and white lines. Here, the FRC control unit 111 distributes the compensation value temporally and spatially according to the predetermined dither pattern as shown in FIG. 16 and adds a compensation value of less than 1 gray scale to the digital video data Ri / Bi / Gi in the dither pattern unit. An integer compensation value of one or more gray levels is added to the digital video data in units of pixels.

The EEPROM 112 is a memory that stores black and white line compensation values CD and black and white line position data PD in the form of a lookup table. The position data PD and the compensation value CD stored in the EEPROM 112 may be updated by an electrical signal applied from the external computer 44 through the interface circuit 114.

The interface circuit 114 is configured for communication between the compensation circuit 105 and an external system, and the interface circuit 114 is designed in accordance with a communication standard protocol standard such as I ² C. The position data and the compensation value (CD) stored in the EEPROM 112 are required to be updated for reasons such as process change and difference between the applied models, and the user needs to update the user position data (UPD) and the user compensation value (UCD). Is entered via an external system. The computer 44 may read or modify data stored in the EEPROM 112 through the interface circuit 114 when such a request is made.

The register 113 temporarily stores user data UPD and CD transmitted through the interface circuit 114 to update the position data PD and the compensation data CD stored in the EEPROM 112.

Such a liquid crystal display device can be applied to other flat panel display devices without significant change. For example, the liquid crystal display panel 103 may be replaced by a field emission display device, a plasma display panel, an organic light emitting diode display device, or the like.

As described above, the line defect compensation method and apparatus of the flat panel display according to the present invention provide symmetrical compensation value patterns based on the symmetrical luminance pattern of the line defect when the line defect appears alone, and The number of sections and the compensation value of the progressive compensation region can be automatically determined according to the luminance and size. The line defect compensation method and apparatus of the flat panel display apparatus according to the present invention can completely compensate for the luminance of a black line, which is difficult to compensate for luminance only by a process by modulating the digital video data to be displayed on the black line and the white line using the compensation value. .

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (25)

Detecting a line defect showing a difference in luminance from a reference plane in the display panel; Analyzing the luminance of the central portion within the line defect; Determining the number of sections to be divided in each of the boundary regions on both sides of the central portion where the luminance of the line defect and the luminance of the reference surface overlap with each other according to the luminance difference between the luminance of the central portion and the reference plane; Determining a first compensation value for adjusting digital video data to be displayed in the central portion such that the luminance of the central portion and the luminance of the reference plane are the same; Determining second compensation values for adjusting the digital video data to be displayed in the boundary regions based on the first compensation value in the interval unit; Storing position data indicating the compensation values and the position of the line defect in a memory; And And modulating the digital video data to be displayed on the line defect using the compensation values and the position data stored in the memory to display an image on the flat panel display panel. . The method of claim 1, Determining the number of sections divided in each of the boundary regions on both sides of the central portion, Increasing the number of sections of the boundary regions to which the second compensation values are assigned as the first compensation value is higher; And And decreasing the number of sections of the boundary regions to which the second compensation values are applied as the first compensation value is higher. The method of claim 2, And the second compensation values are values that are symmetrically varied in each of the boundary regions on both sides of the center portion. The method of claim 1, The luminance of the line defect is lower than the luminance of the reference plane, The second compensation values are higher in a section closer to the center part, and lower in a section farther from the center part, And the first and second compensation values are added to the digital video data to be displayed on the line defects. The method of claim 1, The luminance of the line defect is higher than the luminance of the reference plane, The second compensation values are higher in a section closer to the center part, and lower in a section farther from the center part, And the first and second compensation values are subtracted from the digital video data to be displayed on the line defect. The method of claim 1, If the first compensation value is less than 6/8 gray scale of the display panel, the second compensation value provided to the outermost section farthest from the center portion among the sections to which the second compensation values are applied is 1 of the display panel. / 8 is determined by a value corresponding to the gray scale line compensation method of a flat panel display device. The method of claim 1, If the first compensation value is equal to or greater than 7/8 gray scale of the display panel, the second compensation value provided to the outermost section farthest from the center portion among the sections to which the second compensation values are applied is 2 of the display panel. / 8 gradation compensation method for a flat panel display device characterized in that the gray scale. The method of claim 1, If the first compensation value is less than or equal to 3/8 gradation of the display panel, the second compensation is provided to the two sections of the outermost side from the center in each of the boundary regions positioned at the left and right sides of the center portion. The value is determined by 1/8 gradation of the display panel. The second compensation values applied to the remaining sections except for the second sections of the outer portion are determined as values that are 1/8 gray level of the display panel, which are different from the compensation values of the adjacent sections. Defect Compensation Method. The method of claim 1, If the first compensation value is 4/8 gray or 5/8 gray of the display panel, the first compensation value is applied to two sections of the outermost side from the center in each of the boundary regions positioned at the left and right sides of the center portion. The second compensation value is determined by the 1/8 gray scale of the display panel. The method of claim 1, If the first compensation value is equal to or greater than 6/8 gray scale of the display panel, a second compensation applied to two sections of the outermost side from the center in each of the boundary regions positioned on the left and right sides of the center; The value is determined by the 2/8 gray scale of the display panel. The method of claim 1, When the first compensation value is equal to or greater than 0.5 gray and less than 1 gray of the display panel, the second compensation values of neighboring sections in each of the boundary regions positioned on the left and right sides of the center portion are 1/1 of the display panel. 8. A method for compensating for line defects in a flat panel display device, characterized in that it is determined by eight tone differences. The method of claim 1, When the first compensation value is 9/8 gray level or 10/8 gray level of the display panel, second compensation values of adjacent sections in each of the boundary regions positioned at the left and right sides of the center portion are included in the display panel. A method for compensating for line defects in a flat panel display device, characterized in that determined by 2/8 gradation difference. The method of claim 1, If the first compensation value is greater than or equal to 1 and less than 10/8 of the display panel, the compensation value of two sections close to the center in each of the boundary regions positioned on the left and right sides of the center portion is equal to the A method for compensating for line defects in a flat panel display device, characterized in that determined by a 2/8 gray level difference of a display panel. The method of claim 1, If the first compensation value is equal to or less than 7/8 gray scale of the display panel, the compensation value of two sections close to the center portion of each of the boundary regions positioned at the left and right sides of the center portion is 1. / 8 line defect compensation method of the flat panel display characterized in that it is determined by the gradation difference. The method of claim 1, When the first compensation value is 10/8 gradation of the display panel, the second compensation value applied to a section closest to the center portion in each of the boundary regions positioned at the left / right side of the center portion is the first compensation value. 1. The method of compensating for line defects of a flat panel display device, characterized in that a difference from the compensation value is determined to be a value of 2/8 gradations of the display panel. The method of claim 1, When the first compensation value is less than or equal to 9/8 gradation of the display panel, the second compensation value applied to a section closest to the center portion in each of the boundary regions positioned on the left / right side of the center portion is And a difference between the first compensation value and the first compensation value is determined to be 1/8 gradation of the display panel. Display panel; A first compensation value for adjusting the luminance of the central portion existing in the predecessor of the display panel, and is provided for each section of the boundary regions existing on both sides of the central portion based on the first compensation value; Memory for storing position data indicating positions of the center portion and each of the boundary regions; The digital video data is input to adjust the data to be displayed at the center of the predecessor among the digital video data to the first compensation value, and the data to be displayed at each of the boundary areas of the predecessor to the second compensation values. Compensation unit to adjust; And A driving unit displaying digital video data adjusted by the compensation values on the flat panel display panel, And the number of sections to which the second compensation values are applied in each of the boundary regions of the line defect is varied according to the luminance difference between the center portion and the reference plane. The method of claim 17, The display panel, A line defect compensation device for a flat panel display device comprising any one of a liquid crystal display device, a field emission display device, a plasma display panel, and an organic light emitting diode display device. The method of claim 17, The compensation unit, Using the frame rate control method to distribute the compensation values temporally and spatially, And the distributed compensation values are added to or subtracted from the digital video data. The method of claim 17, The driving unit, A data driver for converting digital video data from the compensator into analog data and supplying the digital video data to data lines of the display panel; A scan driver supplying scan pulses to scan lines crossing the data lines of the display panel; And And a timing controller for supplying the digital video data adjusted by the compensator to the data driver and controlling the timing of operation of the data driver and the scan driver. The method of claim 17, And the memory includes at least one of an electrically erasable programmable read only memory (EEPROM) or an extended display identification data ROM (EDID ROM). The method of claim 17, As the first compensation value is higher, the number of sections of the boundary regions to which the second compensation values are applied increases. The higher the first compensation value is, the lower the number of sections of the boundary regions to which the second compensation values are applied. The method of claim 22, And the second compensation values are symmetrically different values in each of the boundary regions on both sides of the center portion. The method of claim 17, And the compensator adds the first and second compensation values to the digital video data to be displayed on the line defect. The method of claim 17, And the compensation unit subtracts the first and second compensation values to digital video data to be displayed on the line defect.

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