KR20080046891A - Manufacturing method of liquid crystlal display device - Google Patents

Abstract

A manufacturing method of an LCD(Liquid Crystal Display) is provided to improve the structure of a guard ring, thereby exposing an insulation layer, thereby reducing the static electricity easily. A guard ring(170) is formed on a mother substrate and a display device including a gate line is formed on a display area within the guard ring. The mother substrate is cut along a cutting line within the inside of the guard ring so that a unit display substrate including the display device is formed. The guard ring includes any one between a dummy TFT(Thin Film Transistor) or a dummy diode in order to scatter the static electricity. A gate driving member for driving the gate line is formed between the cutting line and the display area. An inspection pad is formed between the guard ring and the cutting line and transmits an inspection signal to the gate driving member.

Description

Manufacturing method of liquid crystal display device {MANUFACTURING METHOD OF LIQUID CRYSTLAL DISPLAY DEVICE}

1 and 2 are a layout view of a liquid crystal display according to the present invention,

3 to 7 are views for explaining a method of manufacturing a liquid crystal display device according to a first embodiment of the present invention;

8 and 9 are views for explaining a method of manufacturing a liquid crystal display device according to a second embodiment of the present invention.

Explanation of Signs of Major Parts of Drawings

121: gate line 123: shift register

124: gate connection wiring 125: pad portion

126: test pad 127: test connector

141: data line 142: shorting bar

150 pixel thin film transistor 161 pixel electrode

170: guard ring 1710: guard ring body

1720: dummy thin film transistor 1730: dummy diode

The present invention relates to a method for manufacturing a liquid crystal display device, and more particularly, to a method for manufacturing a liquid crystal display device in which a guard ring is reduced to reduce defects caused by static electricity.

The liquid crystal display device includes a liquid crystal display panel, and the liquid crystal display panel includes a first substrate on which a thin film transistor is formed, a second substrate facing the first substrate, and a liquid crystal layer positioned between both substrates. The liquid crystal display panel is a non-light emitting device and can receive light from the backlight unit located behind the first substrate.

On the first substrate, a gate line, a data line, and a thin film transistor connected to these lines are formed. Each pixel is connected to a thin film transistor and is independently controlled for each pixel.

A gate driver and a data driver are required to control the thin film transistor by driving the gate line and the data line. In order to reduce the driving cost, a method of directly forming the gate driving part on the first substrate is used.

The gate driver formed on the first substrate is called a shift register, and a gate on signal, a gate off signal, a start signal, and the like are applied to the shift register.

In the manufacture of such substrates, there is a problem that wiring, shift registers, etc. are damaged when static electricity is generated.

Accordingly, an object of the present invention is to provide a method of manufacturing a liquid crystal display device in which defects caused by static electricity are reduced.

The above object is achieved by forming a display element including a guard ring on a mother substrate and a gate line in a display area within the guard ring; Cutting the mother substrate along a cutting line inside the guard ring to form a unit display substrate including the display element, wherein the guard ring includes a dummy thin film transistor and a dummy diode for dissipating static electricity. Including at least one of them is achieved by a method of manufacturing a liquid crystal display device.

Forming a gate driver for driving the gate line between the cutting line and the display area; The method may further include forming an inspection pad for transmitting an inspection signal to the gate driver between the guard ring and the cutting line.

The guard ring includes a gate metal layer, a semiconductor layer, an ohmic contact layer, a data metal layer, and a transparent electrode layer, and the data metal layer and the ohmic contact layer preferably overlap each other.

The method may further include forming a dummy transparent electrode layer between the guard ring and the test pad.

The guard ring is preferably made of a gate metal layer, a semiconductor layer, an ohmic contact layer, a data metal layer and an insulating film.

Preferably, the guard ring is exposed to the outside of the insulating film.

Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings.

A method of manufacturing a liquid crystal display device and a liquid crystal display device manufactured according to the present invention will be described with reference to FIGS. 1 to 4. FIG. 1 illustrates only the thin film transistor substrate 100 except for the flexible member 200 and the circuit board 300 in FIG. 2.

3 and 4 illustrate the state of the mother substrate 101 during the manufacturing process. When cutting along the cutting lines shown in FIGS. 3 and 4, the thin film transistor substrate 100 shown in FIG. Dogs are manufactured. In the mother substrate 101, each insulating substrate 111 is surrounded by a guard ring 170 to prevent static electricity.

As shown in FIG. 2, the liquid crystal display device manufactured according to the present invention is connected to the thin film transistor substrate 100, the flexible member 200 attached to the thin film transistor substrate 100, and the flexible member 200. The circuit board 300 is included. Although not shown, the liquid crystal display may further include a liquid crystal layer positioned between the opposing substrate facing the thin film transistor substrate 100 and both substrates.

First, the thin film transistor substrate 100 will be described.

The thin film transistor substrate 100 is divided into a display area and a non-display area surrounding the display area.

The configuration of the display area is as follows.

As shown in FIGS. 1 and 4, gate lines 121 and data lines 141 that are insulated from each other are formed in the display area. The pixel thin film transistor 150 is formed at the intersection of the gate line 121 and the data line 141. The pixel thin film transistor 150 is electrically connected to the gate line 121 and the data line 141.

The pixel electrode 161 made of a transparent conductive material is electrically connected to the pixel thin film transistor 150.

The non-display area is as follows.

The pad part 125 is provided in the non-display area above the display area as shown in FIG. 1. The pad part 125 is connected to the flexible member 200 shown in FIG. 2.

The pad part 125 receives a data driving signal from the flexible member 200 and transmits the data driving signal to the data line 141, and receives the gate driving signal and transmits the data driving signal to the gate driver 123. The gate connection line 124 connects the pad part 125 and the gate driver 123.

The data driving chip 210 is mounted on the flexible member 200.

The gate driver 123 is provided in the non-display area on the left side of the display area. The gate driver 123 is also called a shift register.

As shown in FIGS. 2 and 4, the gate driver 123 receives a gate driving signal through the pad part 125 and the gate connection line 124. The driving signals received include the first clock signal CKV which is a gate-on voltage, the second clock signal CKVB having a phase opposite to that of the first clock signal, the scan start signal STVP, and the gate-off voltage Voff. And the like.

The pad unit 125 includes a data pad 125a for receiving a data signal and signal pads 125b to 125e for receiving a gate signal. The signal pads 125b to 125e for receiving the gate signal receive the gate off voltage Voff, the first clock signal CKV, the second clock signal CKVB, and the scan start signal STVP, respectively.

The gate connection line 124 includes a plurality of sub connection lines 124b to 124e connected to the respective signal pads 125b to 125e.

The first gate driver 123 starts outputting the gate on voltage in synchronization with the scan start signal and the clock signal, and the second gate driver 123 starts the gate on voltage in synchronization with the output voltage and the clock signal of the front gate driver 123. Start output. The end of the gate-on voltage output of each gate driver 123 is closely related to the start point of output of the rear gate driver 123.

Although not shown, a plurality of thin film transistors are formed in the gate driver 123.

The thin film transistor substrate 100 described above is manufactured by cutting the mother substrate 101 along a cutting line after being manufactured in the state of the mother substrate 101 as shown in FIG. 3. As shown in FIG. 4, the mother board 101 is provided with a guard ring 170 and an inspection pad 126 and a shorting bar 142 for testing an array. The guard ring 170, the inspection pad 126, and a shorting bar ( 142 is removed and is not included in the thin film transistor substrate 100.

A pattern of the guard ring 125, the test pad 126, and the like provided on the mother substrate and an array test using the same will be described with reference to FIG. 4.

4, five test pads 126 are provided outside the cutting line. The test pad 126 includes gate test pads 126b to 126e to which a gate signal is applied, and a data test pad 126a to which a data voltage is applied.

The gate test pads 126b to 126e are connected to the gate signal pads 125b to 125e through the test connection line 127. The data test pad 126a is connected to the shorting bar 142, and the shorting bar 142 is connected to the data pad 125a through the test connection line 143.

In another embodiment, two data test pads 126a may be provided, and the data lines 141 may be connected to each data test pad 126a by 1/2.

Referring to the array test using the test pad 126 described above is as follows.

In the array test, the probe pin is contacted with each test pad 126 to apply a gate signal and a data signal. The applied gate signal is transmitted to the gate driver 123 through the gate signal pads 125b to 125e, and thus the gate line 121 is driven. In addition, the data signal is applied to the data line 141 via the shorting bar 142 and the data pad 125a.

The defect is found by observing a resistance image of the pixel electrode 161 while a signal is applied to the gate line 121 and the data line 141.

When the array test is complete, remove the contacts from the probe pins. Thereafter, the cutting line 126 is cut along the cutting line to remove the test pad 126, the test connecting line 127, and the shorting bar 143 from the thin film transistor substrate 100. The pad part 125 is then connected to the flexible member 200. In addition, the guard ring 170 positioned outside the test pad 126 is also removed from the thin film transistor substrate 100.

If static electricity is generated in the manufacturing process and array test process of the thin film transistor substrate 100 described above, a defect occurs in the thin film transistor substrate 100. Although the guard ring 170 absorbs static electricity to some extent, defects due to static electricity still occur. In particular, during the array test, static electricity is introduced through the test pad 126e for applying the scan start signal STVP when the probe contacts the probe, thereby causing a lot of defects.

In the first embodiment, the structure of the guard ring 170 is changed to effectively dissipate and dissipate static electricity in the guard ring 170.

The guard ring 170 will be described with reference to FIGS. 5 to 7. 6 is a cross-sectional view taken along the line VI-VI of FIG. 5, and FIG. 7 is a cross-sectional view taken along the line VIII-V of FIG. 5.

In the following description, the gate metal layer is the same layer as the gate line 121, the data metal layer is the same layer as the data line 141, and the transparent electrode layer is the same layer as the pixel electrode 161.

The guard ring 170 includes a guard ring body 1710, a dummy thin film transistor 1720, and a dummy diode 1730.

The guard ring body 1710 extends long without any pattern, and as shown in FIG. 6, the gate metal layer 1711, the semiconductor layer 1712, the ohmic contact layer 1713, the data metal layer 1714, the insulating layer 1715, and the transparent layer An electrode layer 1716. In another embodiment, a gate insulating layer may be positioned between the gate metal layer 1711 and the semiconductor layer 1712.

In the guard ring body 170, the semiconductor layer 1712, the ohmic contact layer 1713, and the data metal layer 1714 overlap each other. This is because the semiconductor layer 1712, the ohmic contact layer 1713, and the data metal layer 1714 are patterned using a single mask (photosensitive film) in the manufacturing process. According to the first embodiment, the thin film transistor substrate 100 may be formed using four masks.

The dummy thin film transistor 1720 lowers the voltage of the applied static electricity.

5 and 7, the dummy thin film transistor 1720 includes a plurality of unit thin film transistors, and the unit thin film transistors share the gate electrode bar 1721 as the gate electrode. That is, the gate electrode bar 1721 serves as a gate electrode for the entire plurality of unit thin film transistors. The gate electrode bar 1721 may be in a floating state. The gate electrode bar 1721 is the same layer as the gate metal layer 1711.

The dummy thin film transistor 1720 includes a source electrode 1725 integral with the data metal layer 1714 of the guard ring body 1710, and a drain electrode 1726 formed like an island and having the same layer as the source electrode 1725. do. Components not described are the gate insulating film 1722, the semiconductor layer 1723, and the ohmic contact layer 1724.

In the dummy thin film transistor 1720, the ohmic contact layer 1724 overlaps the source electrode 1725 and the drain electrode 1726.

When static electricity is applied to the guard ring 170, the dummy thin film transistor 1720 is damaged. As heat is generated during the damage process, the power of static electricity is consumed by Joule's heat and the voltage drops.

The dummy diode 1730 includes a thin film transistor (C), and distributes the applied static electricity to the electrostatic dispersion bar (1733). The electrostatic dispersion bar 1733 is the same layer as the gate metal layer 1711.

The thin film transistor C is the same layer as the source electrode 1731 and the source electrode 1731 integrated with the gate electrode 1732, the data metal layer 1714 of the guard ring body 1710, and a drain electrode formed like an island. (1736). The bridge parts 1734 and 1735 are made of a transparent conductive material and electrically connect different metal layers.

Static electricity introduced into the dummy diode 1730 and introduced into the source electrode 1731 is applied to the gate electrode 1732 through the bridge portion 1734, thereby turning on the thin film transistor C. As the thin film transistor C is turned on, the static electricity flowing into the drain electrode 1736 is dispersed through the bridge 1735 to the static dispersion bar 1735.

In another embodiment, the dummy thin film transistor 1720 and the dummy diode 1730 may be formed at both sides of the guard ring body 1710.

8 and 9, a method of manufacturing the liquid crystal display device according to the second embodiment will be described.

Referring to FIG. 8, a dummy transparent electrode layer 162 is formed between the test pad 126e and the guard ring 170. According to the second embodiment, the thin film transistor substrate 100 may be formed using three masks. In the second embodiment, the transparent electrode layer and the insulating layer (formed on the data metal layer) are formed in different regions in the thin film transistor substrate 100. That is, the transparent electrode layer and the insulating layer do not overlap each other.

9, the guard ring 170 includes a gate metal layer 1701, a semiconductor layer 1702, a data metal layer 1703, and an insulating layer 1704, and the insulating layer 1704 is exposed to the outside. That is, the insulating layer 1704 is formed in the guard ring 170 instead of the transparent electrode layer.

When the guard ring 170 is formed to expose the insulating layer 1704 as in the second embodiment, static electricity may be easily reduced as compared with the case in which the transparent electrode layer is exposed.

Meanwhile, the dummy thin film transistor and the dummy diode may be formed in the guard ring 170 according to the second embodiment as in the first embodiment. In this case, the static electricity introduced into the guard ring 170 is dispersed and eliminated in the dummy thin film transistor and the dummy diode having low resistance rather than jumping to the dummy transparent electrode layer 162.

When the static electricity jumps to the dummy transparent electrode layer 162, it is likely to lead to the test pad 126e, which causes a defect. According to the present invention, this problem is reduced.

Although embodiments of the present invention have been shown and described, it will be apparent to those skilled in the art that the present embodiments may be modified without departing from the spirit or principles of the present invention. It is intended that the scope of the invention be defined by the claims appended hereto and their equivalents.

As described above, according to the present invention, there is provided a method of manufacturing a liquid crystal display device in which defects caused by static electricity are reduced.

Claims (6)

In the manufacturing method of the liquid crystal display device, Forming a display element including a guard ring on a mother substrate and a gate line in a display area in the guard ring; Cutting the mother substrate along a cutting line inside the guard ring to form a unit display substrate including the display element. The guard ring may include at least one of a dummy thin film transistor and a dummy diode for dissipating static electricity. The method of claim 1, Forming a gate driver for driving the gate line between the cutting line and the display area; And forming a test pad for transmitting a test signal to the gate driver between the guard ring and the cutting line. The method of claim 1, The guard ring, A gate metal layer, a semiconductor layer, an ohmic contact layer, a data metal layer, and a transparent electrode layer, And the data metal layer and the ohmic contact layer overlap each other. The method of claim 2, And forming a dummy transparent electrode layer between the guard ring and the test pad. The method of claim 4, wherein And the guard ring comprises a gate metal layer, a semiconductor layer, an ohmic contact layer, a data metal layer, and an insulating film. The method of claim 5, The guard ring is a manufacturing method of the liquid crystal display device, characterized in that the insulating film is exposed to the outside.

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