KR20080004704A - Single stage power factor correction circuit by boundary conduction mode - Google Patents

Abstract

A single state power factor correction circuit by a boundary conduction mode is provided to improve a power factor and secure a predetermined output by a function of a DC-DC converter in spite of remarkably decreasing the number of components. A single state power factor correction circuit by a boundary conduction mode includes a power source unit(101), a flyback circuit, a BCM(Boundary Conduction Mode) control unit(103), and an output voltage detecting unit(104). The power source unit is connected to an alternating current power(VIN), a filter portion(F), and a bridge diode(BD). The flyback circuit includes a high-frequency transformer(T), an NMOS(Q) formed of an N channel-type MOSFET which is a switching element, and a circulation diode(FRD) for minimizing a forward direction conduction loss. The BCM control unit is used to improve a power factor and control an operation of a DC-DC converter(102). The output voltage detecting unit detects an output voltage of the DC-DC converter. The BCM control unit includes a multiplier(107), a current sensor comparer(106), a PWM(Pulse Width Modulation) latch(108), an output buffer(110), a zero-current sensing unit(105), and an output voltage comparer(109).

Description

    Single Stage Power Factor Correction Circuit by Boundary Conduction Mode}

1 is a block diagram of a conventional two-stage power factor correction circuit;

2 is a general configuration diagram of a power factor improvement circuit in a one-stage manner operating in the BCM mode according to the present invention.

3 is a mode of operation of a DC-DC converter according to the present invention.

4 shows input voltage, switch current, and input current waveforms.

5 shows measurement waveforms of switch current and gate signal, diode current and V _zero signal.

6 shows measurement waveforms of switch current and gate signal, diode current and V _zero signal.

7 is regulation characteristics according to output voltage and load variation

* Description of the main parts of the drawings

101: power supply

102: DC-DC converter

103: BCM control unit

104: output voltage detector

BD: Bridge Diode

F: Filter part

FRD: Freewheeling Diode

L1: Primary winding

L2: secondary winding

L3: tertiary winding

Q: NMOS

R1, R2: resistance

T: high frequency transformer

V _AC : Input signal detection terminal

V _IN : AC power

V _zero : Zero current detection terminal

    The present invention relates to a single power stage power factor improvement circuit operating in a BCM mode, and more particularly, to a single power stage power factor improvement circuit operating in a BCM mode for power factor improvement that can be applied to a power supply system in general.

In general, most of the off-line switching power supplies used as power supplies for electronic devices use a rectifier circuit of a capacitor input type, so that the rectifier conducts only for a short period near the peak value of the commercial power supply so that a narrow pulsed current waveform is generated. Cause it to occur. Since these pulsed currents are simultaneously generated at the input of each electronic device, they are added in in-phase to a common connected distribution line. Therefore, the electrical impedance of the distribution line causes a voltage drop and a distortion in the terminal voltage. The International Electrotechnical Commission (IEC) sets out the restrictions on the pulsed currents mentioned above for small electronic devices up to 600W. These pulsed currents also affect the input power factor of electronic devices due to the largely distorted waveforms, causing a power factor drop. Therefore, a power factor correction circuit (PFC) using a DC-DC converter has recently been solved. Has been developed and is widely used as a switching power supply. 1 shows a switching power supply using the power factor improving circuit. As can be seen, the power supply unit 1 by the full-wave rectification circuit BD grounded to the AC power source Vin, the PFC unit (2) for improving the power factor, and the PFC unit (2) ), A PFC control section 3 for controlling), a DC-DC converter 4, and a DC-DC controller 5 for controlling the DC-DC converter 4 are constituted. In more detail, the PFC unit 2 includes a coil L, an NMOS Q1 made of an N-channel switching element MOSFET, a diode D1, and a capacitor C2. 2) NMOS (Q1) is turned on and off by a control signal generated by the PFC control circuit 10 of the PFC control unit 3, when switching current flows to the coil (L) when the NMOS (Q1) is turned on energy Is accumulated and its energy is charged to the capacitor C2 at a high voltage E0 via the diode D1 in the period where the NMOS Q1 is turned off. In addition, when the NMOS Q2 is turned on and off by a control signal applied by the DC-DC control circuit 7 to the gate of the NMOS Q2, and the NMOS Q2 is turned on, the high frequency transformer T1 from the capacitor C2 is turned on. The switching current flows through the primary winding T1 of the diode, and the input voltage is induced, and the voltage of opposite polarity to the primary winding T1 is induced in the secondary winding T2 by the direction of the black spot which is the starting point of the coil winding. (D2) is reverse biased and shut off. Therefore, energy is accumulated only in the magnetization inductance of the primary winding T1, and when the next NMOS Q2 is turned off, the voltage of opposite polarity to the previous state is induced in the secondary winding T2 of the high frequency transformer T. By conducting D2), energy stored in the magnetization inductance of the high frequency transformer T is discharged to the output, and the energy is charged in the capacitor C2 through the diode D2. In addition, the capacitor C2 is configured such that the DC voltage V ₀ for supplying the load 11 is charged.

The output voltage detection circuit 6 for feeding back the output detects the DC voltage V ₀ level and applies a voltage signal indicating the level of the DC voltage V ₀ to the DC-DC control circuit 7. The DC-DC control circuit 7 generates a control signal for setting the timing for turning on and off the NMOS Q2 according to the voltage signal applied from the output voltage detection circuit 6, and by this control signal the NMOS Q2 is turned on or off. The load state detection circuit 8 outputs a detection result indicating whether the load state of the load 11 is light load or non-light load by the duty ratio of the control signal.

Therefore, when the detection result indicates the parent load, the PFC on / off switching circuit 9 generates a control signal from the PFC control circuit 10 to a high level to continue the switching operation, and the energy obtained as a result of the condenser C2 ) Is charged.

On the contrary, when the detection result indicates light load, the PFC on / off switching circuit 9 fixes the control signal from the PFC control circuit 10 to a low level to stop the switching operation. Accordingly, since the switching current is lost, the charging to the capacitor C2 is stopped. Thus, the operation of the PFC unit 2 is stopped and the power consumption decreases accordingly. In this state, only the DC-DC converter 4 operates. It is the way it is done.

As described above, in the conventional switching power supply, when the load 11 is light, a two-stage power supply device that applies the power factor improving unit 2 that stops the operation of the power factor improving circuit to the input terminal has been developed and generalized, so that the variation rate characteristic is improved. While showing excellent and stable operation, the two-stage configuration has a problem in that the cost is large and many parts must be used so that it cannot be miniaturized.

The object of the present invention is to solve the above problems,

By designing a flyback converter using a high frequency transformer that can adjust the magnitude of the output voltage by the 1st and 2nd turns ratio, the 1-stage boundary current that can achieve the improvement of the input power factor and the generation of the specific output voltage at the same time It is to provide a single power stage power factor improvement circuit operating in a boundary mode (BCM).

     In order to achieve the above object, the present invention provides a filter unit for removing high frequency noise from an AC power source, a power supply unit by a full-wave rectifier circuit of bridge diodes grounded to the AC power source, and electrical insulation between the input side and the output side. In addition, a high frequency transformer with adjustable output voltage by the primary and secondary winding ratios, an NMOS type NMOS MOSFET for switching current to flow in the primary winding of the high frequency transformer, and a minimum forward conduction loss are minimized. And a flyback circuit composed of a reflux diode, a BCM controller for controlling the power factor improvement and the operation of the DC-DC converter, and an output voltage detector for detecting the output voltage of the DC-DC converter. In the BCM control unit, the feedback before adjusting the output voltage by the shunt regulator of the output voltage detection unit Voltage input terminal, signal input terminal for adjusting distortion of input current, Zero Current Turn Off Switching (ZCS) operation of the reflux diode current, and to keep switching state of NMOS as a switching element to allow switching current to flow. Zero voltage detection terminal for sensing the voltage of the tertiary winding of the high frequency transformer. A current detection terminal that detects the state of input and output currents to control the current flowing through the switching element NMOS, that is, the peak current of the primary winding of the high frequency transformer, and outputs a control signal to determine the on / off states of the NMOS. A control signal output terminal is provided to operate the flyback circuit in the boundary current mode (BCM) in the BCM control unit so that the input and output currents are discontinuous current mode (DCM) for all input and load conditions. mode), so that the input current can follow the shape of the line voltage as it is, and the power factor can be improved under a wide range of input voltages and load conditions. We propose a single power stage power factor improvement circuit that operates in BCM mode to obtain an output voltage.

Accordingly, the present invention shows a very simple structure compared to the conventional two-stage circuit, which can greatly reduce the number of parts, thereby reducing the cost of parts and reducing the manufacturing cost, and contributing to the miniaturization of the circuit. This is very useful in applications such as very complex PDPs.

The present invention will be described with reference to the accompanying drawings.

2 is a general configuration diagram of a single power stage power factor improvement circuit operating in the BCM mode according to the present invention.

)으로 콘덴서(C1)에 충전되도록 된 것이며, DC-DC컨버터(102)는 1차와 2차권선(L1,L2)비가 다른 고주파변압기(T)와 N채널 MOSFET로 된 스위칭 소자인 NMOS(Q)와 저항(R3)과 환류다이오드(FRD)와 콘덴서(C0)를 구비하여 역률개선 및 DC-DC 출력전류를 생성하도록 된 것이며, 출력전압검출부(104)를 구비하여 출력되는 피드백전압(VFB)을 이용하여 BCM제어부(103)에 의해 PWM제어하기 위한 신호를 생성하도록 된 것이며, BCM제어부(103)는 내부에 출력전압비교기(109), Multiplier(107), 전류센서비교기(106), 영전류검지부(105), PWM 래치(108), 출력버퍼(110)를 구비하여서, 입력전압(

)에 의한 입력신호(V_AC)와, 고주파변압기(T)의 3차측권선(L3)에 의한 영전류 검출신호(V_zero)와, 스위칭 전류(IQ)에 의한 전류센싱신호(VQ)와, 출력전압검출부(104)의 출력에 의한 피드백전압(VFB)과, 전압비교기(109)의 출력신호(Vc)를 이용하여As can be seen from this, in the power supply unit 101, the AC power source Vin is full-wave rectified by the bridge diode BD through the high frequency filter unit F, and thus the input voltage (

DC-DC converter 102 is a switching element composed of a high frequency transformer T and an N-channel MOSFET having different ratios of primary and secondary windings L1 and L2. ) And a resistor (R3), a reflux diode (FRD), and a capacitor (C0) to improve the power factor and generate a DC-DC output current, and has an output voltage detector (104) to output the feedback voltage (VFB) By using the BCM controller 103 to generate a signal for PWM control, the BCM controller 103 is an output voltage comparator 109, Multiplier 107, current sensor comparator 106, zero current therein The detector 105, the PWM latch 108, and the output buffer 110 are provided to provide an input voltage (

) Input signal V _AC , zero current detection signal V _zero by tertiary winding L3 of high frequency transformer T, current sensing signal VQ by switching current IQ, Using the feedback voltage VFB by the output of the output voltage detector 104 and the output signal Vc of the voltage comparator 109

The control signal Vout is generated and applied to the gate of the NMOS Q to control it.

In the present invention, one end of the primary winding L1 of the high frequency transformer T is connected to the anode of the power supply unit 101, and the other end thereof is connected to the drain of the NMOS Q which is a switching element made of an N-channel MOSFET. The source of Q) is connected to the cathode of the power supply unit 101 through the resistor R3, and the gate of the NMOS Q is a control signal for determining the on / off state of the NMOS Q in the BCM controller 103. When V _OUT is connected, the NMOS Q is turned on when the level of the control signal V _OUT goes high, and turned off when it goes low. Accordingly, when the NMOS Q is turned on, the switching current I _Q flows through the primary winding L1 of the high frequency transformer T, and the input voltage is induced, and the black spot which is the starting point of the coil winding is supplied to the secondary winding L2. Since the voltage of the opposite polarity to the primary winding L1 is induced by the direction of, the reflux diode FRD is reverse biased and cut off. Therefore, energy is accumulated only in the magnetization inductance of the primary winding L1, and when the next NMOS Q is turned off, the secondary winding L2 of the high frequency transformer T is inverted to a voltage having a polarity opposite to that of the previous state. By energizing the diode FRD, energy stored in the magnetization inductance of the high frequency transformer T is discharged to the output, and the energy is charged to the capacitor C ₀ at the voltage rectified through the reflux diode FRD. As a result, the capacitor C ₀ is charged with a predetermined output voltage V ₀ for supplying the load R ₀ .

In order to improve the power factor in the one-stage power factor improvement circuit,

In series resistors R1 and R2, one end of the resistor R1 is connected to the + side of the bridge diode BD, and the electrodes of the resistor R2 and the capacitor C2 are grounded. The connection point (R1), the other end of the resistor (R2) and the capacitor (C2) is connected to the multiplier (107) of the BCM control unit 103. Here, the resistor R1 is for limiting the predistortion current to be smoothed and distorted by the capacitor C2, and the output of the multiplier 107 of the BCM controller 103 is the negative input of the current sensor comparator 106. Connected to the reset terminal R of the PWM latch 108, and the control signal Vout is applied to the gate of the NMOS Q through the PWM latch 108 and the output buffer 110. will be.

Looking at the process for power factor improvement by the input signal (V _AC ) in the BCM control unit 103 of the power factor improvement circuit consisting of 1-stage,

)의 정보를 갖는 입력신호(V_AC)는 multiplier(107)의 입력으로 들어가게 되는데 출력신호(Vc)와 곱해져서 V_ACㅧ Vc의 입력전압 정보를 갖는 제어신호가 된다. 이의 신호가 전류센서비교기(106)의 (-)입력이 되고 전류센싱신호(VQ)와 비교하여 출력전압이 PWM 래치(108)의 리셋단자(R)에 입력된다. 전류센싱신호(VQ)와 입력전압 정보(V_ACㅧ Vc)의 신호가 같아 질 때 전류센서비교기(106)의 출력전압에 의해서 PWM 래치(108)는 리셋이 되어서 출력은 오프가 되며 출력버퍼(110)를 통해서 제어신호(Vout)는 스위치 소자 NMOS(Q)를 오프 하여 스위칭 전류(IQ)는 차단이 되는 것이다. 또한 전류센서비교기(106)의 기준신호가 되는 입력신호(V_AC)x출력신호(Vc)가 사인커버의 형태이므로 스위칭 전류(IQ) 즉, 전류센싱신호(VQ) 또한 사인커버의 형태가 됨으로서 교류전원(V_IN)에 비례한 전류를 생성케 하고 이를 통하여 NMOS(Q)의 시비율을 제어함으로써 역률개선을 이루게 한다.Input voltage

The input signal (V _AC ) having the information of) enters the input of the multiplier 107 and is multiplied by the output signal Vc to become a control signal having input voltage information of V _AC ㅧ Vc. The signal thereof becomes the negative input of the current sensor comparator 106 and the output voltage is input to the reset terminal R of the PWM latch 108 in comparison with the current sensing signal VQ. When the current sensing signal VQ and the signal of the input voltage information V _AC ㅧ Vc become the same, the output of the current sensor comparator 106 resets the PWM latch 108 so that the output is turned off and the output buffer ( The control signal Vout turns off the switch element NMOS Q through 110 to block the switching current IQ. In addition, since the input signal V _AC x output signal Vc serving as the reference signal of the current sensor comparator 106 is in the form of a sign cover, the switching current IQ, that is, the current sensing signal VQ, is also in the form of a sign cover. The power factor is improved by generating a current proportional to the AC power supply (V _IN ) and controlling the application rate of the NMOS (Q).

In addition, to adjust the output voltage (V0) to PWM,

A resistor R4 and a resistor R5 in series are connected, and one end of the resistor R4 is connected to the + side of the load R ₀ , and one end of the resistor R5 is grounded, and the resistor R4 and the resistor ( The output voltage detector 104 connected to obtain the divided voltage of the output voltage V _O from the center point of R5) compares the feedback voltage VFB outputted by the uninterrupted optical coupler to the output voltage comparator of the BCM controller 103. Input to the (+) input terminal of (109) to generate a signal for the PWM control of the DC-DC converter 102.

Looking at the operation state of the BCM controller 103 for PWM control of the DC-DC converter 102, the feedback voltage (VFB) and (-) input input to the (+) input terminal of the output voltage comparator 109 The output voltage VC generated by the predetermined reference voltage Vref preset at the terminal is input to a multiplier like the input signal V _{AC in the} form of a sine cover, and compared with the current sensing signal VQ to compare the current sensing signal ( When VQ is equal to the input signal (V _AC ) ㅧ output voltage (VC), the output of the PWM latch 108 is reset by the output voltage of the current sensor comparator 106 so that the output of the PWM latch 108 is turned off. The control signal Vout output through the buffer 110 turns off the switch element NMOS Q so that the switching current IQ is cut off.

In addition, the zero current detection signal V _zero of the BCM controller 103 connects the start point of the tertiary winding L3 of the high frequency transformer T with ground, and the other end of the zero current detector 105 of the PWM controller 103. When the switch element NMOS Q is turned on, the output voltage of the tertiary side winding L3 becomes zero, as is the voltage induced on the secondary side winding L2 in the same direction when the switch element NMOS Q is turned on. It is detected by the detector 105 and its output is applied to the S terminal of the PWM latch 108 which is an RS flip-flop. The output of the PWM latch 108 is brought to a high level, and this signal is output through the output buffer 110. It is applied to the NMOS (Q) which is a switch element.

Looking at the process in which the switching current (IQ) flows by maintaining the on state of the switch element NMOS (Q) by the _zero current detection signal (V _zero ) in the BCM control unit 103 of the one-stage power factor correction circuit.

The switch element NMOS Q is turned off when a voltage of -Vgs is applied to the gate. At this time, in the high frequency transformer T, the energy is transferred to the secondary side winding L2, and the current ID of the freewheeling diode FRD. Decreases with the slope of -Vo / L2. At this time, if the current ID of the refracting diode (FRD) becomes '0' and no energy is converted, the zero current detector 105 of the BCM controller 103 is the third winding L3 of the high frequency transformer T. ) Is turned to zero voltage and the output is turned on by the PWM latch 108 being set. The control signal Vout turns on the switching element NMOS Q through the output buffer 110 to turn on the switching current IQ. By being able to flow again, it operates in boundary conduction mode.

In addition, the current sensing signal V _Q is connected between the source of the NMOS Q and the positive terminal of the zero current comparator 106 of the PWM control unit 103, and between the source of the NMOS Q and the resistor R3. Is applied to the positive terminal of the zero current comparator 106 to control the switching current IQ of the NMOS Q, that is, the peak current flowing through the primary winding L1 of the high frequency transformer T. have.

Looking at the process for adjusting the output current (ID) by the current sensing signal (V _Q ) in the BCM control unit 103 of the one-stage power factor correction circuit as described above, the switch element NMOS (Q) is on When the current sensing signal VQ due to the switching current IQ increases with the slope of Vin / L1, the peak current of the switching current IQ is compared with the sinusoidal input signal V _{AC AC} output voltage VC. While increasing, when the input signal (V _AC ) ㅧ equals the output voltage (VC), the output of the current sensor comparator 106 becomes the high level and resets the PWM latch 108 so that the output is turned off and the output buffer 110 The control signal Vout turns off the switch element NMOS Q so that the switching current IQ is cut off.

In this power factor improvement circuit, Figure 3 shows the operation mode of the DC-DC converter according to the present invention.

As shown therein, the DC-DC converter 102 of the present invention has a first mode for controlling the current IQ flowing through the primary winding L1 of the high frequency transformer T, and the current flowing through the reflux diode FRD. It is divided into a second mode for controlling the (ID) and the description of each mode is as follows.

When the first mode is (t0 ≦ t <t1) and + VGS is applied to the gate of the switching device NMOS (Q), the NMOS Q is turned on and the switching current IQ flowing in the drain of the NMOS Q is at this time. Is increased by the slope of Vg / L1, the high frequency transformer T is magnetized to store energy, and the level of the current sensing signal VQ becomes High. The equation for obtaining the input current in the first mode can be written as follows.

* L1 is the inductance of the primary winding (L1) of the high frequency transformer (T)

The second mode becomes (t1 ≦ t <t2) so that the NMOS Q is turned off when the current sensing signal VQ becomes equal to the current command of the input signal V _AC feedback voltage VFB. At this time, the energy stored in the primary winding L1 of the high frequency transformer T starts to be transferred to the secondary winding L2 and the current of the reflux diode FRD flows at a slope of -Vo / L2 until it becomes zero. The current is expressed as follows.

* V0 is DC-DC converter output voltage

* L2 is the inductance of the secondary winding (L2) of the high frequency transformer (T)

At this time, the reflux diode (FRD) operates ZCS (Zero Current Turn Off Switching). When the energy of the high frequency transformer (T) is completely passed to the output side, the zero current detection signal (V _zero ) is low level, the NMOS (Q) is turned on again.

)의 외형을 따르게 되어 이 전류를 필터링하게 되면 입력전류는 위상변화 없이 라인 전압의 모양을 추종하여 역률을 개선하게 되며 DC-DC 컨버터의 출력전압(VO)을 출력전압 검출부(104)와 피드백 입력단자(VC)를 통해 소정의 출력전압(VO)의 조정을 동시에 달성할 수 있게 되는 것이다.By repeating this operation, the switching current IQ becomes a rectified input voltage as shown in FIG.

When the current is filtered, the input current follows the shape of the line voltage without phase change to improve the power factor, and the output voltage VO of the DC-DC converter is output to the output voltage detector 104 and the feedback input. Through the terminal VC, it is possible to simultaneously achieve the adjustment of the predetermined output voltage VO.

As described above, in order to confirm the power factor improvement circuit according to the present invention through an experiment, a waveform measured by fabricating and measuring a PDP power circuit having the following specifications is illustrated.

Input voltage AC 90 Vrms ~ 265 Vrms Output voltage 200 V Output power 400 W

4 is a graph showing waveforms of the AC power supply V _IN , the switching current IQ flowing through the drain of the NMOS Q which is a switch element, and the AC input current I _IN .

Fig. 5 shows the switching current IQ flowing through the drain of the NMOS Q, which is a switch element, the gate signal Vgs, the diode current ID, and the voltage Vzero of the tertiary side winding L3 of the transformer T. 6 is a waveform measuring the AC current V _IN and the switching current IQ flowing through the drain of the NMOS Q, which is a switch element, and FIG. It shows the waveform that measured the adjustment characteristic according to.

) 모양을 잘 추종하여 역률개선을 달성하고 있음을 알 수 있으며 도7은 출력전압과 부하변동에 따른 조정 특성을 측정한 파형으로써 안정된 출력을 얻고 있음을 보이고 있는 것이다.As shown in FIG. 5, the BCM mode is operated by sensing the point where the diode current ID becomes zero to drive the NMOS Q. As a result, the switching current IQ is as shown in FIG. 6. Is the input voltage (

It can be seen that the power factor improvement is achieved by following the shape well. FIG. 7 shows a stable waveform obtained by measuring the adjustment characteristics according to the output voltage and the load variation.

Accordingly, the one-stage power factor correction circuit according to the present invention shows a very simple structure compared to the conventional two-stage circuit, and even though the number of components required for the circuit configuration is greatly reduced, the power factor improvement as well as DC- It is possible to secure a predetermined output by the function of DC converter, so it is possible to reduce the number of parts and to reduce the overall size of the product by simplifying the circuit, especially in applications such as PDP, where the power structure is very complicated. This is a very useful effect.

Claims (5)

AC power supply (101) to which AC power (V _IN ), filter unit (F) and bridge diode (BD) are connected, high frequency transformer (T) with different starting point and winding ratio in primary and secondary, and N-channel MOSFET as switching element A flyback circuit of NMOS (Q) and a flyback diode (FRD) for minimizing forward conduction losses, a BCM controller 103 for controlling the power factor improvement and the operation of the DC-DC converter 102, Single power stage power factor improvement circuit operating in the BCM mode, characterized in that it comprises an output voltage detector 104 for detecting the output voltage of the DC-DC converter 102 The method according to claim 1, In order to improve the power factor, the BCM controller 103 described above includes a multiplier 107, a current sensor comparator 106, a PWM latch 108, an output buffer 110, a zero current detector 105, and an output voltage comparator 109. Power factor correction circuit operating in BCM mode, characterized in that it comprises a The method according to claim 1, In order to improve the power factor, the multiplier 107 of the above-described BCM controller 103 has one end of the resistor R1 connected in series with the + side of the bridge diode BD in the resistor R1 and the resistor R2. An electrode of one end of the resistor R2 and the capacitor C2 is grounded, connected to a connection point to which the resistor R1 and the other end of the resistor R2 and the capacitor C2 are connected, and a control signal output from the buffer 110 ( Vout) is a single power stage power factor improvement circuit operating in the BCM mode, characterized in that connected to the gate of the above-described NMOS (Q) The method according to claim 1, The above-described BCM control unit 103 applies the zero current detection signal V _zero in the above-described BCM control unit 103 to operate the DC-DC converter unit 102 in the boundary conduction mode (BCM). In the BCM mode, the start point of the tertiary winding L3 of the high frequency transformer T is connected to ground, and the other end is connected to the input side of the zero current detection unit 105 of the PWM control unit 103. Single power stage power factor improvement circuit. The method according to claim 1, The above-described high frequency transformer T has a primary winding L1, a winding start point of the secondary winding L2 in a direction opposite to the primary winding L1, and a starting point of the winding same as the secondary winding L2. A single power stage power factor improvement circuit operating in the BCM mode, characterized in that it comprises a tertiary winding line (L3).

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