CN107396245B - Pulse width modulation 700W+700W (PFC) power amplifier module - Google Patents

Pulse width modulation 700W+700W (PFC) power amplifier module Download PDF

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CN107396245B
CN107396245B CN201710744098.5A CN201710744098A CN107396245B CN 107396245 B CN107396245 B CN 107396245B CN 201710744098 A CN201710744098 A CN 201710744098A CN 107396245 B CN107396245 B CN 107396245B
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circuit
power amplifier
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pin
power supply
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CN107396245A (en
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杨明龙
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Dongguan Jingheng Electronic Co ltd
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Dongguan Jingheng Electronic Co ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04RLOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R3/00Circuits for transducers, loudspeakers or microphones
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04RLOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R3/00Circuits for transducers, loudspeakers or microphones
    • H04R3/007Protection circuits for transducers
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04RLOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R2430/00Signal processing covered by H04R, not provided for in its groups
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Acoustics & Sound (AREA)
  • Signal Processing (AREA)
  • Amplifiers (AREA)

Abstract

The invention discloses a pulse width modulation 700W+700W (PFC) power amplifier module, which comprises a PFC power factor correction circuit and a PWM pulse width modulation circuit, wherein the PFC power factor correction circuit improves the capability of a power supply to output active power. The output end of the EMI filter is connected with a PFC power factor correction circuit, the output end of the PFC power factor correction circuit is connected with a bridge type rectifying and filtering circuit, a switch power supply isolation transformer circuit is connected with a digital power amplifier PWM pulse width modulation circuit after passing through a starting/closing control circuit, and the output end of the switch power supply isolation transformer circuit is connected with a digital power amplifier main voltage rectifying and filtering circuit, an auxiliary power supply 1 rectifying and filtering circuit and an auxiliary power supply 2 rectifying and filtering circuit in parallel. The PFC power factor correction circuit of the power amplifier module guarantees the stability of the output power of the power supply, and has good sound quality and fidelity effects.

Description

Pulse width modulation 700W+700W (PFC) power amplifier module
Technical Field
The present invention relates to power amplifiers, and more particularly to a pulse width modulated power amplifier module.
Background
The sound amplifier is widely applied in life, and the power amplifier is used for amplifying weaker signals input by sound source equipment to generate enough current to drive a loudspeaker to replay sound, and the power amplifier is used for amplifying audio electric signals to drive the loudspeaker of the sound box to make sound. Professional power amplifiers are commonly used for conferences, shows, halls, and public address of halls. The design is mainly characterized by high output power, perfect protection circuit and good heat dissipation. The sound quality of the sound box power amplifier directly influences the sound quality of the whole sound box, and the sound distortion and other conditions are often caused, so that the current sound box power amplifier has different powers, and the requirements of the different occasions on how to improve the design of signal processing in the power amplifier and adapt to various different occasions are discussed herein. Different power amplifiers are also different in internal signal processing, line design and production process due to consideration of power, impedance, distortion, dynamics and different use ranges and control and regulation functions. Professional power amplifiers are commonly used for conferences, shows, halls, and public address of halls. The design is mainly characterized by high output power, perfect protection circuit and good heat dissipation.
Disclosure of Invention
The invention aims to overcome the defects of the prior art, and is formed by adopting a PWM (pulse width modulation) circuit, adopting a PFC (power factor correction) circuit and a PWM (pulse width modulation) circuit, wherein the PFC circuit improves the capability of a power supply for outputting active power, the PWM carries out rectification and filtering on main voltage, a power amplifier module is in double-layer board arrangement, the digital power amplifier PWM circuit (pulse width modulation) circuit comprises two groups of equivalent PWM power amplifier units, and two sets of auxiliary circuits are provided: the auxiliary power supply 1 rectifying and filtering circuit and the auxiliary power supply 2 rectifying and filtering circuit are used for rectifying and filtering the output voltage and are suitable for high-power amplification output.
In order to achieve the above purpose, the invention provides a pulse width modulation 700W+700W (PFC) power amplifier module, which adopts the following technical scheme:
the invention relates to a pulse width modulation 700W+700W (PFC) power amplifier module, which is arranged on a double-layer board, wherein a digital power amplifier PWM circuit 24 (pulse width modulation power amplifier circuit) is distributed on an upper circuit board (PCB), and the other power amplifier PWM circuits are arranged on a lower circuit board (PCB); the output end of the EMI filter 11 is connected with the PFC power factor correction circuit 20, the output end of the PFC power factor correction circuit 20 is connected with the bridge type rectifying and filtering circuit 12, the bridge type rectifying and filtering circuit 12 is connected with the switch power supply isolation transformer circuit 14 after passing through the self-excitation half-bridge switch power supply circuit 13, the switch power supply isolation transformer circuit 14 is connected with the digital power amplifier PWM pulse width modulation circuit 24 after passing through the starting/closing control circuit 15, and the output end of the switch power supply isolation transformer circuit 14 is connected with the digital power amplifier main voltage rectifying and filtering circuit 21, the auxiliary power supply 1 rectifying and filtering circuit 31, the auxiliary power supply 2 rectifying and filtering circuit 37 and the fan voltage rectifying and filtering circuit 41 in parallel;
the auxiliary power supply 1 rectification filter circuit 31 is connected with the +/-5V auxiliary voltage 1 circuit 34 after passing through the +/-12V auxiliary voltage 1 circuit 32, the output end of the +/-5V auxiliary voltage 1 circuit 34 is connected with the digital power amplification PWM pulse width modulation circuit 24, and the auxiliary power supply 1 rectification filter circuit 31 is connected with the +5V auxiliary voltage 2 circuit 35 after passing through the +12V auxiliary voltage 2 circuit 33;
the digital power amplifier main voltage rectifying and filtering circuit 21 is connected with the output power limiting circuit 16 after passing through the current detection circuit 22, the output end of the current detection circuit 22 is connected with the digital power amplifier PWM pulse width modulation circuit 24, the digital power amplifier main voltage rectifying and filtering circuit 21 is connected with the digital power amplifier PWM pulse width modulation circuit 24 after passing through the PWM driving chip power supply circuit 23, the output end of the digital power amplifier PWM pulse width modulation circuit 24 is connected with the digital power amplifier output circuit 18 and the protection indicating circuit 19, and the input end of the digital power amplifier PWM pulse width modulation circuit 24 is connected with the signal protection circuit 17.
In some embodiments, the output end of the fan voltage rectifying and filtering circuit 41 is connected with a fan speed regulating circuit 42, and the fan speed regulating circuit 42 is connected with a digital power amplifier temperature monitoring circuit 43;
the input end of the EMI filter 11 is connected with an AC alternating current input, the output end of the EMI filter 11 is connected with a bridge rectifier filter circuit 12, the bridge rectifier filter circuit 12 selects the input alternating voltage, the output end of the bridge rectifier filter circuit 12 is connected with a self-excited half-bridge switching power supply circuit 13, the self-excited half-bridge switching power supply circuit 13 performs over-temperature/over-voltage/over-current protection, and the output end of the self-excited half-bridge switching power supply circuit 13 is connected with a switching power supply isolation transformer circuit 14.
In some embodiments, the PFC power factor correction circuit 20 includes a chip U3, a connector CN9, and a connector CN11, wherein the 1 st and 2 nd bits of the connector CN9 are connected to a power supply negative VEE, the 3 rd and 4 th bits of the connector CN9 are connected in series, the 1 st and 2 nd bits of the connector CN11 are connected in series, a pin 1 of the chip U3 is connected to VEE, a pin 4 of the chip U3 is connected to the 2 nd bit of the connector CN11, a pin 3 of the chip U3 is connected to the 1 st bit of the connector CN11 after passing through a resistor R11, and a pin 8 of the chip U3 is connected to the 3 rd bit of the connector CN 9;
pin 6 of chip U3 sequentially passes through resistors R18, R10 and R46, and the negative electrode and positive electrode of diode D22 form a loop;
the positive electrode of the diode D22 is connected with the 4 th bit of the connector CN9, the negative electrode of the light-emitting diode DS3 is connected with the power supply negative VEE, and the pin 8 of the chip U3 is a PWM driving output interface of PFC (used as a voltage output interface of the PFC power factor correction circuit 20); pin 7 of the chip U3 is a PFC drive current supply interface (as a current end of the PFC power factor correction circuit 20);
pin 2 of chip U3 is connected to VEE via capacitor C37, and pin 4 of chip U3 is connected to VEE via capacitor C30 and resistor R29 in parallel.
In some embodiments, the digital power amplifier PWM pulse width modulation circuit 24 (pulse width modulation power amplifier circuit) includes two groups of PWM power amplifier units, the first group of PWM power amplifier units includes a PWM pulse width modulation chip U2, a pin 15 of the chip U2 is connected to a +b terminal interface after passing through a resistor R39, a pin 10 of the chip U2 is connected to a-B terminal interface, a pin 14 of the chip U2 is connected to a gate G of an NMOS tube FDP53 after passing through a resistor R27, a pin 13 of the chip U2 is connected to a source S of the NMOS tube FDP53 and a drain D of the NMOS tube FDP54, a pin 13 of the chip U2 outputs a power amplifier signal, a drain D of the NMOS tube FDP53 is connected to the +b terminal interface, a pin 16 of the chip U2 is connected to a drain D of the NMOS tube FDP53 after passing through a positive electrode and a negative electrode of the resistor R44, and a resistor R29 is connected in series between the resistor R44 and the resistor R27;
the source electrode S of the NMOS tube FDP53 is connected with the drain electrode D of the NMOS tube FDP54, the source electrode S of the NMOS tube FDP54 is connected with the pin 10 of the chip U2, the grid electrode G of the NMOS tube FDP54 is connected with the pin 11 of the chip U2 after passing through the resistor R28, and the grid electrode G of the NMOS tube FDP54 is connected with the source electrode S of the NMOS tube FDP54 after passing through the resistors R28 and R45 and the light emitting diode DS 2.
In some embodiments, an over-temperature protection circuit is arranged on a first group of PWM power amplifier units of the digital power amplifier PWM pulse width modulation circuit 24 (pulse width modulation power amplifier circuit), the over-temperature protection circuit of the first group of PWM power amplifier units comprises a PNP triode Q1 and a thermistor PR1, a pin 1 of a chip U2 is connected with the thermistor PR1 and an emitter E of the PNP triode Q1 in parallel, a pin 1 of the chip U2 is connected with a base B of the PNP triode Q1 after passing through the thermistor PR1, and a base B of the PNP triode Q1 is grounded after passing through a resistor R15; the second group of PWM power amplifier units are identical to the first group of PWM power amplifier units.
The PFC power factor correction circuit of the power amplifier module guarantees the stability of the output power of a power supply, the digital power amplifier PWM pulse width modulation circuit (pulse width modulation power amplifier circuit) is distributed on an upper circuit board, and the output signal of the power amplifier output circuit is simultaneously filtered/detected/energy recovered, so that the sound quality and fidelity effect are good.
Drawings
FIG. 1 is a schematic circuit diagram of the present invention;
fig. 2 is an electronic circuit diagram of the PFC power factor correction circuit according to the present invention;
FIG. 3 is a diagram of the electronic circuit of the PWM circuit of the digital power amplifier of the present invention;
fig. 4 is an electronic circuit diagram of a first PWM power amplifier unit according to the present invention.
The reference numerals are explained as follows:
the power supply comprises an EMI filter 11, a bridge rectifier filter circuit 12, a self-excited half-bridge switch power supply circuit 13, a switch power supply isolation transformer circuit 14, an on/off control circuit 15, an output power limiting circuit 16, a signal protection circuit 17, a digital power amplifier output circuit 18, a protection indicating circuit 19, a PFC power factor correction circuit 20, a digital power amplifier main voltage rectifier filter circuit 21, a current detection circuit 22, a PWM driving chip power supply circuit 23, a digital power amplifier PWM pulse width modulation circuit 24, a subsidiary power supply 1 rectifier filter circuit 31, +/-12V subsidiary voltage 1 circuit 32, +12V subsidiary voltage 2 circuit 33, +/-5V subsidiary voltage 1 circuit 34, +5V subsidiary voltage 2 circuit 35, subsidiary power supply 2 rectifier filter circuit 37, a fan voltage rectifier filter circuit 41, a fan speed regulation circuit 42 and a digital power amplifier temperature monitoring circuit 43.
Detailed Description
So that the manner in which the features and advantages of the invention, as well as the manner in which the features and advantages of the invention are attained and can be understood in detail, a more particular description of the invention, briefly summarized below, may be had by reference to the appended drawings and detailed description thereof which follow.
The power amplifier module is arranged by a double-layer board, a digital power amplifier PWM (pulse width modulation) circuit 24 (pulse width modulation power amplifier circuit) is distributed on an upper circuit board, and other power amplifier modules are arranged on a lower circuit board;
the Power Factor Correction (PFC) filter 11, the PFC power factor correction circuit 20, the bridge rectifier filter circuit 12, the self-excited half-bridge switching power supply circuit 13 and the switching power supply isolation transformer circuit 14 are sequentially connected, the output end of the EMI filter 11 is connected with the PFC power factor correction circuit 20, the output end of the PFC power factor correction circuit 20 is connected with the bridge rectifier filter circuit 12, the bridge rectifier filter circuit 12 is connected with the switching power supply isolation transformer circuit 14 after passing through the self-excited half-bridge switching power supply circuit 13 and is sequentially connected with the digital power amplifier PWM pulse width modulation circuit 24 after passing through the starting/closing control circuit 15, the output end of the switching power supply isolation transformer circuit 14 is connected with the digital power amplifier main voltage rectifier filter circuit 21, the auxiliary power supply 1 rectifier filter circuit 31, the auxiliary power supply 2 rectifier filter circuit 37 and the fan voltage rectifier filter circuit 41 in parallel, the auxiliary power supply 1 rectifier filter circuit 31 is connected with +/-5V auxiliary voltage 1 circuit 34 after passing through +/-12V auxiliary voltage 1 circuit 32, the output end of +/-5V auxiliary voltage 1 circuit 34 is connected with the digital power amplifier PWM pulse width modulation circuit 24, and the auxiliary power supply 1 rectifier filter circuit 31 and the auxiliary voltage 2V auxiliary voltage 2+ 2 circuit 33 after passing through the auxiliary voltage 2V auxiliary voltage 2 circuit 35;
the self-excited half-bridge switching power supply circuit 13 performs over-temperature/over-voltage/over-current protection, the signal protection circuit 17 performs amplification/mode conversion/buffer protection, the digital power amplifier output circuit 18 serves as filtering/detection/energy recovery, and the protection indication circuit 19 performs direct current/over-temperature/over-current/over-voltage protection.
The digital power amplifier main voltage rectifying and filtering circuit 21 is connected with the output power limiting circuit 16 after passing through the current detection circuit 22, the output end of the current detection circuit 22 is connected with the digital power amplifier PWM pulse width modulation circuit 24, the digital power amplifier main voltage rectifying and filtering circuit 21 is connected with the digital power amplifier PWM pulse width modulation circuit 24 after passing through the PWM driving chip power supply circuit 23, the output end of the digital power amplifier PWM pulse width modulation circuit 24 is connected with the digital power amplifier output circuit 18 and the protection indicating circuit 19, and the input end of the digital power amplifier PWM pulse width modulation circuit 24 is connected with the signal protection circuit 17.
Signal protection circuit 17: amplifying/mode converting/buffering protection is carried out, and a channel 1-2 power amplification signal input is received; the digital power amplifier output circuit 18 can perform filtering/detection/energy recovery and provide channel 1-2 power amplifier output; the protection indication circuit 19 provides direct current/over temperature/over current/over voltage protection and outputs a protection indication.
The +/-12V auxiliary voltage 1 circuit 32 provides +/-12V auxiliary voltage output 1; +12v auxiliary voltage 2 circuit 33 provides +12v auxiliary voltage output 2 (optional); +5v auxiliary voltage 2 circuit 35 provides +5v auxiliary voltage output 2 (optional); auxiliary power supply 2 rectifying and filtering circuit 37 provides a +48V output (optional).
The input end of the EMI filter 11 is connected with AC input, the output end of the EMI filter 11 is connected with a bridge rectifier filter circuit 12, the bridge rectifier filter circuit 12 selects input AC voltage, the output end of the bridge rectifier filter circuit 12 is connected with a self-excited half-bridge switching power supply circuit 13, the self-excited half-bridge switching power supply circuit 13 performs over-temperature/over-voltage/over-current protection (a direct current protection module- -DC deflection, a thermistor, power limiting, current limiting, alarming, shutdown, an over-temperature protection module- -hiccup protection- -cooling self-starting, reset protection- -power-on Reset, software or manual Reset), and the output end of the self-excited half-bridge switching power supply circuit 13 is connected with a switching power supply isolation transformer circuit 14.
The digital power amplifier output circuit 25 outputs a signal while filtering/detecting/recovering energy.
The output end of the fan voltage rectifying and filtering circuit 41 is connected with a fan speed regulating circuit 42, and the fan speed regulating circuit 42 is connected with a digital power amplifier temperature monitoring circuit 43.
The PFC power factor correction circuit 20 comprises a chip U3, a connector CN9 and a connector CN11, wherein the 1 st and the 2 nd positions of the connector CN9 are connected with a power supply negative VEE, the 3 rd and the 4 th positions of the connector CN9 are connected in series, the 1 st and the 2 nd positions of the connector CN11 are connected in series, a pin 1 of the chip U3 is connected with the VEE, a pin 4 of the chip U3 is connected with the 2 nd position of the connector CN11, a pin 3 of the chip U3 is connected with the 1 st position of the connector CN11 after passing through a resistor R11, and a pin 8 of the chip U3 is connected with the 3 rd position of the connector CN 9;
pin 6 of chip U3 sequentially passes through resistors R18, R10 and R46, and the negative electrode and positive electrode of diode D22 form a loop;
the positive electrode of the diode D22 is connected with the 4 th bit of the connector CN9, the negative electrode of the light-emitting diode DS3 is connected with the power supply negative VEE, and the pin 8 of the chip U3 is the PWM driving output of PFC (an output voltage interface of the PFC power factor correction circuit 20 is provided with voltage input for the digital power amplifier PWM pulse width modulation circuit 24); pin 7 of the chip U3 is a PFC drive current supply terminal (which is a current interface of the PFC power factor correction circuit 20, and which provides a current input to the digital power amplifier PWM pulse width modulation circuit 24);
pin 2 of chip U3 is connected to VEE via capacitor C37, and pin 4 of chip U3 is connected to VEE via capacitor C30 and resistor R29 in parallel.
The digital power amplifier PWM pulse width modulation circuit 24 (pulse width modulation power amplifier circuit) comprises two groups of equivalent PWM power amplifier units, the first group of PWM power amplifier units comprises a PWM pulse width modulation chip U2, a pin 15 of the chip U2 is connected with a +b end interface after passing through a resistor R39, a pin 10 of the chip U2 is connected with a-B end interface, a pin 14 of the chip U2 is connected with a grid G of an NMOS tube FDP53 after passing through a resistor R27, a pin 13 of the chip U2 is connected with a source S of the NMOS tube FDP53 and a drain D of the NMOS tube FDP54, a pin 13 of the chip U2 outputs a power amplifier signal, a drain D of the NMOS tube FDP53 is connected with a +b end interface, a pin 16 of the chip U2 is connected with a drain D of the NMOS tube FDP53 after passing through a resistor R44 and a positive electrode-negative electrode of the diode D2, and a resistor R29 is connected in series between the resistor R44 and the resistor R27.
The source electrode S of the NMOS tube FDP53 is connected with the drain electrode D of the NMOS tube FDP54, the source electrode S of the NMOS tube FDP54 is connected with the pin 10 of the chip U2, the grid electrode G of the NMOS tube FDP54 is connected with the pin 11 of the chip U2 after passing through the resistor R28, and the grid electrode G of the NMOS tube FDP54 is connected with the source electrode S of the NMOS tube FDP54 after passing through the resistors R28 and R45 and the light emitting diode DS 2.
An over-temperature protection circuit is arranged on a first group of PWM power amplification units of the digital power amplification PWM pulse width modulation circuit 24 (pulse width modulation power amplification circuit), the over-temperature protection circuit of the first group of PWM power amplification units comprises a PNP triode Q1 and a thermistor PR1, a pin 1 of a chip U2 is connected with the thermistor PR1 and an emitter E of the PNP triode Q1 in parallel, a pin 1 of the chip U2 is connected with a base B of the PNP triode Q1 after passing through the thermistor PR1, and the base B of the PNP triode Q1 is grounded after passing through a resistor R15; the second group of PWM power amplifier units are identical to the first group of PWM power amplifier units.

Claims (2)

1. A pulse width modulation 700W+700W (PFC) power amplifier module is composed of a PFC power factor correction circuit (20) and a digital power amplifier PWM pulse width modulation circuit (24), wherein the PFC power factor correction circuit (20) improves the capability of a power supply to output active power, the digital power amplifier PWM pulse width modulation circuit (24) carries out rectification and filtering on main voltage, and the power amplifier module is arranged in a double-layer plate manner; the digital power amplification PWM pulse width modulation circuit (24) comprises two groups of equivalent PWM power amplification units, and two sets of auxiliary circuits are provided: the auxiliary power supply 1 rectifying and filtering circuit (31) and the auxiliary power supply 2 rectifying and filtering circuit (37) are used for rectifying and filtering and outputting voltage, so that the high-power amplifier is suitable for outputting;
comprising: the power supply comprises an EMI filter (11), and is characterized in that the input end of the EMI filter (11) is connected with an AC alternating current input, the output end of the EMI filter (11) is connected with a PFC power factor correction circuit (20), the output end of the PFC power factor correction circuit (20) is connected with a bridge rectifier filter circuit (12), the bridge rectifier filter circuit (12) selects an input alternating voltage, the bridge rectifier filter circuit (12) is connected with a switching power supply isolation transformer circuit (14) after passing through a self-excited half-bridge switching power supply circuit (13), the self-excited half-bridge switching power supply circuit (13) performs over-temperature/over-voltage/over-current protection, the switching power supply isolation transformer circuit (14) is connected with a digital power amplifier PWM (24) after passing through a starting/closing control circuit (15), and the output end of the switching power supply isolation transformer circuit (14) is connected with a digital power amplifier main voltage rectifier filter circuit (21), an auxiliary power supply 1 rectifier filter circuit (31), an auxiliary power supply 2 rectifier filter circuit (37) and a fan voltage rectifier filter circuit (41) in parallel;
the auxiliary power supply 1 rectifying and filtering circuit (31) is connected with the +/-5V auxiliary voltage 1 circuit (34) after passing through the +/-12V auxiliary voltage 1 circuit (32), the output end of the +/-5V auxiliary voltage 1 circuit (34) is connected with the digital power amplification PWM pulse width modulation circuit (24), and the auxiliary power supply 1 rectifying and filtering circuit (31) is connected with the +5V auxiliary voltage 2 circuit (35) after passing through the +12V auxiliary voltage 2 circuit (33);
a +/-12V auxiliary voltage 1 circuit (32) provides +/-12V auxiliary voltage output 1; a +12v auxiliary voltage 2 circuit (33) providing a +12v auxiliary voltage output 2; a +5v auxiliary voltage 2 circuit (35) providing a +5v auxiliary voltage output 2; the auxiliary power supply 2 rectifying and filtering circuit (37) provides +48V output;
the digital power amplifier main voltage rectifying and filtering circuit (21) is connected with the output power limiting circuit (16) after passing through the current detection circuit (22), the output end of the current detection circuit (22) is connected with the digital power amplifier PWM pulse width modulation circuit (24), the digital power amplifier main voltage rectifying and filtering circuit (21) is connected with the digital power amplifier PWM pulse width modulation circuit (24) after passing through the PWM driving chip power supply circuit (23), the output end of the digital power amplifier PWM pulse width modulation circuit (24) is connected with the digital power amplifier output circuit (18) and the protection indicating circuit (19), and the input end of the digital power amplifier PWM pulse width modulation circuit (24) is connected with the signal protection circuit (17);
signal protection circuit (17): amplifying/mode converting/buffering protection is carried out, and a channel 1-2 power amplification signal input is received;
digital power amplifier output circuit (18): the output signal is subjected to filtering/detection/energy recovery at the same time, and the output of the channel 1-2 power amplifier is provided;
protection instruction circuit (19): providing direct current/over-temperature/over-current/over-voltage protection and outputting a protection instruction;
the PFC power factor correction circuit (20) comprises a chip U3, a connector CN9 and a connector CN11, wherein the 1 st and 2 nd positions of the connector CN9 are connected with a power supply negative VEE, the 3 rd and 4 th positions of the connector CN9 are connected in series, the 1 st and 2 nd positions of the connector CN11 are connected in series, a pin 1 of the chip U3 is connected with the VEE, a pin 4 of the chip U3 is connected with the 2 nd position of the connector CN11, a pin 3 of the chip U3 is connected with the 1 st position of the connector CN11 after passing through a resistor R11, and a pin 8 of the chip U3 is connected with the 3 rd position of the connector CN 9;
pin 6 of chip U3 sequentially passes through resistors R18, R10 and R46, and the negative electrode and positive electrode of diode D22 form a loop; the anode of the diode D22 is connected with the 4 th bit of the connector CN9, and the cathode of the light emitting diode DS3 is connected with the power supply negative VEE;
in a PFC power factor correction circuit (20): pin 8 of the chip U3 is PWM driving output of PFC, is an output voltage interface of the PFC power factor correction circuit 20, and provides voltage input for the digital power amplifier PWM pulse width modulation circuit 24;
the pin 7 of the chip U3 is a PFC driving current supply end and is a current interface of the PFC power factor correction circuit 20, and provides current input for the digital power amplifier PWM pulse width modulation circuit 24;
pin 2 of the chip U3 is connected with VEE after passing through a capacitor C37, and pin 4 of the chip U3 is connected with VEE after passing through a capacitor C30 and a resistor R29 which are connected in parallel;
the digital power amplification PWM pulse width modulation circuit (24) comprises two groups of PWM power amplification units, wherein the first group of PWM power amplification units comprises a PWM pulse width modulation chip U2, a pin 15 of the chip U2 is connected with a +B end interface after passing through a resistor R39, a pin 10 of the chip U2 is connected with a-B end interface, a pin 14 of the chip U2 is connected with a grid G of an NMOS tube FDP53 after passing through a resistor R27, a pin 13 of the chip U2 is connected with a source S of the NMOS tube FDP53 and a drain D of an NMOS tube FDP54, a pin 13 of the chip U2 outputs a power amplification signal, a drain D of the NMOS tube FDP53 is connected with a +B end interface, a pin 16 of the chip U2 is connected with a drain D of the NMOS tube FDP53 after passing through a resistor R44 and an anode-cathode of a diode D2, and a resistor R29 is connected between the resistor R44 and the resistor R27 in series;
the source electrode S of the NMOS tube FDP53 is connected with the drain electrode D of the NMOS tube FDP54, the source electrode S of the NMOS tube FDP54 is connected with the pin 10 of the chip U2, the grid electrode G of the NMOS tube FDP54 is connected with the pin 11 of the chip U2 after passing through the resistor R28, and the grid electrode G of the NMOS tube FDP54 is connected with the source electrode S of the NMOS tube FDP54 after passing through the resistors R28 and R45 and the light-emitting diode DS 2;
an over-temperature protection circuit is arranged on a first group of PWM power amplification units of the digital power amplification PWM pulse width modulation circuit (24), the over-temperature protection circuit of the first group of PWM power amplification units comprises a PNP triode Q1 and a thermistor PR1, a pin 1 of a chip U2 is connected with the thermistor PR1 and an emitter E of the PNP triode Q1 in parallel, a pin 1 of the chip U2 is connected with a base B of the PNP triode Q1 after passing through the thermistor PR1, and the base B of the PNP triode Q1 is grounded after passing through a resistor R15; the second group of PWM power amplifier units are identical to the first group of PWM power amplifier units.
2. The pulse width modulation 700w+700w (PFC) power amplifier module according to claim 1, which is
Is characterized in that the output end of the fan voltage rectifying and filtering circuit (41) is connected with a fan speed regulating circuit (42),
the fan speed regulating circuit (42) is connected with the digital power amplifier temperature monitoring circuit (43).
CN201710744098.5A 2017-08-25 2017-08-25 Pulse width modulation 700W+700W (PFC) power amplifier module Active CN107396245B (en)

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