KR20070112532A - Liquid crystal display and manufacturing method thereof - Google Patents

Abstract

An LCD and a manufacturing method thereof are provided to adjust the surface geometry of a storage capacitor line in association with the polarizing direction of a polarizing plate, thereby minimizing a light leakage due to a level difference between wirings of the storage capacitor line. An LCD(Liquid Crystal Display) includes a first substrate, a second substrate, a liquid crystal layer between the first and second substrates, and first and second polarizing plates separately equipped in the outside of the first and second substrates. The first substrate includes a gate line(121) and a storage capacitor line(123~126) formed in the same layer as the gate line. At least a part of the storage capacitor line is provided with zigzags including a first part substantially parallel with the polarizing direction of the first polarizing plate and a second part substantially parallel with the polarizing direction of the second polarizing plate.

Description

Liquid crystal display and its manufacturing method {LIQUID CRYSTAL DISPLAY AND MANUFACTURING METHOD THEREOF}

1 is a view showing a common electrode on a thin film transistor substrate according to an embodiment of the present invention,

FIG. 2 is a cross-sectional view of the liquid crystal display according to II-II of FIG. 1;

3 is a view showing the shape of a storage capacity line according to an embodiment of the present invention;

4A and 4B are views for explaining a process of forming a gate line and a storage capacitor line according to an embodiment of the present invention;

5A and 5B are views for explaining a process of forming data wirings and the like according to one embodiment of the present invention;

6A and 6B illustrate a process of forming a pixel electrode and the like according to an embodiment of the present invention.

 Explanation of Signs of Major Parts of Drawings

121: gate line 122: gate electrode

123: first sub storage capacity line 124: second sub storage capacity line

125: third sub storage capacity line 126: fourth sub storage capacity line

131: gate insulating film 141a, 141b: data line

142: source electrode portion 143: drain electrode portion

151: protective film 160: pixel electrode

171: contact hole 172: pixel electrode incision pattern

180: first polarizing plate 250: common electrode

251: first common electrode incision pattern 252: second common electrode incision pattern

253: third common electrode incision pattern 260: second polarizing plate

The present invention relates to a liquid crystal display device and a manufacturing method thereof. More particularly, the present invention relates to a thin film transistor substrate including a storage capacitor line and a method of manufacturing the same.

The liquid crystal display device includes a thin film transistor substrate on which a thin film transistor is formed, a color filter substrate on which a color filter layer is formed, a liquid crystal layer positioned therebetween, and a polarizing plate provided on each outer surface of the thin film transistor and the color filter layer. The backlight unit for irradiating light may be positioned on the rear surface of the thin film transistor substrate. Light transmitted from the backlight unit is controlled according to the arrangement of the liquid crystal layer. Here, the arrangement state of the liquid crystal layer depends on the surface geometry (Geometry), the surface energy (Surface Energy) and the electric field (Electric Field) of the liquid crystal attention. That is, in the liquid crystal display device, an electric field is formed between the pixel electrode of the thin film transistor and the common electrode of the color filter substrate according to the signal of the data line arranged in the thin film transistor to control the amount of light transmission by adjusting the arrangement state of the liquid crystal layer.

Recently, pixels having a T-pattern structure have been developed in a vertically aligned (VA) mode to implement a wide viewing angle in a liquid crystal display. The T-pattern structure indicates that the cutout patterns formed on the pixel electrode and the common electrode have an approximately 'T' type. The viewing angle is widened by adjusting the lying direction of the liquid crystal molecules using a fringe field formed by these incision patterns.

However, in the conventional liquid crystal display device, both sides of the pixel electrode where unwanted textures are in contact with the data line and the pixel electrode by an electric field formed between the data line and the pixel electrode according to the distance between the data line and the pixel electrode. Is caused on. As a method for minimizing the visibility of the texture, it is emerging that the storage capacitance line is formed on both sides of the pixel electrode where the texture is generated to shield the visibility of the texture.

However, when the storage capacitor line is formed for such shielding, the liquid crystal is physically inclined by generating a step in the pixel electrode, and light leakage occurs due to the step of the pixel electrode. This leads to a drop in the contrast ratio (CR).

Accordingly, an object of the present invention is to provide a liquid crystal display device and a method for manufacturing the same, which minimize light leakage caused by a step formed by a storage capacitor line.

The above object includes a first substrate, a second substrate, a liquid crystal layer positioned between the first substrate and the second substrate, and first and second polarizing plates provided on outer surfaces of the first and second substrates, respectively. In the liquid crystal display device, the first substrate includes a gate line and a storage capacitor line formed on the same layer as the gate line, wherein at least a portion of the storage capacitor line is formed of a first portion and a first substantially parallel to the polarization direction of the first polarizing plate. It is achieved by a liquid crystal display device characterized in that it is provided in a zigzag shape including a second portion substantially parallel to the polarization direction of the two polarizing plates.

Here, the first substrate further includes a plurality of data lines which insulate and intersect the gate line to define pixels, and the storage capacitor line includes a first sub storage capacitor line and a first sub storage capacitor line extending along one side of the data line. A second sub storage capacitor line extending from the one end of the second sub storage capacitor line, the third sub storage capacitor line extending from the one end of the second sub storage capacitor line and extending from the one data line separated from the one data line; The third sub storage capacitance line may include a fourth sub storage capacitance line connected to an end of the first sub storage capacitance line.

At least a portion of the first sub storage capacitor line and the third sub storage capacitor line may be provided in the zigzag shape mentioned above.

In addition, it is preferable that the first portion and the second portion are substantially orthogonal to each other.

The first substrate further includes a thin film transistor provided at an intersection region of the gate line and the data line, and a pixel electrode connected to the thin film transistor and formed on the gate line, the storage capacitor line, and the data line. A pixel electrode incision pattern corresponding to the two sub storage capacitor lines may be formed.

The second substrate may include a common electrode, and a first common electrode cutout pattern corresponding to the fourth sub storage capacitor line may be formed on the common electrode.

The common electrode includes a second common electrode incision pattern branching from the first common electrode incision pattern and extending along the data line, and a third electrode disposed in parallel with the first common electrode incision pattern with the pixel electrode incision pattern therebetween. The common electrode incision pattern may be further formed.

Another object of the present invention is to provide a liquid crystal layer positioned between a first substrate, a second substrate, a first substrate and a second substrate, and first and second polarizing plates provided on the outer surfaces of the first and second substrates, respectively. A method of manufacturing a liquid crystal display device comprising: manufacturing a first substrate comprises: forming a gate line and a storage capacitor line on an insulating substrate; Forming a gate insulating film to cover the gate line and the storage capacitor line; Forming a plurality of data lines defining the pixel by insulating crossing with the gate line on the insulating layer, wherein at least a portion of the storage capacitor line is the polarization of the first portion and the second polarizing plate substantially parallel to the polarization direction of the first polarizing plate. It is achieved by a method for manufacturing a liquid crystal display device, characterized in that provided in a zigzag shape comprising a second portion substantially parallel to the direction.

Here, the storage capacitor line is a first sub storage capacitor line extending along one data line and a second sub storage branch extending from the first sub storage capacitor line and extending toward the other data line spaced apart from one data line. A fourth sub storage capacitor line extending from one end of the capacitance line and the second sub storage capacitor line along the other data line and a fourth sub storage capacitor line extending from one end of the third sub storage capacitor line and connected to an end of the first sub storage capacitor line; It includes a sub storage capacity line, the first sub storage capacity line and the third sub storage capacity line may be formed to have a zigzag shape.

The manufacturing of the first substrate may further include forming a pixel electrode on the gate line, the storage capacitor line, and the data line, wherein the pixel electrode may include a pixel electrode incision pattern corresponding to the second sub storage capacitor line. It may include.

The manufacturing of the second substrate may include forming a common electrode, wherein the common electrode is branched from the first common electrode cutting pattern and the first common electrode cutting pattern corresponding to the fourth sub storage capacitor line. It may include a second common electrode incision pattern extending along the and the third common electrode incision pattern disposed in parallel with the first common electrode incision pattern with the pixel electrode incision pattern therebetween.

Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings. In the following, a film is formed (located) on top of another film, not only when the two films are in contact with each other but also between the two films. It also includes the case where it exists.

1 is a view illustrating a common electrode on a thin film transistor substrate according to an embodiment of the present invention, FIG. 2 is a cross-sectional view of a liquid crystal display device according to II-II of FIG. 1, and FIG. FIG. 1 is a diagram illustrating a shape of a storage capacity line according to an exemplary embodiment. FIG.

The liquid crystal display according to the exemplary embodiment of the present invention includes a thin film transistor substrate (first substrate) 100, a color filter substrate facing the substrate (second substrate, 200), and a liquid crystal layer 300 disposed therebetween. do.

First, the first substrate 100 will be described as follows.

Gate wirings 121 and 122 are formed on the first insulating substrate 111. The gate lines 121 and 122 may be a metal single layer or multiple layers. The gate lines 121 and 122 include a gate line 121 extending in the horizontal direction and a gate electrode 122 extending in width from the gate line 121.

The storage capacitor lines 123, 124, 125, and 126 are formed on the same layer as the gate lines 121 and 122 on the first insulating substrate 111. Storage capacity lines 123, 124, 125, and 126 according to the present invention are the first sub storage capacity line 123, the second sub storage capacity line 124, the third sub storage capacity line 125 and the fourth sub Storage capacity line 126. Here, the storage capacitor lines 123, 124, 125, and 126 overlap the pixel electrode 160 to form a storage capacitor. In addition, it may also serve to shield the visibility of unwanted texture generated by an electric field formed between the data lines 141a and 141b and the pixel electrode 160. The storage lines 123, 124, 125, and 126 may be a metal single layer or multiple layers.

The first sub storage capacitor line 123 extends along the data line 141a in contact with one side of the pixel electrode 160. In addition, at least a portion of the first sub storage capacitor line 123 may have a polarization direction between the first portion (a, FIG. 3) and the second polarization plate 260 substantially parallel to the polarization direction of the first polarization plate 180. It is provided in the zigzag shape containing the 2nd part (b, FIG. 3) substantially parallel. Here, the first portion (a) and the second portion (b) shown in Figure 3 is provided to be substantially orthogonal, which is provided so that the polarization direction of the first polarizing plate 180 and the second polarizing plate 260 is substantially orthogonal. Because there is. As a result, the visibility of the texture generated at the side of the pixel electrode 160 may be shielded by the electric field formed between the data line 141a and the pixel electrode 160. At the same time, light leakage caused by the step formed by the first sub storage capacitor line 123 may be minimized. The principle of minimizing light leakage by providing the first portion (a, FIG. 3) and the second portion (b, FIG. 3) will be described later.

The second sub storage capacitor line 124 extends toward the data line 141a which is branched from the first sub storage capacitor line 123 and is in contact with the other side of the pixel electrode 160. In addition, the pixel electrode cutting pattern 172 is provided. In this case, the fringe field may become stronger due to the influence of the second sub storage capacitor line 124. In addition, the second sub storage capacitor line 124 may be provided to overlap the pixel electrode 160. In this case, the storage capacitor may be formed.

The third sub storage capacitor line 125 extends along the data line 141b at one end of the second sub storage capacitor line 124. In addition, the third sub storage capacitor line 125 is substantially parallel to the polarization direction of the first portion (a, FIG. 3) and the second polarization plate 260 substantially parallel to the polarization direction of the first polarizing plate 180. It is provided in the zigzag shape containing one 2nd part (b, FIG. 3). Here, the first part a and the second part b shown in FIG. 3 are provided to be substantially orthogonal. As a result, the visibility of the texture generated at the side of the pixel electrode 160 can be shielded by the electric field formed between the data line 141b and the pixel electrode 160. At the same time, light leakage caused by the step formed by the third sub storage capacitor line 125 may be minimized. The principle of minimizing light leakage by providing the first portion (a, FIG. 3) and the second portion (b, FIG. 3) will be described later.

The fourth sub storage capacitor line 126 extends from one end of the third sub storage capacitor line 125 and is connected to an end portion of the first sub storage capacitor line 123. In addition, the fourth sub storage capacitor line 126 is formed at a position corresponding to the first common electrode incision pattern 251.

Of course, the shape of the storage capacitor lines 123, 124, 125, and 126 is not limited to the above embodiment, and may be variously provided according to a design need.

The gate insulating layer 131 covers the gate lines 121 and 122 and the storage capacitor lines 123, 124, 125, and 126. Here, the gate insulating film 131 is preferably made of silicon nitride (SiNx) or the like.

The semiconductor layer 132 is formed on the gate insulating layer 131 of the gate electrode 122. Here, the semiconductor layer 132 is preferably made of a semiconductor such as amorphous silicon.

The ohmic contact layer 133 is formed on the semiconductor layer 132, and the ohmic contact layer 133 is removed from the channel portion between the source electrode 142 and the drain electrode 143. Here, the ohmic contact layer 133 is preferably made of a material such as n + hydrogenated amorphous silicon in which silicide or n-type impurities are heavily doped.

The data wirings 141a, 141b, 142, and 143 are formed on the gate insulating layer 131 and the ohmic contact layer 133. The data wires 141a, 141b, 142, and 143 may be a single layer or multiple layers of a metal layer.

In addition, the data lines 141a, 141b, 142, and 143 are branches of the data line 141b and the data line 141b which are formed in the vertical direction and cross the gate line 121 to form pixels. Source electrode portion 142 and source electrode portion 142 extending to the upper portion of the drain electrode portion 143 formed on the upper side of the ohmic contact layer 133 opposite the source electrode portion 142 Include.

The passivation layer 151 is formed on the data wirings 141a, 141b, 142, and 143 and the semiconductor layer 132 that is not covered. In the passivation layer 151, a contact hole 171 exposing the drain electrode part 143 is formed.

The pixel electrode 160 is formed on the passivation layer 151 and is electrically connected to the drain electrode part 143 through the contact hole 171. The pixel electrode 160 is generally made of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). In addition, the pixel electrode incision pattern 172 is formed at a position corresponding to the second sub storage capacitor line 124 in the pixel electrode 160. Here, the pixel electrode cut pattern 172 may be formed in various sizes and shapes at various positions in the pixel electrode 160 region.

The first polarizer 180 is attached to the outer surface of the first substrate 100. The first polarizer 180 is provided to have a polarization direction orthogonal to the polarization direction of the second polarizer 260. When the liquid crystal layer 300 is in VA (vertically aligned) mode, the liquid crystal layer 300 is in a normally black state in which light of the backlight is not transmitted when no image signal is applied. The second polarizing plate 260 may be made by adding iodine to a polymer film made of polyvinyl alcohol (PVA).

Hereinafter, a principle of minimizing light leakage by a pattern of the first sub storage capacitor line 123 and the third sub storage capacitor line 125 according to an embodiment of the present invention will be described with reference to FIGS. 1 and 3. .

An example will be described when the liquid crystal display according to the present invention is in a normally black state in which light of a backlight is not transmitted in a state in which an image signal is not applied in VA mode.

As shown in FIG. 1, at least part of the shape of the first sub storage capacitor line 123 and the third sub storage capacitor line 125 is an area where the data lines 141a and 141b and the pixel electrode 160 contact each other. Is formed in a zigzag shape.

3, the first portion a of the third sub storage capacitor line 125 substantially coincides with the polarization direction of the first polarizing plate 180. The two portions b are formed to substantially match the polarization direction of the second polarizing plate 260.

This is to cause the liquid crystal to lie in the same direction as the polarization direction of the first and second polarizing plates 180 and 260 due to the zigzag shapes of the first and second sub storage capacitor lines 123 and 125. .

Specifically, the liquid crystal is laid down in the same direction as the polarization direction of the second polarizing plate 260 by the step of the pixel electrode 160 formed by the first portion a, and by the second portion b. The liquid crystal is laid down in the same direction as the polarization direction of the first polarizing plate 180. The reason why the direction of the liquid crystal is changed according to the shapes of the first sub storage capacitor line 123 and the third sub storage capacitor line 125 is that the shape of the surface of the step formed in the pixel electrode 160 according to the shape is geometry. This is because the arrangement of the liquid crystals varies depending on the surface shape of the step.

If so, the following description will be made as to how the liquid crystal is laid down in the same direction as the polarization direction of the first and second polarizing plates 180 and 260 and that light leakage is minimized.

The light of the backlight having passed through the first polarizing plate 180 is transmitted in a direction of approximately 45 ° to the lying direction of the liquid crystal. Therefore, the direction of the liquid crystal formed by the first portion (a) coincides with the polarization direction of the second polarizing plate 260, and the light passing through the liquid crystal forms approximately 45 ° with the polarization direction of the second polarizing plate 260. And is absorbed by the second polarizing plate 260. The direction of the liquid crystal formed by the second portion (b) coincides with the polarization direction of the first polarizing plate 260, and the light passing through the liquid crystal forms approximately 45 ° with the polarization direction of the second polarizing plate 260. And is absorbed by the second polarizing plate 260. By this principle, light leakage can be minimized.

Next, the second substrate 200 will be described.

The black matrix 221 is formed on the second insulating substrate 211. The black matrix 221 generally distinguishes between red, green, and blue filters, and serves to block direct light irradiation to the thin film transistor positioned on the first substrate 100. The black matrix 221 is usually made of a photosensitive organic material to which black pigment is added. As the black pigment, carbon black or titanium oxide is used.

The color filter layer 231 is formed by repeating the red, green, and blue filters with the black matrix 221 as the boundary. The color filter layer 231 serves to impart color to light emitted from the backlight unit (not shown) and passed through the liquid crystal layer 300. The color filter layer 231 is usually made of a photosensitive organic material.

An overcoat layer 241 is formed on the black matrix 221 which is not covered by the color filter layer 231 and the color filter layer 231. The overcoat layer 241 serves to protect the color filter layer 231 while planarizing the color filter layer 231, and an acrylic epoxy material is generally used.

The common electrode 250 is formed on the overcoat layer 241. The common electrode 251 is made of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). The common electrode 250 directly applies a voltage to the liquid crystal layer 300 together with the pixel electrode 160 of the thin film transistor substrate. Common electrode cutout patterns 251, 252, and 253 are formed on the common electrode 250. The common electrode cutout patterns 251, 252, and 253 divide the liquid crystal layer 300 into a plurality of regions together with the pixel electrode cutout pattern 172 of the pixel electrode 160.

The common electrode cutting patterns 251, 252, and 253 include a first common electrode cutting pattern 251, a second common electrode cutting pattern 252, and a third common electrode cutting pattern 253. The first common electrode incision pattern 251 is formed to correspond to the fourth sub storage capacitor line 126, and the second common electrode incision pattern 252 is branched from the first common electrode incision pattern 251 to be a data line. The third common electrode cutout pattern 253 may be formed to be parallel to the first common electrode cutout pattern 251 with the pixel electrode cutout pattern 172 therebetween. have. Here, unlike illustrated, the common electrode cut patterns 251, 252, and 253 may be formed in various shapes.

The second polarizing plate 260 is attached to the outer surface of the second substrate 200. The second polarizer 260 is provided to have a polarization direction orthogonal to the polarization direction of the first polarizer 180. When the liquid crystal layer 300 is in the VA mode, the liquid crystal layer 300 is in a normally black state in which light of the backlight is not transmitted while the image signal is not applied. The second polarizing plate 260 may be made by adding iodine to a polymer film made of polyvinyl alcohol (PVA).

The liquid crystal layer 300 is positioned between the first substrate 100 and the second substrate 200. The liquid crystal layer 300 is preferably provided in VA mode.

Hereinafter, a method of manufacturing the first substrate 100 according to an embodiment of the present invention will be described with reference to FIGS. 4A to 6B.

First, as shown in FIGS. 4A and 4B, a gate wiring material is deposited on the first insulating substrate 111, and then patterned by a photolithography process using a mask to form a gate line 121, a gate electrode 122, and a storage capacitor line ( 123, 124, 125, and 126.

Here, at least a portion of the storage capacitor lines 123, 124, 125, and 126 may be formed by the first portion (a, FIG. 3) and the second polarizing plate 260 substantially parallel to the polarization direction of the first polarizing plate 180. It is preferable to have a zigzag shape including a second portion (b, see Fig. 3) substantially parallel to the polarization direction.

In addition, the storage capacitor lines 123, 124, 125, and 126 are branched from the first sub storage capacitor line 123 and the first sub storage capacitor line 123 that extend along the data line 141a, and thus the data line 141a. Second sub storage capacitor line 124 extending toward the data line 141b spaced apart from the second sub storage capacitor line 124 and the third sub storage extending along the data line 141b at one end of the second sub storage capacitor line 124. And a fourth sub storage capacitor line 126 extending from one end of the capacitor line 125 and the third sub storage capacitor line 125 and connected to an end of the first sub storage capacitor line 123. Here, at least a portion of the first sub storage capacitor line 123 and the third sub storage capacitor line 125 may be formed to have the zigzag shape mentioned above.

Next, as in FIGS. 5A and 5B, three layers of the gate insulating film 131, the semiconductor layer 132, and the resistance contact layer 133 are sequentially stacked. The semiconductor layer 132 and the ohmic contact layer 133 are photo-etched to form an island-like semiconductor layer 132 and an ohmic contact layer 133 on the gate insulating layer 131 on the gate electrode 122.

Next, as shown in FIGS. 5A and 5B, the data line material is deposited and patterned by a photolithography process using a mask to intersect the data lines 141a and 141b and the data lines 141a and 141b crossing the gate line 121. Data lines 141a, 141b, 142, and 143 connected to the source electrode part 142 extending to an upper portion of the gate electrode 122 and the drain electrode part 143 facing the gate electrode 122 are formed. The data lines 141a and 141b may be formed along the first sub storage capacitor line 123 and the third sub storage capacitor line 125.

Next, as shown in FIGS. 5A and 5B, the ohmic contact layer 133 not covered by the data lines 141a, 141b, 142, and 143 is etched to separate the semiconductor layer 132 from the gate electrode 122. ).

Next, the protective film 151 is formed as shown in FIGS. 6A and 6B. The passivation layer 151 is formed by a plasma enhanced chemical vapor deposition (PECVD) method using a silicon source gas and a nitrogen source gas. A contact hole 171 exposing the drain electrode part 143 is formed in the passivation layer 151.

Next, as illustrated in FIGS. 6A and 6B, the pixel electrode 160 separated by the pixel electrode cut pattern 172 is formed. The pixel electrode cut pattern 172 may be formed to correspond to the second sub storage capacitor line 124.

The second substrate 200 may be manufactured by a known method, which will be described below with reference to FIGS. 1 and 2.

First, the common electrode cutting patterns 251, 252, and 253 are formed in the formation of the common electrode 250. The common electrode cutting patterns 251, 252, and 253 may include a first common electrode cutting pattern 251, a second common electrode cutting pattern 252, and a third common electrode cutting pattern 253. The first common electrode cutout pattern 251 is formed to correspond to the fourth sub storage capacitor lines 123, 124, 125, and 126, and the second common electrode cutout pattern 252 is the first common electrode cutout pattern 251. The third common electrode cutout pattern 253 is formed by branching from the first common electrode cutout pattern 251 with the pixel electrode cutout pattern 172 interposed therebetween. It may be formed side by side.

Next, when the first substrate 100 and the second substrate 200 are disposed to face each other and the liquid crystal layer 300 is injected, the liquid crystal display device is completed.

As described above, according to the present invention, by adjusting the surface geometry (Geometry) of the storage capacitor line in conjunction with the polarization direction of the polarizing plate it is possible to minimize the light leakage caused by the wiring step of the storage capacitor line.

Claims (11)

A liquid crystal comprising a first substrate, a second substrate, a liquid crystal layer positioned between the first substrate and the second substrate, and first and second polarizing plates provided on outer surfaces of the first substrate and the second substrate, respectively. In the display device, The first substrate includes a gate line and a storage capacitor line formed on the same layer as the gate line. At least a portion of the storage capacitance line is provided in a zigzag shape including a first portion substantially parallel to the polarization direction of the first polarizing plate and a second portion substantially parallel to the polarization direction of the second polarizing plate. LCD display device. The method of claim 1, The first substrate further includes a plurality of data lines insulated from and intersecting the gate lines to define pixels. The storage capacitor line may include a first sub storage capacitor line extending along the data line on one side and a second sub storage capacitor line extending toward the data line on the other side spaced apart from the data line on one side. A second sub storage capacitor line extending from the one end of the second sub storage capacitor line and the third sub storage capacitor line extending from the one end of the third sub storage capacitor line to the other data line; And a fourth sub storage capacitor line connected to the end portion. The method of claim 2, And at least a portion of the first sub storage capacitor line and the third sub storage capacitor line are provided in a zigzag shape. The method of claim 3, And the first portion and the second portion are substantially orthogonal to each other. The method of claim 3, The first substrate further includes a thin film transistor provided at an intersection region of the gate line and the data line, and a pixel electrode connected to the thin film transistor and formed on the gate line, the storage capacitor line, and the data line. , And a pixel electrode incision pattern corresponding to the second sub storage capacitor line is formed in the pixel electrode. The method of claim 5, The second substrate includes a common electrode, And a first common electrode incision pattern corresponding to the fourth sub storage capacitor line. The method of claim 6, The common electrode is disposed in parallel with the first common electrode incision pattern, wherein the second common electrode incision pattern is branched from the first common electrode incision pattern and extends along the data line, and the pixel electrode incision pattern is interposed therebetween. And a third common electrode incision pattern further formed therein. A liquid crystal comprising a first substrate, a second substrate, a liquid crystal layer positioned between the first substrate and the second substrate, and first and second polarizing plates provided on outer surfaces of the first substrate and the second substrate, respectively. In the manufacturing method of the display device, The step of manufacturing the first substrate, Forming a gate line and a storage capacitor line on the insulating substrate; Forming a gate insulating film to cover the gate line and the storage capacitor line; Forming a plurality of data lines on the insulating layer to insulate the gate lines to define pixels; At least a portion of the storage capacitance line is provided in a zigzag shape including a first portion substantially parallel to the polarization direction of the first polarizing plate and a second portion substantially parallel to the polarization direction of the second polarizing plate. Manufacturing method of liquid crystal display device. The method of claim 8, The storage capacitor line may include a first sub storage capacitor line extending along the data line on one side and a second sub storage capacitor line extending toward the data line on the other side spaced apart from the data line on one side. A second sub storage capacitor line extending from the one end of the second sub storage capacitor line and the third sub storage capacitor line extending from the one end of the third sub storage capacitor line to the other data line; A fourth sub storage capacity line connected to the end portion; And the first sub storage capacitor line and the third sub storage capacitor line are formed to have the zigzag shape. The method of claim 9, The step of manufacturing the first substrate, Forming a pixel electrode on the gate line, the storage capacitor line, and the data line; And the pixel electrode includes a pixel electrode incision pattern corresponding to the second sub storage capacitor line. The method of claim 10, The manufacturing of the second substrate may include forming a common electrode. The common electrode may include a first common electrode incision pattern corresponding to the fourth sub storage capacitor line, a second common electrode incision pattern extending from the first common electrode incision pattern along the data line, and the pixel electrode incision. And a third common electrode incision pattern disposed side by side with the first common electrode incision pattern with a pattern therebetween.

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