KR20070106354A - Digital broadcasting system and processing method - Google Patents

Abstract

A digital broadcasting system and a digital broadcasting processing method are provided to improve the receiving performance of a signal receiver by performing an additive encoding process on enhanced data. The first encoding unit performs the first encoding process on enhanced data having information. A randomizer(122) performs a randomizing process on the firstly encoded enhanced data. The second encoding unit performs the second encoding process on the randomized enhanced data. A group formatter(114) and a deinterleaver(115) form an enhanced data group including plural packets, insert the secondly encoded enhanced data into a corresponding region within the enhanced data group, and then perform a deinterleaving process on the enhanced data group. A packet multiplexing unit(121) multiplexes the deinterleaved enhanced data and main data, and transmits the multiplexed data.

Description

Digital broadcasting system and processing method

1 is a block diagram of a digital broadcast transmission system according to a first embodiment of the present invention.

2A and 2B are block diagrams illustrating exemplary embodiments of the E-VSB block processor of FIG. 1.

3A and 3B are block diagrams illustrating embodiments of a symbol encoder according to the present invention.

4A and 4B are diagrams showing an example of data configuration before and after the data deinterleaver in the digital broadcast transmission system according to the present invention.

5 is a block diagram of a digital broadcast transmission system according to a second embodiment of the present invention.

6A and 6B are block diagrams illustrating embodiments of the E-VSB block processor of FIG. 5.

7 is a block diagram showing an embodiment of a digital broadcast receiving system according to the present invention;

Explanation of symbols for main parts of the drawings

110: E-VSB preprocessor 111: RS frame encoder

112: E-VSB renderer 113: E-VSB block processing unit

114: group formatter 115: data deinterleaver

116: packet formatter 121: packet multiplexer

122: data randomizer 123: RS encoder / unstructured RS encoder

124: data interleaver 125: parity substituent

126: unstructured RS coder 127: trellis encoder

128: frame multiplexer 130: transmitter

TECHNICAL FIELD The present invention relates to digital broadcasting systems, and more particularly, to a method for transmitting and receiving digital broadcasting.

The 8T-VSB (Vestigial Sideband) transmission system, which is adopted as a digital broadcasting standard in North America and Korea, is a system developed for transmission of MPEG video / audio data. However, with the rapid development of digital signal processing technology and the widespread use of the Internet, digital home appliances, computers, and the Internet are being integrated into one big framework. Therefore, in order to meet various needs of users, it is necessary to develop a system capable of transmitting various additional data in addition to video / audio data through a digital broadcasting channel.

Some users of supplementary data broadcasting are expected to use supplementary data broadcasting by using PC card or portable device equipped with simple indoor antenna. Due to the effects of ghosts and noise caused by reflected waves, broadcast reception performance may deteriorate. However, unlike general video / audio data, the additional data transmission should have a lower error rate. In the case of video / audio data, errors that the human eye and ears cannot detect are not a problem, while in the case of additional data (eg program executables, stock information, etc.), a bit error may cause serious problems. It can cause problems. therefore There is a need to develop a system that is more resistant to ghosting and noise in the channel.

The transmission of additional data will usually be done in a time division manner over the same channel as the MPEG video / sound. Since the beginning of digital broadcasting, however, ATSC VSB digital broadcasting receivers that receive only MPEG video / audio have been widely used in the market. Therefore, additional data transmitted on the same channel as MPEG video / audio should not affect the existing ATSC VSB-only receivers that have been used in the market. Such a situation is defined as ATSC VSB compatible, and the additional data broadcasting system should be compatible with the ATSC VSB system. The additional data may also be referred to as enhanced data or E-VSB data.

In addition, in a poor channel environment, the reception performance of the conventional ATSC VSB receiving system may be degraded. Especially in the case of portable and mobile receivers, robustness against channel changes and noise is required.

Accordingly, an object of the present invention is to provide a new digital broadcasting system and processing method suitable for additional data transmission and resistant to noise.

Another object of the present invention is to provide a digital broadcasting system and a processing method for improving reception performance of a receiver by performing additional encoding on enhanced data and transmitting the same.

Another object of the present invention is to provide a digital broadcasting system and a processing method for improving reception performance of a receiver by multiplexing known data and enhanced data known to the transmitting / receiving side with main data.

In order to achieve the above object, a transmission method according to an embodiment of the present invention, the step of performing a first encoding on the enhanced data having information; Performing a second encoding on the first encoded enhanced data; And multiplexing and transmitting the encoded enhanced data and main data.

The first encoding step may include at least one of error correction encoding, error detection encoding, and row mixing.

The first encoding step includes forming a frame for error correction by collecting K (K is a natural number) rows of A (A is a natural number) enhanced data bytes having information; Performing error correction encoding on the frame; Collecting G (G is a natural number) of the error correcting encoded frames to form a frame group, and performing row mixing on a frame group basis; And performing error detection encoding on the rows of the frames on which the row mixing is performed.

In the second encoding step, encoding is performed at an M / N (M <N) code rate.

The multiplexing may include dividing and transmitting an enhanced data burst section and a main data section; Transmitting at least one enhanced data group in the enhanced data burst period; And transmitting only a main data packet in the main data section.

A transmission method according to another embodiment of the present invention includes: performing first encoding on enhanced data having information; Performing randomizing on the first encoded enhanced data; Performing a second encoding on the rendered enhanced data; Forming an enhanced data group including a plurality of packets, inserting second encoded enhanced data into a corresponding region of the enhanced data group, and then performing deinterleaving; And multiplexing the deinterleaved enhanced data with main data to transmit the deinterleaved enhanced data.

The second encoding step is characterized by converting an input enhanced data byte in units of bits and encoding each bit at an M / N code rate.

A transmission method according to another embodiment of the present invention includes: performing first encoding on enhanced data having information; Performing randomization and byte expansion on the first encoded enhanced data; Forming an enhanced data group including a plurality of packets, and inserting enhanced and byte extended enhanced data into a corresponding region of the enhanced data group; Performing deinterleaving after performing second encoding on the enhanced data of the data insertion step; And multiplexing the deinterleaved enhanced data with main data to transmit the deinterleaved enhanced data.

In the second encoding step, the input enhanced data byte is converted into a symbol, and encoding is performed at M / N code rate only for valid data bits among the converted symbols.

According to an embodiment of the present invention, a transmission system includes: a first encoder configured to perform first encoding on enhanced data having information; A randomizer for performing randomization on the first encoded enhanced data; A second encoder which performs a second encoding on the rendered enhanced data; A group formatter / deinterleaver for forming an enhanced data group including a plurality of packets, inserting second encoded enhanced data into a corresponding region in the enhanced data group, and performing deinterleaving; And a packet multiplexer for multiplexing and transmitting the deinterleaved enhanced data with main data.

According to another embodiment of the present invention, a transmission system includes: a first encoder configured to perform first encoding on enhanced data having information; A randomizer / byte expander for performing randomization and byte expansion on the first encoded enhanced data; A group formatter for forming an enhanced data group including a plurality of packets and inserting enhanced and byte extended enhanced data into a corresponding region of the enhanced data group; A second encoding / deinterleaver for performing deinterleaving after performing second encoding on the enhanced data output from the group formatter; And multiplexing the deinterleaved enhanced data with main data to transmit the deinterleaved enhanced data.

The reception method according to the present invention includes: performing trellis decoding and M / N (M <N) decoding when the demodulated data is enhanced data; Performing de-randing on the enhanced data on which the decoding has been performed; And performing at least one of error detection decoding, inverse row mixing, and error correction decoding on the de-randomized data.

The reception system according to the present invention includes a block decoder for performing trellis decoding and M / N (M <N) decoding when the demodulated data is enhanced data; A data deformatter for performing de-randomizing on the decoded enhanced data; And a frame decoder configured to perform at least one of error detection decoding, inverse row mixing, and error correction decoding on the de-randomized data.

Other objects, features and advantages of the present invention will become apparent from the following detailed description of embodiments taken in conjunction with the accompanying drawings.

Hereinafter, with reference to the accompanying drawings, preferred embodiments of the present invention that can specifically realize the above object will be described. At this time, the configuration and operation of the present invention shown in the drawings and described by it will be described as at least one embodiment, by which the technical spirit of the present invention and its core configuration and operation is not limited. .

In addition, in the drawings of the embodiments of the present invention, those having substantially the same configuration and function as those in the above-described drawings will use the same reference numerals. It should be noted that in the following description, only parts necessary for understanding the operation according to the present invention will be described, and descriptions of other parts will be omitted so as not to obscure the subject matter of the present invention.

In addition, the terminology used in the present invention is a general term that is currently widely used as much as possible, but in certain cases, the term is arbitrarily selected by the applicant. In this case, since the meaning is described in detail in the description of the present invention, It is intended that the present invention be understood as the meaning of the term rather than the name.

In the present invention, the enhanced data may be data having information such as a program execution file, stock information, or the like, or may be video / audio data. Known data is data known in advance by an appointment of the transmitting / receiving side. In addition, the main data is data that can be received by the existing receiving system, and includes video / audio data.

According to the present invention, additional encoding is performed on the enhanced data and then multiplexed with the main data to be transmitted, thereby providing robustness to the enhanced data and strongly responding to a rapidly changing channel environment.

The present invention will be described by dividing the encoding process into the first and second embodiments.

First embodiment

1 is a block diagram of a digital broadcast transmission system according to a first embodiment of the present invention.

The digital broadcast transmission system of FIG. 1 includes an E-VSB preprocessor 110, a packet multiplexer 121, a data randomizer 122, an RS encoder / Non-systematic RS. Encoder 123, data interleaver 124, parity substituent 125, unstructured RS encoder 126, trellis encoder 127, frame multiplexer 128, and transmitter 130 It is composed.

The E-VSB preprocessor 110 may include an RS frame encoder 111, an E-VSB renderer 112, an E-VSB block processor 113, a group formatter 114, a data deinterleaver 115, and a packet formatter. And 116.

In the present invention configured as described above, the main data is input to the packet multiplexer 121, and the enhanced data is transmitted to the E-VSB preprocessor 110 for performing additional encoding to quickly and powerfully respond to noise and channel changes. Is entered.

The RS frame encoder 111 of the E-VSB preprocessor 110 receives the enhanced data, constructs a frame for further encoding, performs encoding, and outputs the encoded frame to the E-VSB renderer 112. do.

In one embodiment, the RS frame encoder 111 performs robustness on the data by performing at least one of error correction encoding and error detection encoding on the input enhanced data. In addition, the RS frame encoder 111 includes a process of mixing enhanced data of a predetermined size in order to cope with an extremely poor and rapidly changing propagation environment by distracting a cluster error that may occur due to the propagation environment change. .

In one embodiment, the RS frame encoder 111 performs error correction encoding on the input enhanced data, adds data for error correction, and mixes them in row units. After performing the step 1), error detection encoding is performed to add data for error detection.

In this case, the error correction coding is applied with RS coding, and the error detection coding is applied with cyclic redundancy check (CRC) coding. Parity data to be used for error correction is generated when the RS encoding is performed, and CRC data to be used for error detection is generated when CRC encoding is performed.

That is, the RS frame encoder 111 divides the input enhanced data into units of a predetermined length (A), collects a plurality of divided pieces of enhanced data of a predetermined length (A), configures an RS frame, and then configures the RS frame. RS coding is performed in at least one of a row and a column direction.

In the present invention, the predetermined length (A) unit is called a row for convenience of description, and the A value is determined by the system designer.

For example, if the input enhanced data is an MPEG transport stream (TS) packet composed of 188 byte units, the first MPEG sync byte is removed to form a row A of 187 bytes. The reason for removing the MPEG sync byte is that all enhanced packets have the same value.

If there is no fixed one byte that can be removed from the input enhanced data, or if the length of the input packet is not 187 bytes, the input data is divided into 187 byte units, and a row is divided into 187 bytes. .

The RS frame is configured by collecting a plurality of rows formed by the above process.

According to the present invention, parity bytes are added by performing RS encoding in units of RS frames, and row mixing is performed on RS frames to which parity bytes are added.

In an embodiment, a plurality of RS-coded RS frames are collected to form an RS frame group, and a row mixing process is performed in units of RS frame groups.

That is, row blending is performed to place the i th row of the RS frame group on the j th row of the RS frame group.

This relationship between i and j can be seen through Equation 1 below.

Here, G is the number of RS frames included in the RS frame group, and S is the sum of the number of rows in the RS frame before RS coding and the parity generated by RS coding.

After the row mixing is performed, CRC encoding is performed on the data on which the row mixing is performed to add a CRC checksum. The CRC checksum is used to indicate whether enhanced data is corrupted by an error while being transmitted through the channel.

The present invention may use other error detection encoding methods in addition to CRC encoding, or may increase the overall error correction capability at the receiving end by using an error correction encoding method.

The CRC coded data as described above is output to the E-VSB randomizer 112.

The E-VSB renderer 112 receives the enhanced data having increased robustness through encoding and row mixing and renders it to the E-VSB block processor 113. In this case, by performing the randomization on the enhanced data in the E-VSB renderer 112, the later stager may omit the rendering process for the enhanced data. The enhanced data generator may use the same as the conventional ATSC's renderer, or may use another renderer. For example, the input 187 bytes of enhanced data may be randomized using pseudo random bytes generated internally.

The E-VSB block processor 113 encodes the enhanced data at M / N code rate and outputs the encoded data. For example, if 1 bit of enhanced data is encoded into 2 bits and outputted, M = 1 and N = 2. If 1 bit of enhanced data is encoded into 4 bits and outputted, M = 1 and N = 4.

2A and 2B are block diagrams illustrating embodiments of the E-VSB block processor 113.

2A comprises a byte-to-bit converter 311, a symbol encoder 312, a symbol interleaver 313, and a symbol-byte converter 314 and has a half code rate and a quarter code rate. Can be.

That is, the byte-bit converter 311 divides the enhanced data byte input by one bit and outputs it to the symbol encoder 312. The symbol encoder 312 encodes the input enhanced data bit into a 2-bit symbol and outputs it to the symbol interleaver 313. In this case, the symbol encoder 312 operates as an encoder having a 1/2 code rate.

Meanwhile, in order to operate the symbol encoder 312 as a symbol encoder having a quarter code rate, a symbol encoded at a half code rate is repeated to output two symbols, or two input data bits are set at a half code rate. There is a method of outputting two symbols by encoding once.

The 1/2 code rate and the 1/4 code rate are one embodiment, and since the code rate may vary depending on the number of times of repetition, the present invention will not be limited to the above-described embodiment.

The symbol interleaver 313 receives the output symbols of the symbol encoder 312 and performs block interleaving on a symbol basis, and then outputs them to the symbol-byte converter 314. The symbol-byte converter 314 converts the output symbols of the symbol interleaver 313 in byte units and outputs them to the group formatter 114.

2B comprises a byte-to-bit converter 351, a symbol encoder 352, a parallel / serial converter 353, a symbol interleaver 354, and a symbol-byte converter 355, with a 1/2 code rate. And 1/4 code rate.

That is, the byte-bit converter 351 divides the enhanced data byte input by one bit and outputs it to the symbol encoder 352. The symbol encoder 352 encodes the input enhanced data bit into four bits, that is, two symbols, and outputs the same to the parallel / serial converter 353. In this case, the symbol encoder 352 operates as an encoder having a quarter code rate.

The parallel / serial converter 353 converts two symbols input in parallel into a series of symbols and outputs the two symbols sequentially to the symbol interleaver 354.

Meanwhile, if only one symbol of two symbols encoded by the symbol encoder 352 is selected and output, the symbol encoder 352 operates as an encoder having a 1/2 code rate. At this time, since the output is in symbol units, the output symbol is inputted to the symbol interleaver 354 by bypassing the parallel / serial converter 353 at a later stage.

In addition, if the symbol coder 312 repeatedly outputs two symbols encoded at a 1/2 code rate, or encodes and outputs an input data bit twice at a 1/2 code rate, the overall code rate is 1/4. The correction ability can be further improved. However, the smaller the code rate, the smaller the actual amount of data that can be transmitted. Therefore, the code rate must be determined in consideration of two factors.

The 1/2 code rate and the 1/4 code rate are one embodiment, and since the code rate may vary depending on the number of times the coded symbols are selected or repeated, the present invention will not be limited to the above-described embodiment.

The symbol interleaver 354 rearranges the order of symbols output from the parallel / serial converter 353 by performing block interleaving on a symbol-by-symbol basis and outputs the order of the symbols to the symbol-byte converter 355. The symbol-byte converter 355 converts the output symbols of the symbol interleaver 354 in byte units and outputs them to the group formatter 114.

3A and 3B are block diagrams illustrating embodiments of the symbol encoder of FIGS. 2A and 2B.

The symbol encoder of FIG. 3A is composed of two memories and one adder, and has four memory states (ie, 00, 01, 10, 11).

It can be seen that the symbol encoder of FIG. 3A encodes the enhanced data bit U to be input and outputs the two bits C1 and C2. At this time, the enhanced data bit U is output as it is as the output upper bit C1 and simultaneously encoded and output as the output lower bit C2. Therefore, the symbol encoder of FIG. 3A can be operated as a 1/2 encoder.

In order to operate the symbol encoder of FIG. 3A as a quarter encoder, an enhanced data bit U may be encoded to generate an output bit C1C2, and the output bit C1C2 may be repeated to output the final output bit C1C2C1C2. As another example, the final output bit C1C2C1C2 may be output by encoding the enhanced data bit U twice at a 1/2 code rate.

It can be seen that the symbol encoder of FIG. 3B is composed of three memories and four adders, and encodes the input enhanced data bits U and outputs them as 4 bits C1 to C4. In this case, the enhanced data bit U is output as it is as the output most significant bit C1 and simultaneously encoded and output as the output lower bit C2C3C4. Therefore, the symbol encoder of FIG. 3B can be operated as a quarter encoder.

In order to operate the symbol encoder of FIG. 3B as a 1/2 encoder, an enhanced data bit U may be encoded to generate an output bit C1C2C3C4, and only two bits, that is, one symbol may be selected and output.

The group formatter 114 forms an enhanced data group according to a predefined rule, and inserts the enhanced data input in a corresponding region in the formed enhanced data group.

In this case, the enhanced data group may be divided into at least one or more layered areas, and the type of enhanced data allocated to each area may vary according to characteristics of each layered area.

FIG. 4A shows the data type of the enhanced data group before data deinterleaving, and FIG. 4B shows the data type of the enhanced data group after data deinterleaving.

In other words, FIG. 4A is a form of data after data interleaving, and FIG. 4B is a form of data before data interleaving.

FIG. 4A illustrates an example of dividing an enhanced data group into three layered areas, that is, a head, a body, and a tail area in a data configuration before data deinterleaving. As a result, the first output part is the head, the middle output part is the body, and the last output part is the tail, based on the enhanced data group that is data interleaved and output.

4A and 4B show an example in which 260 packets form an enhanced data group. This shows that the data interleaver operates periodically in units of 52 packets so that five multiples of 52 packets form an enhanced data group.

In addition, as shown in FIG. 4A, when the enhanced data group is input to the data deinterleaver, the head region of the enhanced data group is configured to be an area composed entirely of enhanced data without being mixed with the main data region in the middle. This is an example of setting the body and tail area.

In this case, the body region may be allocated to include at least a part or all of the region where the enhanced data in the enhanced data group is continuously output based on the enhanced data group input to the data deinterleaver. have. In this case, the body region may include a region in which enhanced data is discontinuously output.

Dividing the enhanced data group into three parts is for different purposes. That is, in FIG. 4, the region corresponding to the body is composed of enhanced data without interfering with main data in the middle, and thus shows more robust reception performance. The enhanced data of the head and tail regions is the main data and the interleaver output order. This is because the reception performance is lower than that of the body area because it is mixed between phases.

In addition, in the case of applying a system for inserting and transmitting known data into an enhanced data group, when the long known data is periodically inserted into the enhanced data periodically, the enhanced data is displayed based on the order of the data interleaver output terminal. It is possible to insert in areas that are not mixed with the data. That is, it is possible to periodically insert known data of a predetermined length into the body region of FIG. 4. However, it is difficult to periodically insert known data into the head and tail regions, and also to insert long known data continuously.

Accordingly, the group formatter 114 inserts the input enhanced data into a corresponding region in the enhanced data group formed as described above.

In one embodiment, the group formatter 114 allocates the received enhanced data to the body region. In addition, the group formatter 114 allocates signaling information indicating the overall transmission information to the body region separately from the enhanced data. That is, the signaling information is information necessary for receiving and processing data included in the enhanced data group in a receiving system, and may include enhanced data group information, multiplexing information, and the like.

In addition, the group formatter 113 inserts an MPEG header position holder, an unstructured RS parity position holder, and a main data position holder in relation to data deinterleaving as shown in FIG. 5A. The reason for assigning the main data position is that the enhanced data and the main data are mixed between the head and tail regions based on the input of the data deinterleaver as shown in FIG. 4A. The position holder for the MPEG header is assigned to the beginning of each packet, based on the output data after the data deinterleaving.

The group formatter 114 inserts the known data generated by the predetermined method into the corresponding area, or inserts the known data position holder into the corresponding area for inserting the known data later. Also, the position holder for initializing the trellis encoder 127 is inserted into the corresponding region. In one embodiment, the initialization data location holder may be inserted before the known data stream.

As described above, the enhanced data group into which the data or position holder is inserted in the group formatter 114 is input to the data deinterleaver 115.

In FIG. 4A, the head and tail regions may be used for enhanced data, another information data, or data for assisting the enhanced data as needed later.

The data deinterleaver 115 deinterleaves the input enhanced data group in a reverse process of data interleaving and outputs the deinterleaved data to the packet formatter 116. That is, when the enhanced data group of the type shown in FIG. 4A is input, it is deinterleaved as shown in FIG. 4B and output to the packet formatter 116. 4B shows only the parts related to the enhanced data group.

The packet formatter 116 removes the main data position holder and the RS parity position holder, which have been allocated for deinterleaving among the deinterleaved input data, collects the remaining portions, and then stores an MPEG header in a 4-byte MPEG header position holder. Replace it.

In addition, the packet formatter 116 may insert and replace the known data in the known data position holder when the group formatter 114 inserts the known data position holder. Can be output as is without adjustment.

Then, the packet formatter 116 configures the data in the packet-formatted enhanced data group as MPEG TS packets in units of 188 bytes as described above, and provides them to the packet multiplexer 121.

The packet multiplexer 121 multiplexes the enhanced data packet and the main data packet in units of 188 bytes, which are output from the packet formatter 116, according to a predefined multiplexing method, and outputs the data to the data randomizer 122. The multiplexing method can be adjusted by various variables of the system design.

As one of the multiplexing methods of the packet multiplexer 121, an enhanced data burst section and a main data section are distinguished on a time axis, and the two sections are alternately repeated. In this case, at least one enhanced data group may be transmitted in the enhanced data burst section and only main data may be transmitted in the main data section. The main data may be transmitted in the enhanced data burst period.

As described above, when the enhanced data is transmitted in a burst structure, the receiving system receiving only the enhanced data turns on the power only in the burst period to receive the data, and turns off the power in the main data section in which only the main data is transmitted. By not receiving, the power consumption of the receiving system can be reduced.

As such, the packet multiplexer 121 receives a main data packet and an enhanced data group output from the packet formatter 116 and transmits the burst data.

If the input data is a main data packet, the data randomizer 122 performs rendering in the same manner as the existing one. That is, the MPEG sync byte in the main data packet is discarded, and the remaining 187 bytes are randomly generated using pseudo random bytes generated therein, and then output to the RS encoder / unstructured RS encoder 123.

However, if the input data is an enhanced data packet, the MPEG sync byte is discarded among the 4 byte MPEG headers included in the enhanced data packet, and only the remaining 3 bytes are rendered, and the rest of the enhanced data except the MPEG header is performed. The RS is output to the RS encoder / unstructured RS encoder 123 without performing any rendering. This is because the E-VSB renderer 112 performs rendering on the enhanced data in advance. Rendering may or may not be performed on the known data (or known data location holder) and the initialization data location holder included in the enhanced data packet, and only information about the known data is transmitted to the receiving system.

The RS encoder / unstructured RS encoder 123 performs RS encoding on data to be rendered or bypassed by the data randomizer 122 to add 20 bytes of RS parity, and then the data interleaver 124. Will output In this case, the RS encoder / unstructured RS encoder 123 performs systematic RS encoding like the existing ATSC VSB system when the input data is a main data packet, and adds 20 bytes of RS parity to 187 bytes of data. In the case of an enhanced data packet, 20 parity byte positions are determined in a packet, and 20-byte RS parity obtained by performing unsystematic RS encoding is inserted into the determined parity byte position.

The data interleaver 124 is a convolutional interleaver in bytes.

The output of the data interleaver 124 is input to the parity substituent 125 and the unstructured RS encoder 126.

On the other hand, in order to make the output data of the trellis encoder 127 located at the rear end of the parity substituent 125 into known data defined by appointment on the transmitting / receiving side, the memory in the trellis encoder 127 is first initialized. Is needed. That is, before the input known data string is trellis encoded, the memory of the trellis encoder 127 must be initialized.

At this time, the beginning of the known data string input is not the actual known data but the initialization data position holder included in the group formatter 114. Therefore, a process of generating initialization data immediately before the input known data string is trellis encoded and replacing the corresponding trellis memory initialization data position holder is required. This is to ensure backward compatibility with existing receiving systems.

The trellis memory initialization data is generated by determining a value of the memory of the trellis encoder 127 according to a past memory state. In addition, a process of recalculating RS parity under the influence of the replaced initialization data and replacing the RS parity with the RS parity output from the data interleaver 124 is required.

Accordingly, the unstructured RS encoder 126 receives an enhanced packet including an initialization data position holder to be replaced with initialization data from the data interleaver 124, and receives initialization data from the trellis encoder 127. The new unstructured RS parity is calculated and then output to the parity substituent 125. The parity substituent 125 then selects the output of the data interleaver 124 for the data in the enhanced data packet, and the trellis encoder 127 for the RS parity by selecting the output of the unstructured RS encoder 126. Will output

Meanwhile, when the main data packet is input or an enhanced data packet including an initialization data position holder to be replaced is input, the parity substituent 125 selects data and RS parity output from the data interleaver 124 and transmits the same. Output to release release unit 127.

The trellis encoder 127 converts the data of the byte unit into the symbol unit, performs 12-way interleaving, trellis-encodes, and outputs the trellis to the frame multiplexer 128.

The frame multiplexer 128 inserts field synchronization and segment synchronization into the output of the trellis encoder 127 and outputs them to the transmitter 130.

The transmitter 130 includes a pilot inserter 131, a VSB modulator 132, and an RF up-converter 133, and thus the detailed description thereof will be omitted.

Second embodiment

5 is a block diagram of a digital broadcast transmission system according to a second embodiment of the present invention.

The digital broadcast transmission system of FIG. 5 includes an E-VSB preprocessor 510, a packet multiplexer 121, a data randomizer 122, an RS encoder / Non-systematic RS. Encoder 123, data interleaver 124, parity substituent 125, unstructured RS encoder 126, trellis encoder 127, frame multiplexer 128, and transmitter 130 It is composed.

The E-VSB preprocessor 510 includes an RS frame encoder 511, a randomizer / byte expander 512, a group formatter 513, an E-VSB block processor 514, a data deinterleaver 515, and a packet formatter. And 516.

The difference between the digital broadcast transmission system of FIG. 5 and the digital broadcast transmission system of FIG. 1 is the arrangement order of the group formatter and the E-VSB block processor.

In FIG. 1, the group formatter 114 is positioned after the E-VSB block processor 113, whereas in FIG. 5, the E-VSB block processor 514 is positioned after the group formatter 513.

That is, in the digital broadcast transmission system of FIG. 5, since the group formatter 513 is positioned before the E-VSB block processing unit 514, the E-VSB before the group formatter 513 for smooth operation of the group formatter 513. In order to cope with the encoding of the block processing unit 514, it is necessary to extend the byte. Accordingly, in the digital broadcast transmission system of FIG. 5, the randomizer / byte expander 512 performs byte expansion through null data insertion as well as randomization.

On the other hand, in the transmission system of FIG. 1, the E-VSB block processing unit 113 is provided before the group formatter 114, and is directly extended by encoding of the E-VSB block processing unit 113. You will not. Therefore, in FIG. 1, only randomization is performed on the enhanced data, and no byte expansion is performed.

Next, only the E-VSB preprocessor 510 of FIG. 5 will be described in detail, and other blocks (ie, 121 to 128 and 130) may be applied in the same manner as in FIG.

That is, the enhanced data is input to the E-VSB preprocessor 510 which performs additional encoding in order to respond quickly and strongly to noise and channel changes.

The RS frame encoder 511 of the E-VSB preprocessor 510 receives the enhanced data, constructs a frame for further encoding, performs encoding, and outputs the encoded signal to the randomizer / byte expander 512. do.

The RS frame encoder 511 provides robustness to the data by performing at least one of error correction encoding and error detection encoding on the input enhanced data. In addition, the RS frame encoder 511 includes a process of mixing enhanced data of a certain size in order to cope with an extremely poor and rapidly changing propagation environment by distracting a cluster error that may occur due to a change in the propagation environment. do.

In one embodiment, the RS frame encoder 511 adds data for error correction by performing error correction encoding on the input enhanced data, and mixes them in row units. After performing the step 1), error detection encoding is performed to add data for error detection.

In this case, the error correction coding is applied with RS coding, and the error detection coding is applied with cyclic redundancy check (CRC) coding. When the RS encoding is performed, parity data to be used for error correction is generated and added. When the CRC encoding is performed, CRC data to be used for error detection is generated and added.

A more detailed description of the RS coding, row mixing, and CRC coding will be omitted since it will be described with reference to FIG. 1.

The randomizer / byte expander 512 receives enhanced data having increased robustness through encoding and row mixing and performs byte expansion through randomizing and null data insertion.

In this case, by performing the randomization on the enhanced data in the randomizer / byte expander 512, the randomizer 122 may omit the enhanced data in the enhanced data. The enhanced data generator may use the same as the conventional ATSC's renderer, or may use another renderer. That is, the input 187 bytes of enhanced data may be randomly generated using pseudo random bytes generated internally.

In addition, the rendering process and the byte expansion process may be performed in a reversed order. That is, as described above, the byte expansion may be performed after rendering, and conversely, after the byte expansion, the rendering may be performed, which may be selected in consideration of the overall system.

The byte extension may vary depending on the code rate of the E-VSB block processor 514. That is, if the code rate of the E-VSB block processing unit 514 is an M / N code rate, the byte expander expands M bytes to N bytes. For example, if the code rate is 1/2 code rate, 1 byte is extended to 2 bytes, and if the code rate is 1/4, 1 byte is extended to 4 bytes.

The enhanced data output from the randomizer / byte expander 512 is input to the group formatter 513.

As described above with reference to FIG. 1, the group formatter 513 forms an enhanced data group and inserts enhanced data inputted into a corresponding region in the formed enhanced data group.

In this case, the enhanced data group may be divided into at least one or more layered areas, and the type of enhanced data allocated to each area may vary according to characteristics of each layered area. In the present invention, an enhanced data group is described as an embodiment in which three hierarchical areas, that is, a head, a body, and a tail area, are divided. That is, based on the enhanced data group that is interleaved and outputted data, the first output part is the head, the middle output part is the body, and the last output part is the tail.

In this case, the body region may be allocated to include at least a part or all of the region where the enhanced data in the enhanced data group is continuously output based on the enhanced data group input to the data deinterleaver. have. In this case, the body region may include a region in which enhanced data is discontinuously output.

Therefore, the group formatter 513 inserts the input enhanced data into a corresponding region in the enhanced data group formed as described above.

In one embodiment, the group formatter 513 allocates the received enhanced data to the body region. In addition, the group formatter 513 allocates signaling information indicating the overall transmission information to the body region separately from the enhanced data. That is, the signaling information is information necessary for receiving and processing data included in the enhanced data group in a receiving system, and may include enhanced data group information, multiplexing information, and the like.

In addition, the group formatter 113 inserts an MPEG header position holder, an unstructured RS parity position holder, and a main data position holder in relation to data deinterleaving as shown in FIG. 5A.

The group formatter 513 inserts the known data generated by the predetermined method into the corresponding area, or inserts a known data position holder into the corresponding area for inserting the known data later. Also, the position holder for initializing the trellis encoder 127 is inserted into the corresponding region.

As described above, the enhanced data group into which the data or the position holder is inserted in the group formatter 513 is input to the E-VSB block processor 514.

The E-VSB block processor 514 performs additional encoding only on the enhanced data output from the group formatter 513. For example, if the randomizer / byte expander 512 performs 2-byte expansion, the E-VSB block processor 514 performs encoding at 1/2 code rate on the enhanced data and performs 4-byte expansion. If so, encoding is performed at a 1/4 code rate. The MPEG header position holder, the main data position holder, and the RS parity position holder are output without change.

In addition, the known data (or known data position holder) and the initialization data position holder may be output as they are without changing the data or may be replaced with the known data generated by the E-VSB block processing unit 514 and output. The former method is shown in FIG. 6A and the latter method is shown in FIG. 6B.

First, referring to FIG. 6A, the E-VSB block processor 514 includes a demultiplexer 610, a buffer 620, an enhanced encoder 630, a known data generator 640, and a multiplexer 650.

The enhanced encoder 630 includes a byte-to-symbol converter 631, a symbol encoder 632, a parallel / serial converter 633, a symbol interleaver 634, and a symbol-byte converter 635.

In FIG. 6A, the demultiplexer 610 outputs the input data to the buffer 620 when the input data is the main data position holder, the MPEG header position holder, and the RS parity position holder, and to the enhanced encoder 630 when the data is enhanced. Output

The buffer 620 delays the main data position holder, the MPEG header position holder, and the RS parity position holder for a predetermined time and outputs the delay to the multiplexer 640. That is, when the data inputted to the demultiplexer 610 is a main data position holder, an MPEG header position holder, and an RS parity position holder, the delayed compensation is performed by delaying the difference of time points generated by the enhanced data through additional encoding. Buffer 620 is used for this purpose. The data whose viewpoint difference is adjusted by the buffer 620 is transferred to the data deinterleaver 515 through the multiplexer 640.

In the case of known data, the group formatter 513 inserts a known data position holder, and the multiplexer 650 of the E-VSB block processing unit 514 replaces the known data position holder 640. By selecting and outputting the known training data (T) outputted from, it is output without additional encoding. In this case, the initialization data position holder inserted by the group formatter 513 may be output as it is or the known data output from the known data generator 640 may be output instead. Even in this case, the known data output instead of the initialization data position holder is replaced by the initialization symbol by the trellis encoder 127.

Meanwhile, the byte-symbol converter 631 of the enhanced encoder 630 converts the enhanced data byte into four symbols and outputs the converted symbols to the symbol encoder 632. The symbol encoder 632 is an M / N coder that encodes and outputs an enhanced data M bit into N bits. For example, if 1 bit of enhanced data is encoded and output into 2 bits, M = 1 and N = 2. If one bit of the code data is encoded into four bits and output, M = 1 and N = 4.

The symbol encoder 632 encodes and outputs only the bits having valid data among the input symbols.

As an example, assume that the enhanced data of one byte is extended to two bytes by inserting a null bit between bits in the randomizer / byte expander 512. Then, the symbol encoder 632 encodes only valid data bits among symbols composed of null bits and valid data bits and outputs the encoded data as 2 bits. In this case, the symbol encoder operates as a 1/2 encoder.

As another example, assume that the randomizer / byte expander 512 extends one byte of enhanced data into four bytes by inserting null bits between the bits. Then, the symbol encoder 632 encodes only valid data bits among two symbols composed of three null bits and one valid data bit, and outputs four bits. In another example, only valid data bits may be encoded into two bits among symbols consisting of null bits and valid data bits, and finally, the encoded two bits may be repeated and finally output as four bits. As another example, only valid data bits may be encoded twice at a 1/2 code rate among symbols composed of null bits and valid data bits, and finally, the encoded symbols may be output as 4 bits. In this case, the symbol encoders all operate as quarter encoders.

That is, the enhanced data lengths of the input / output terminals of the symbol encoder 632 are the same. When the effective data bits are output at the 1/4 code rate, the error correction capability is higher than that at the 1/2 code rate.

3A and 3B may be applied to the symbol encoder 632. Instead, the input bits U of FIGS. 3A and 3B are bits having valid data among the input symbols. That is, if the symbol encoders of FIGS. 3A and 3B are designed to encode only valid data bits among the input symbols, the symbol encoders of FIGS. 3A and 6B may be applied to the symbol encoders of FIGS. 6A and 6B. If the randomizer / byte expander 512 extends one byte of enhanced data into two bytes, valid data bits are input in one symbol unit, and if extended in four bytes, valid data bits are input in two symbol units.

If the symbol encoder 632 operates as an encoder having a 1/2 code rate, the output of the symbol encoder 632 is input to the symbol interleaver 634 by bypassing the subsequent parallel / serial converter 633 as it is. . In this case, the bottle / serial converter 633 may be omitted. If the symbol encoder 632 operates as an encoder having a quarter code rate, the output of the symbol encoder 632 is converted into a serial symbol by a parallel / serial converter 633 at a later stage and input to the symbol interleaver 634. do.

When the symbol encoder 632 operates as an encoder having a quarter code rate, two symbols, that is, four bits, are output in parallel in the symbol encoder, and the symbol interleaver 634 is a symbol unit, that is, a two-bit unit. This is because interleaving is performed. Accordingly, the parallel / serial converter 633 converts two symbols input in parallel into a series of symbol units and sequentially outputs the two symbols to the symbol interleaver 634.

The symbol interleaver 634 receives the output of the parallel / serial converter 633 and performs block interleaving on a symbol lock basis to rearrange the order of symbols and output the symbol-byte converter 635.

The symbol-byte converter 635 converts the output symbols of the symbol interleaver 634 into units of bytes and outputs them to the multiplexer 650.

The multiplexer 650 selects data output from the buffer 620 when the input data is a main data position holder, an MPEG header position holder, and an RS parity position holder, and is encoded by the enhanced encoder 630 if the input data is enhanced data. The enhanced data to be output is selected. If the known data position holder (or known data) is selected, a training sequence output from the known data generator 640 is selected and output to the data deinterleaver 515.

FIG. 6B is almost similar to FIG. 6A, with the difference being the known data processing portion. That is, in case of FIG. 6B, if the input data is known data, the demultiplexer 660 outputs to the buffer 670, delays a predetermined time, and outputs the data to the data deinterleaver 114 through the multiplexer 680. 6 is the same as FIG. 6A described above, and thus a detailed description thereof will be omitted.

In this case, it is assumed that the known data has already been inserted into the enhanced data packet by the group formatter 513.

As described above, the data encoded, replaced, and bypassed by the E-VSB block processor 514 is input to the data deinterleaver 515, and the data deinterleaver 515 inputs the input data to the data interleaver 124. The process is deinterleaved in the reverse process and output to the packet formatter 516.

The packet formatter 516 removes the main data position holder and the RS parity position holder, which have been allocated for deinterleaving among the deinterleaved input data, collects the remaining portions, and then stores an MPEG header in a 4-byte MPEG header position holder. Replace it.

The packet formatter 516 configures packet-formatted data into MPEG TS packets in units of 188 bytes and provides them to the packet multiplexer 121.

The packet multiplexer 121 multiplexes the enhanced data packet and the main data packet in units of 188 bytes output from the packet formatter 516 and outputs the multiplexed data packet to the data randomizer 122. The multiplexing method may be omitted with reference to FIG. 1.

Subsequent operations may be omitted by referring to FIG. 1.

FIG. 7 is a block diagram illustrating an embodiment of a digital broadcast reception system for receiving, demodulating, and equalizing data transmitted from the digital broadcast transmission systems of the first and second embodiments described above to restore original data.

The receiving system of FIG. 7 includes a tuner 701, a demodulator 702, an equalizer 703, a known data detector 704, an E-VSB block decoder 705, an E-VSB data deformatter 706, and an RS. The frame decoder 707, the data deinterleaver 708, the RS decoder 709, and the derandomizer 710 are configured.

That is, the tuner 701 tunes the frequency of a specific channel, down-converts the intermediate frequency (IF) signal, and outputs the demodulator 702 and the known data detector 704.

The demodulator 702 performs automatic gain control, carrier recovery, and timing recovery on the input IF signal to generate a baseband signal and outputs the same to the equalizer 703 and the known data detector 704.

The equalizer 703 compensates for the distortion on the channel included in the demodulated signal and outputs it to the E-VSB block decoder 705.

At this time, the known data detector 704 detects the position of the known data inserted by the transmitter from the input / output data of the demodulator 702, that is, the data before the demodulation is performed or the data after the demodulation. The symbol string of the known data generated at the position is output to the demodulator 702, the equalizer 703, and the E-VSB block decoder 705. In addition, the known data detection unit 704 enhances the data by the E-VSB block decoder 705 of the receiving side to distinguish the enhanced data that has been further encoded from the transmitting side and the main data that has not been further encoded. The E-VSB block decoder 705 outputs information for knowing the starting point of the block of the DE coder. Although the connection state is not illustrated in the diagram of FIG. 7, the information detected by the known data detector 704 may be generally used in the reception system, and may be used in the E-VSB deformatter 706 and the RS frame decoder 707. Can also be used.

The demodulator 702 can improve demodulation performance by using the known data symbol string during timing recovery or carrier recovery. The equalizer 703 can use the known data to improve equalization performance. have. In addition, the equalization performance may be improved by feeding back the decoding result of the E-VSB block decoder 705 to the equalizer 703.

On the other hand, if the data input from the equalizer 703 to the E-VSB block decoder 705 is enhanced data in which both additional encoding and trellis encoding are performed at the transmitting side, trellis decoding and additionally at the reverse side of the transmitting side are performed. Decoding is performed and only trellis decoding is performed if additional data is not performed and only trellis encoding is performed. The enhanced data group decoded by the E-VSB block decoder 705 is input to the E-VSB data deformatter 706, and the trellis decoded data is input to the data deinterleaver 708.

That is, if the input data is main data, the E-VSB block decoder 705 may perform Viterbi decoding on the input data to output a hard decision value, or hard decision the soft decision value and output the result.

If the input data is enhanced data, the E-VSB block decoder 705 outputs a hard decision value or a soft decision value with respect to the input enhanced data.

If the input data is enhanced data, the E-VSB block decoder 705 decodes the data encoded by the E-VSB block processor 133 and the trellis encoder 145 of the transmission system. At this time, the RS frame encoder 111 of the E-VSB preprocessor 110 on the transmitting side becomes an external code, and the E-VSB block processor 133 and the trellis encoder 145 can be regarded as one internal code. .

In order to maximize the performance of the outer code at the time of decoding the concatenated code, the soft decision value should be output from the decoder of the inner code.

Therefore, the E-VSB block decoder 705 may output a hard decision value for the enhanced data, and output a soft decision value if necessary.

In other words, the E-VSB block decoder 705 outputs one of the soft decision value and the hard decision value for the enhanced data, and the hard decision value for the main data.

Meanwhile, the data deinterleaver 708, the RS decoder 709, and the derandomizer 710 are blocks necessary for receiving main data, and may not be necessary in a receiving system structure for receiving only enhanced data. .

The data deinterleaver 708 deinterleaves the main data and outputs the main data to the RS decoder 709 in a reverse process of the data interleaver on the transmitting side.

The RS decoder 709 performs systematic RS decoding on the deinterleaved data and outputs the deserializer 710.

The derandomizer 710 receives the output of the RS decoder 709 to generate the same pseudo random byte as the transmitter's renderer, bitwise XORs the MPEG sync byte, Insert it before and output in 188 byte main data packet unit.

The data output from the E-VSB block decoder 705 to the E-VSB data deformatter 706 is input in the form of an enhanced data group as shown in FIG. 4A. At this time, since the E-VSB data deformatter 706 already knows the input data configuration, the E-VSB data deformatter 706 distinguishes the signaling information having the system information from the enhanced data group and the enhanced data. At this time, the E-VSB data deformatter 706 uses known data, trellis initialization data, MPEG headers, and the RS encoder / unstructured RS encoder 123 or unstructured data that have been inserted into the main data and the enhanced data group. RS parity added by the RS encoder 126 is removed and output.

The enhanced data is de-randomized in the reverse process of the sender's renderer (see Fig. 1) or the renderer / byte expander (see Fig. 5). At this time, the null data used for expansion in the byte expander may or may not be necessary. That is, according to the design method of the receiving system, a part for removing the expanded byte by the byte expander of the transmitting system may be required. However, the E-VSB block decoder 705 may remove and output the null data inserted during the byte expansion. In that case there is no need for extended byte removal. If extended bytes need to be removed, the order of extended byte removal and derandomization depends on the configuration of the sending system. In other words, if a byte expansion after rendering is performed in the transmitting system, de-rendering is performed after removing bytes from the receiving system. If the transmitting system is performed in reverse, the receiving system is also performed in reverse.

In the de-rendering process, if a soft decision is required in the RS frame decoder 707 at the next stage and a soft decision value is input from the E-VSB block decoder 705, the soft decision value is de-randomized. It is difficult to XOR with a pseudo random bit.

Accordingly, the E-VSB data deformatter 706 reverses the sign of the soft decision value when the pseudo random bit to be XORed with respect to the soft decision value of the enhanced data bit is 1, and outputs the soft value when the value is 0. By outputting the sign of the determination value as it is, the soft determination state can be maintained and transmitted to the RS frame decoder 707.

The reason for changing the sign of the soft decision value when the pseudo random bit is 1 in the above description is that the output data bit is reversed when the pseudo random bit XORed to the input data bit in the transmitter's renderer is 1. That is, 0 XOR 1 = 1 and 1 XOR 1 = 0. In other words, when the pseudo-random bit generated by the E-VSB packet deformatter 706 is 1, when the XOR of the hard decision value of the enhanced data bit is reversed, the soft decision value is outputted. The code of the soft decision value is reversed and output.

The RS frame decoder 707 performs an inverse process in the RS frame encoder of the transmitter. That is, the RS frame decoder 707 restores the original enhanced data by performing at least one of error detection decoding, inverse row mixing, and error correction decoding.

The present invention is not limited to the above-described embodiments, and can be modified by those skilled in the art as can be seen from the appended claims, and such modifications are within the scope of the present invention.

As described above, the digital broadcasting system and the processing method according to the present invention have the advantage of being resistant to errors and compatible with existing VSB receivers when transmitting additional data through a channel. In addition, there is an advantage that the additional data can be received without error even in a ghost and noise channel more than a conventional VSB system.

In addition, the present invention is to group the plurality of enhanced data packets having information, and to transmit the group by multiplexing the group with the main data, the grouping of the group into a plurality of areas, the data inserted according to the characteristics of the layered area By dividing the types, processing methods, and the like, the reception performance of the reception system can be improved.

In addition, the present invention performs a row mixing process with at least one of error correction encoding and error detection encoding on the enhanced data, thereby robustly responding to fast channel changes while giving robustness to the enhanced data.

The present invention can simplify the structure of the transmission system by performing additional error correction encoding, rendering and deinterleaving before the enhanced data is multiplexed with the main data.

The present invention is more effective when applied to portable and mobile receivers in which channel variation is severe and robustness to noise is required.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the spirit of the present invention.

Therefore, the technical scope of the present invention should not be limited to the contents described in the embodiments, but should be defined by the claims.

Claims (34)

Performing first encoding on enhanced data having information; Performing a second encoding on the first encoded enhanced data; And And multiplexing and transmitting the encoded enhanced data and main data. The method of claim 1, wherein the first encoding step And at least one of error correction encoding, error detection encoding, and row shuffling. The method of claim 1, wherein the first encoding step Collecting K (K is a natural number) rows of A (A is a natural number) enhanced data bytes having information to form a frame for error correction; Performing error correction encoding on the frame; Collecting G (G is a natural number) of the error correcting encoded frames to form a frame group, and performing row mixing on a frame group basis; And And performing error detection encoding on the rows of the frame on which the row mixing has been performed. The method of claim 3, wherein the error correction encoding step And parity data is added by performing RS encoding on the frame. The method of claim 3, wherein the row mixing step And performing row mixing to position the i th row of the frame group to the j th row of the frame group by applying the following equation.

Here, G is the number of frames included in the frame group, and N is the sum of the number of rows in the frame before error correction encoding and the parity generated by error correction encoding. The method of claim 3, wherein the error detection encoding step And a CRC checksum is added by performing CRC encoding. The method of claim 1, wherein the second encoding step A transmission method comprising encoding at an M / N (M <N) code rate. The method of claim 1, wherein the multiplexing step Distinguishing and transmitting an enhanced data burst section and a main data section; Transmitting at least one enhanced data group in the enhanced data burst period; And And transmitting only a main data packet in the main data section. The method of claim 8, And transmitting the main data packet in the enhanced data burst period. Performing first encoding on enhanced data having information; Performing randomizing on the first encoded enhanced data; Performing a second encoding on the rendered enhanced data; Forming an enhanced data group including a plurality of packets, inserting second encoded enhanced data into a corresponding region of the enhanced data group, and then performing deinterleaving; And And multiplexing the deinterleaved enhanced data with main data to transmit the deinterleaved enhanced data. The method of claim 10, wherein the first encoding step And at least one of error correction encoding, error detection encoding, and row shuffling. The method of claim 10, wherein the second encoding step A transmission method comprising encoding at an M / N (M <N) code rate. The method of claim 12, wherein the second encoding step And a method of converting an input enhanced data byte into bit units and encoding each bit at an M / N code rate. 11. The method of claim 10, wherein inserting the data And inserting a header position holder, a main data position holder, and a parity position holder in a corresponding region of the enhanced data group for deinterleaving. 11. The method of claim 10, wherein inserting the data And inserting known data, known data position holders, and initialization data position holders for trellis encoding into the corresponding region in the enhanced data group. Performing first encoding on enhanced data having information; Performing randomization and byte expansion on the first encoded enhanced data; Forming an enhanced data group including a plurality of packets, and inserting enhanced and byte extended enhanced data into a corresponding region of the enhanced data group; Performing deinterleaving after performing second encoding on the enhanced data of the data insertion step; And And multiplexing the deinterleaved enhanced data with main data to transmit the deinterleaved enhanced data. The method of claim 16, wherein the first encoding step And at least one of error correction encoding, error detection encoding, and row shuffling. The method of claim 16, wherein the second encoding step A transmission method comprising encoding at an M / N (M <N) code rate. 19. The method of claim 18, wherein the second encoding step And a method of converting an input enhanced data byte into a symbol and performing encoding at an M / N code rate on only valid data bits among the converted symbols. 17. The method of claim 16, wherein inserting the data And inserting a header position holder, a main data position holder, and a parity position holder in a corresponding region of the enhanced data group for deinterleaving. 23. The method of claim 22, wherein inserting data And inserting known data, known data position holders, and initialization data position holders for trellis encoding into the corresponding region in the enhanced data group. A first encoder which performs a first encoding on enhanced data having information; A randomizer for performing randomization on the first encoded enhanced data; A second encoder which performs a second encoding on the rendered enhanced data; A group formatter / deinterleaver for forming an enhanced data group including a plurality of packets, inserting second encoded enhanced data into a corresponding region in the enhanced data group, and performing deinterleaving; And And a packet multiplexer for multiplexing the deinterleaved enhanced data with main data for transmission. The method of claim 22, wherein the first encoder And at least one of error correction encoding, error detection encoding, and row shuffling. The method of claim 22, wherein the second encoder A transmission system characterized by performing encoding at an M / N (M <N) code rate. The method of claim 24, wherein the second encoder A byte-bit converter for converting an input enhanced data byte into bits; A symbol encoder for encoding the converted bits at an M / N code rate; And a symbol-byte converter for converting the symbols encoded by the symbol encoder in units of bytes and outputting the converted symbols. The method of claim 25, wherein the second encoder A parallel / serial converter converting at least a plurality of encoded symbols from the symbol encoder into one symbol unit and outputting the same; And And a symbol interleaver for performing symbol unit interleaving on symbols output from the parallel / serial converter. 23. The method of claim 22, wherein the group formatter / deinterleaver And inserting a header position holder, a main data position holder and a parity position holder for deinterleaving in a corresponding area within the enhanced data group. 23. The method of claim 22, wherein the group formatter / deinterleaver And inserting known data, known data position holders, and initialization data position holders for trellis encoding into the corresponding region in the enhanced data group. A first encoder which performs a first encoding on enhanced data having information; A randomizer / byte expander for performing randomization and byte expansion on the first encoded enhanced data; A group formatter for forming an enhanced data group including a plurality of packets, and inserting enhanced and byte extended enhanced data into a corresponding region of the enhanced data group; A second encoding / deinterleaver for performing deinterleaving after performing second encoding on the enhanced data output from the group formatter; And And multiplexing the deinterleaved enhanced data with main data to transmit the deinterleaved enhanced data. The method of claim 29, wherein the first encoder And at least one of error correction encoding, error detection encoding, and row shuffling. The method of claim 29, wherein the second encoder A transmission system characterized by performing encoding at an M / N (M <N) code rate. The method of claim 37, wherein the second encoder A byte-symbol converter for converting an input enhanced data byte into symbol units; A symbol encoder which encodes only valid data bits of the converted symbols at an M / N code rate; A parallel / serial converter converting at least a plurality of encoded symbols from the symbol encoder into one symbol unit and outputting the same; And And a symbol interleaving unit performing symbol unit interleaving on the symbols output from the parallel / serial converter and outputting the data in byte units. Performing trellis decoding and M / N (M <N) decoding if the demodulated data is enhanced data; Performing de-randing on the enhanced data on which the decoding has been performed; And And performing at least one of error detection decoding, inverse row shuffling, and error correction decoding on the de-randomized data. A block decoder for performing trellis decoding and M / N (M <N) decoding if the demodulated data is enhanced data; A data deformatter for performing de-randomizing on the decoded enhanced data; And And a frame decoder configured to perform at least one of error detection decoding, inverse row mixing, and error correction decoding on the de-randomized data.

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