KR20070103945A - Manufacturing method of display devic organic semiconductor layer - Google Patents

Abstract

A method for manufacturing a display device is provided to improve the characteristics of an organic semiconductor layer and minimize the influence on the organic semiconductor layer. A method for manufacturing a display device includes the steps of: forming a data line(10), a gate line(30), a drain electrode(50) to form a channel region(B), and a source electrode(60) on an insulation substrate; forming a barrier rib on the top of the drain electrode and the source electrode to expose the channel region; forming an organic semiconductor layer on the channel region by using a mask; and forming a first protective layer on the top of the organic semiconductor layer in an inkjet method.

Description

Manufacturing method of display device {MANUFACTURING METHOD OF DISPLAY DEVIC organic semiconductor layer}

1 is a schematic diagram of a display device according to an embodiment of the present invention;

2 is a cross-sectional view taken along II-II of FIG.

3A to 3D are views for explaining a method of manufacturing a display device according to an embodiment of the present invention.

4A to 4D are views for explaining a method of manufacturing a display device according to another embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

10: data line 20: sustain electrode line

30 gate line 40 gate electrode

50: drain electrode 60: source electrode

70 pixel electrode 200 shadow mask

210: open mask 300: inkjet device

The present invention relates to a method of manufacturing a display device, and more particularly, to a method of manufacturing a display device including an organic semiconductor layer.

Recently, flat display devices (flat display devices) having the advantages of small size and light weight have been in the spotlight. Display devices commonly include a substrate provided with a thin film transistor.

Here, the thin film transistor substrate includes a thin film transistor (TFT) as a switching and driving device for controlling and driving the operation of each pixel. Such a thin film transistor includes a semiconductor layer, and amorphous silicon or polysilicon is used as the semiconductor layer. Recently, application of organic semiconductors is progressing. Since organic semiconductor (OSC) can be formed at room temperature and normal pressure, the process cost can be lowered and it can be applied to plastic substrates that are weak to heat. Therefore, the thin film transistor to which the organic semiconductor is applied has been evaluated as a driving element of the next generation display device which can be produced in large area and in large quantities.

However, the organic thin film transistor has many differences from the conventional thin film transistor process, and has a problem that is vulnerable to attack by the formation of other components. Therefore, methods for minimizing the influence on the organic semiconductor and improving the characteristics of the organic thin film transistor are required.

Accordingly, it is an object of the present invention to provide a method for manufacturing a display device capable of safely forming an organic semiconductor layer.

The object is to form a drain electrode and a source electrode for forming a data line, a gate line, a channel region on an insulating substrate according to the present invention; Forming a barrier rib on the drain electrode and the source electrode to expose the channel region; Forming an organic semiconductor layer in the channel region using a mask; It is achieved by a method of manufacturing a display device comprising forming a first protective layer on the organic semiconductor layer by an inkjet method.

In order to effectively form the organic semiconductor layer in the portion surrounded by the partition wall, it is preferable that a shadow mask is used in the forming of the organic semiconductor layer.

An open mask may be used to form the organic semiconductor layer, and in this case, the method may further include removing the organic semiconductor layer formed outside the channel region.

Forming a first insulating film interposed between the data line and the gate line and a second insulating film interposed between the gate line, the drain electrode and the source electrode to insulate the metal wiring layer and protect the organic semiconductor layer. It is preferable to further include.

A contact hole exposing a part of the data line is formed in the second insulating layer, and the data line and the drain electrode may be electrically connected through the contact hole.

The method may further include forming a second protective layer on the barrier rib and the first protective layer to protect the organic semiconductor layer.

The method may further include forming a pixel electrode electrically connected to the source electrode.

The pixel electrode may be integrally formed with the source electrode, and in this case, the source electrode may be formed of ITO or IZO. Of course, the pixel electrode may be formed on a different layer from the source electrode to be electrically connected through a contact hole.

Hereinafter, the present invention will be described with reference to the accompanying drawings.

In various embodiments, like reference numerals refer to like elements, and like reference numerals refer to like elements in the first embodiment and may be omitted in other embodiments. In the first embodiment of the present invention, a thin film transistor substrate in which an organic semiconductor layer is applied will be described. The present invention can be applied to a liquid crystal display device including a thin film transistor substrate, and a display device such as an OLED. to be.

1 is a schematic diagram of a display device according to an embodiment of the present invention, Figure 2 is a cross-sectional view according to II-II of FIG. The display apparatus includes a thin film transistor substrate 1 on which a plurality of thin film transistors are formed.

The thin film transistor substrate 1 according to the present invention includes an insulating substrate 100, a data line 10, a sustain electrode line 20, a gate line 30, and a gate electrode formed on the insulating substrate 100. 40), a thin film transistor including a drain electrode 50, a source electrode 60, and an organic semiconductor layer 80. The first insulating layer 110 is formed on the data line 10 and the storage electrode line 20, and the second insulating layer 120 is formed on the gate line 30 and the gate electrode 40. . The pixel electrode 70 according to the present embodiment is integrally formed with the source electrode 60. In addition, the thin film transistor substrate 1 exposes the channel region B, and is sequentially formed on the barrier rib 130 and the organic semiconductor layer 80 formed on a portion of the drain electrode 50 and the source electrode 60. First and second protective layers 140 and 150 are formed.

The insulating substrate 100 may be made of glass or plastic. When the insulating substrate 100 is made of plastic, there is an advantage that flexibility can be given to the thin film transistor substrate 1. When the organic semiconductor layer 80 is used as in the present invention, since the semiconductor layer formation can be performed at room temperature and atmospheric pressure, there is an advantage in that the insulating substrate 100 made of plastic is easy to use. Plastic types include polycarbon, polyimide, polyisulfone (PES), polyarylate (PAR), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), and the like.

On the insulating substrate 100, a data line 10 extending in one direction and a storage electrode line 20 spaced apart from the data line 10 are formed along the data line 10. Although not shown, a data pad may be further provided at an end of the data line 10 to receive a driving or control signal from the outside. The material of the data line 10 and the sustain electrode line 20 formed on the same layer may include at least one of Al, Cr, Mo, Nd, Au, Pt, and Pd, and may include a single layer or a plurality of layers. Can be prepared as.

The storage electrode line 20 is spaced apart from the data line 10 and is formed along the data line 10. The sustain electrode line 20 is formed at the same time as the data line 10. The storage electrode line 20 forms a storage capacity together with the pixel electrode 70 to be described later. Even when the thin film transistor is turned off by the holding capacitor, the voltage is kept constant for each pixel for a predetermined time, thereby forming an image.

The first insulating layer 110 covers the data line 10 and the sustain electrode line 20 on the insulating substrate 100. The first insulating layer 110 is a layer for electrical insulation between the data line 10 and the sustain electrode line 20, the gate line 30, and the gate electrode 40, and has excellent processability of silicon nitride (SiNx) or silicon oxide (SiOx). It may be an inorganic film made of an inorganic material such as). The first insulating layer 110 includes a first contact hole 49 exposing the data line 10. Although not illustrated, the first insulating layer 110 may be a double layer including an inorganic layer and an organic layer. In addition, the first insulating layer 110 remains between the gaps or interfaces of the first contact hole 49, which will be described later, because chemical substances or plasma used to form the data line 10 and the sustain electrode line 20 remain. Minimizing damage to the characteristics of the organic semiconductor layer 80 to be described later that is vulnerable to plasma resistance.

On the first insulating layer 110, a gate line 30 which is insulated from and intersects the data line 10 and defines a pixel region, and a branch of the gate line 30, which corresponds to the organic semiconductor layer 80 to be described later. The gate electrode 40 formed in this place is formed. According to another embodiment, a connection member for connecting the data line 10 and the drain electrode 50 may further include a metal layer formed on the same layer as the gate line 30 on the data line 10. . Like the data line 10, the gate line 30 and the gate electrode 40 may include at least one of Al, Cr, Mo, Nd, Au, Pt, and Pd, and may be formed as a single layer or a plurality of layers. Can be prepared.

The second insulating layer 120 is formed on the gate line 30 and the gate electrode 40. The second insulating layer 120 is an organic layer including an organic material. The second insulating layer 120 protects the data line 10, the storage electrode line 20, the gate line 30, and the gate electrode 40, and has chemical resistance and plasma resistance. Impurities are prevented from flowing into the organic semiconductor layer 80 having a weak property.

Transparent electrode layers 50, 60, and 70 are formed on the second insulating layer 120. The transparent electrode layers 50, 60, and 70 are connected to the data line 10 through the first contact hole 49, and the drain electrode 50 and the organic semiconductor layer 50 at least partially in contact with the organic semiconductor layer 80. ) And a source electrode 60 separated from the drain electrode 60, and a pixel electrode 70 connected to the source electrode 60 in the pixel region. The transparent electrode layers 50, 60, and 70 are made of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO), and may be formed through deposition and photolithography.

The drain electrode 50 is physically and electrically connected to the data line 10 through the first contact hole 49 to receive an image signal. The source electrode 60 spaced apart from the drain electrode 50 with the gate electrode 40 interposed therebetween forms a thin film transistor (TFT) together with the drain electrode 50 and each pixel electrode 70. Acts as a switching and driving element to control and drive the operation. The pixel electrode 70 forms a storage capacitor together with the storage electrode line 20 with the first and second insulating layers 110 and 120 interposed therebetween. According to another exemplary embodiment, a storage capacitor forming metal layer for the storage capacitor may be further included to prevent a case in which the storage capacitor cannot be sufficiently formed by the first and second insulating layers 110 and 120. The storage capacitor formed through the storage electrode line 20, the first and second insulating layers 110 and 120, and the pixel electrode 80 applies a constant voltage to the liquid crystal layer.

The barrier rib 130 exposing the channel region B is formed on the drain electrode 50 and the source electrode 60. The barrier rib 130 may extend from the drain electrode 50 and the source electrode 60 to be formed on the pixel electrode 70 and the second insulating layer 120. In this case, the barrier rib 130 serves as a protective film. Do it. The partition wall 130 has an opening that exposes the channel region B, and the opening exposes at least a portion of each of the drain electrode 50 and the source electrode 60. The partition wall 130 serves as a frame for forming the organic semiconductor layer 80. The partition 130 serves to reduce the damage that can be received from external factors as much as possible when the organic semiconductor is formed. That is, when the organic semiconductor layer is patterned using the upper metal layer as a mask, the interface portion with the metal layer is safe, but the side portion where the organic semiconductor layer is exposed is vulnerable to external attack. In addition, in selecting a material of the metal layer, there is a difficulty in selecting a material having less damage to the organic semiconductor layer and having excellent front coating property. Therefore, the display device according to the present exemplary embodiment forms the barrier ribs 130 for forming the organic semiconductor layer 80, and forms the organic semiconductor layer 80 in the openings formed in the barrier ribs 130.

The partition 130 may be made of a fluorine-based polymer. The barrier rib 130 is hydrophobic when the organic semiconductor material is hydrophilic, and the barrier rib 130 is hydrophilic when the organic semiconductor material is hydrophobic. Fluorine-based polymers are characterized by having both water repellency and oil repellency. Examples of the fluorine-based polymer include, but are not limited to, Poly Tetra Fluoro Ethylene (PTFE), Fluorinated Ethylene Propylene (FEP), Poly Fluoro Alkoxy (PFA), Ethylene Tetra Fluoro Ethylene (ETFE), and polyvinylidene fluoride (PVDF). Such a partition wall 130 may be formed through coating, exposure and development in the case of photosensitivity, and may be formed through photolithography using a separate photoresist film after coating in the case of non-photoresist.

In the channel region B, an organic semiconductor layer 80 is formed. The organic semiconductor layer 80 covers the channel region B, and is at least partially in contact with the drain electrode 50 and the source electrode 60. As the organic semiconductor layer 80, a known organic semiconductor material such as pentacene may be used. In the case of the organic semiconductor layer 80 according to the present invention, it is formed using a mask to be described later. Primarily low molecular organic semiconductor materials will be used.

The first protective layer 140 is formed on the organic semiconductor layer 80. The first protective layer 140 covers the organic semiconductor layer 80 and may be a thick organic film made of a fluorine-based polymer. The first protective layer 140 is a layer for preventing the deterioration of the characteristics of the organic semiconductor layer 80. In the display device according to the present invention, the first passivation layer 140 directly contacting the organic semiconductor layer 80 is formed in an inkjet manner to reduce the impact applied to the organic semiconductor 80 and to fully utilize the partition wall 130. do.

In addition, a second passivation layer 150 is further formed on the first passivation layer 140 and the partition wall 130. The second protective layer 150 protects the organic semiconductor layer 80 to improve characteristics of the organic thin film transistor (O-TFT). The second protective layer 150 may be made of any one of indium tin oxide (ITO) and indium zinc oxide (IZO).

3A to 3D are views for explaining a method of manufacturing a display device according to an embodiment of the present invention.

First, as shown in FIG. 3A, a first metal wiring layer 10 including a data line 10 and a storage electrode line 20 on an insulating substrate 100 made of an insulating material such as glass, quartz, ceramic, or plastic. 20, a first insulating film 110 on the first metal wiring layers 10 and 20, a gate electrode 40 on the first insulating film 110, a second insulating film 120 on the gate electrode 40, and a second insulating film 120. The drain electrode 50, the source electrode 60, and the pixel electrode 70 are formed on the second insulating film 120. A barrier rib 130 is formed on the channel region B to expose a portion where the channel region B is to be formed.

The first metal wiring layers 10 and 20 are deposited by a method such as sputtering and then formed through a photolithography process. Thereafter, a first insulating material made of an inorganic material such as silicon nitride (SiNx) or silicon oxide (SiOx) is applied on the insulating substrate 100 and the first metal wiring layers 10 and 20 to form the first insulating film 110. do. The first contact hole 49 exposing the data line 10 is formed. Subsequently, the second metal wiring material is deposited on the first insulating layer 110 by sputtering or the like, and then the gate line 30 and the gate electrode 40 are formed through a photolithography process. .

Next, a second insulating film 120, which is a thick organic film, is formed on the second metal wiring layers 30 and 40 and the first insulating film 110. The second insulating layer 120 may be formed by slit coating or spin coating. Subsequently, a transparent conductive metal oxide (transparent conductive material) such as indium tin oxide (ITO) or indium zinc oxide (IZO) is formed on the second insulating layer 120 through sputtering, and then a photolithography process or The transparent electrode layers 50, 60, and 70 are formed by using an etching process. The transparent electrode layers 50, 60, and 70 are connected to the data line 10 through the first contact hole 49 and are formed on the drain electrode formed on the gate electrode 40 at least partially in contact with the organic semiconductor layer 80. A source electrode 60 separated from the drain electrode 50 with the gate electrode 40 interposed therebetween to define a channel region, and a pixel electrode connected to the source electrode 60 to fill the pixel region ( 70).

The partition wall 130 forms a partition coating layer for forming the partition wall 130 and forms a photosensitive film pattern thereon. The barrier coating layer may be formed by dissolving the organic polymer in a solvent and then coating the film using slit coating or spin coating to remove the solvent. The photoresist pattern positioned on the barrier rib coating layer is positioned only on the barrier rib coating layer on which the barrier rib 130 is to be formed. In this state, the barrier rib coating layer not covered by the photoresist pattern is etched to form the barrier rib 130. When the organic polymer constituting the partition 130 has a photosensitive characteristic, the partition 130 may be formed without using a separate photoresist pattern. That is, the partition 130 may be formed only by exposing and developing the partition coating layer using a mask. In addition, an opening that exposes the channel region B is also formed in the partition 130.

Next, as shown in FIG. 3B, the organic semiconductor layer 80 is formed using the shadow mask 200. In this case, the organic semiconductor forming the organic semiconductor layer 80 is preferably a low molecular material in order to be deposited on the insulating substrate 100 through the shadow mask 200. The shadow mask 200 may be aligned along the barrier rib 130 formed in the frame, and the organic semiconductor layer 80 may be easily formed in a predetermined opening.

Thereafter, as shown in FIG. 3C, the first passivation layer 140 is formed using the inkjet apparatus 300. It is preferable that the first passivation layer 140 is formed by an inkjet method so that the first passivation layer 140 primarily contacting the organic semiconductor layer 80 is formed with minimal impact on the organic semiconductor layer 80.

Finally, as shown in FIG. 3D, the second passivation layer 150 is formed on the barrier rib 130 and the first passivation layer 140 to complete the organic thin film transistor.

4A to 4D are views for explaining a method of manufacturing a display device according to another embodiment of the present invention. FIG. 4A is the same as that of FIG. 3A, in which the partition wall 130 is formed on the insulating substrate 100. Therefore, duplicate description is omitted.

Next, as shown in FIG. 4B, an organic semiconductor material is deposited on the entire surface of the insulating substrate 100 using the open mask 210. Of course, the organic semiconductor material deposited in the openings between the partitions 130 forms the organic semiconductor layer 80. When the open mask 210 is used, an organic semiconductor material is formed on the entire surface without depositing the organic semiconductor material only between the partition walls 130, so that a separate alignment process is omitted, thereby easily forming the organic semiconductor layer 80. There is this. Next, as shown in FIG. 4C, the first passivation layer 140 is formed using the inkjet device 300.

Then, as shown in Figure 4d, the organic semiconductor material deposited other than the channel region (B) is removed. During the etching process for removing the organic semiconductor material, the organic semiconductor layer 80 is safely protected by the first passivation layer 140, and in particular, the side surface of the organic semiconductor layer 80 is protected by the partition wall 130. .

Finally, when the second passivation layer 150 is formed, the organic thin film transistor as shown in FIG. 3D is completed.

Although some embodiments of the invention have been shown and described, it will be apparent to those skilled in the art that modifications may be made to the embodiment without departing from the spirit or spirit of the invention. . It is intended that the scope of the invention be defined by the claims appended hereto and their equivalents.

As described above, according to the present invention, a method of manufacturing a display device capable of safely forming an organic semiconductor layer is provided.

Claims (8)

Forming a drain electrode and a source electrode forming a data line, a gate line, a channel region on the insulating substrate; Forming a barrier rib on the drain electrode and the source electrode to expose the channel region; Forming an organic semiconductor layer in the channel region using a mask; And forming a first protective layer on the organic semiconductor layer by an inkjet method. The method of claim 1, Forming the organic semiconductor layer is a method of manufacturing a display device, characterized in that a shadow mask is used. The method of claim 1, An open mask is used to form the organic semiconductor layer, and further comprising removing the organic semiconductor layer formed outside the channel region. The method of claim 1, And forming a first insulating film interposed between the data line and the gate line, and a second insulating film interposed between the gate line, the drain electrode, and the source electrode. The method of claim 4, wherein And a contact hole for exposing a part of the data line is formed in the second insulating layer, and the data line and the drain electrode are electrically connected through the contact hole. The method of claim 1, And forming a second passivation layer on the barrier rib and the first passivation layer. The method of claim 1, And forming a pixel electrode electrically connected to the source electrode. The method of claim 7, wherein And the pixel electrode is integrally formed with the source electrode.

Images