KR20070102808A - Liquid crystal display panel and method of manufacturing the same - Google Patents

Abstract

A liquid crystal display panel and a method for manufacturing the same are provided to prevent non-hardening of an end seal by increasing a penetration rate of ultraviolet by a penetration hall which is installed in a guide line in an area overlapped with an end seal area, thereby preventing the end seal from being penetrated to an active area and an operation area. A liquid crystal display panel comprises the following units: a sealing line(132) for preparing a liquid crystal injecting inlet and an active area; an end seal(133) for closing the liquid crystal injecting inlet; a guard line(127), which is formed by closed state for blocking static electricity flowing to the active area, having at least one penetration hall(136) in an area overlapped with at least one of the sealing line and the end seal; a thin film transistor which is formed in the active area; and a liquid crystal cell which is connected to the thin film transistor.

Description

Liquid crystal display panel and its manufacturing method {LIQUID CRYSTAL DISPLAY PANEL AND METHOD OF MANUFACTURING THE SAME}

1 is a plan view illustrating a liquid crystal display panel according to the present invention.

FIG. 2 is a cross-sectional view illustrating the liquid crystal injection hole region and the active region cut along the line II-II ′ of FIG. 1.

3A to 3G are cross-sectional views illustrating a method of manufacturing a liquid crystal display panel according to the present invention.

4 is a plan view illustrating a liquid crystal display panel according to a second exemplary embodiment of the present invention.

<Description of the symbols for the main parts of the drawings>

101: lower substrate 104: data line

106: gate electrode 108: source electrode

110 drain electrode 112 gate insulating film

114: active layer 116: buffer film

118: protective film 120,124: contact hole

122: pixel electrode 126: interlayer insulating film

127: guard pattern 128: guard line

130: thin film transistor 132: seal line

133: end seal 134: liquid crystal injection hole

136 through hole 140 color filter substrate

142 short point 150 thin film transistor substrate

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display panel and a method for manufacturing the same, and more particularly, to a liquid crystal display panel and a method for manufacturing the same, which can prevent the uncured end seal applied to the liquid crystal injection hole.

Low-Temperature Polycrystalline Si (LTPS) using polysilicon has much higher electron mobility than using amorphous silicon, and thus can realize System On Glass. In the case of a system on glass in which a circuit is mounted on a substrate, the distance from the outer edge of the active region to the edge of the glass becomes very short as the resolution becomes higher.

In addition, the conventional liquid crystal display includes a guard line formed along the seal line to prevent static electricity from flowing into the active region. This guard line is formed to overlap not only the seal line but also the end seal for sealing the liquid crystal injection hole. However, since the ultraviolet rays for curing the end seal are blocked by this guard line, the end seal often fails to cure properly. At this time, the distance from the outer edge of the active area to the edge of the glass is very short, and the end seal cannot be cured, and thus a problem of penetration into the active area occurs. In order to solve this problem, if the guard line corresponding to the liquid crystal injection hole is removed, uncuring of the end seal can be prevented.

Accordingly, the technical problem of the present invention is to provide a liquid crystal display panel and a method of manufacturing the same that can prevent the uncured end seal applied to the liquid crystal injection hole.

In order to achieve the above object, the liquid crystal display panel of the present invention comprises a seal line formed to provide an active region and a liquid crystal injection hole; An end seal for sealing the liquid crystal injection hole; And a guard line formed in a closed shape to block static electricity flowing into the active region and having at least one through hole in a region overlapping at least one of the seal line and the end seal.

A thin film transistor formed in the active region and a liquid crystal cell connected to the thin film transistor are further provided.

The guard line may be formed of the same material on the same plane as the gate electrode of the thin film transistor.

The guard line is characterized in that the width in the region overlapping with the end seal by the transmission hole is narrower than the width in the remaining region.

The guard line may be formed by alternately forming a guard pattern and the transmission hole in a region overlapping the end seal.

The guard line may have at least one through hole in an area overlapping the seal line.

In order to achieve the above object, a method of manufacturing a liquid crystal display panel according to the present invention includes a thin film transistor substrate and a color filter substrate including a guard line formed in a closed shape along an active region and having at least one through hole. Coalescing; Injecting liquid crystal into the active region by using the liquid crystal injection hole provided by the seal line; And sealing the liquid crystal injection hole using an end seal, wherein the guard line has the through hole in an area overlapping at least one of the seal line and the end seal.

Other technical problems and features of the present invention in addition to the above technical problem will become apparent through the description of the embodiments with reference to the accompanying drawings. Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings.

1 is a plan view illustrating a liquid crystal display panel according to the present invention, and FIG. 2 is a cross-sectional view illustrating a liquid crystal injection hole region and an active region cut along the line II-II ′ of FIG. 1.

1 and 2, the liquid crystal display panel includes a thin film transistor substrate 150 and a color filter substrate 140 bonded to each other with a liquid crystal layer interposed therebetween, and an active area periphery of the thin film transistor substrate 150. The seal line 132 is formed along with the end seal 133 to prevent leakage of the liquid crystal after the liquid crystal is injected into the seal line 132, and the guard line 128 formed in the region overlapping the seal line 132. It includes.

The color filter substrate 140 includes a black matrix for preventing light leakage, a color filter for color bending, and a common electrode forming a vertical electric field with the pixel electrode.

The thin film transistor substrate 150 includes a TFT 130 connected to a gate line (not shown) and a data line 104. Here, the TFT 130 is formed of an N type or a P type, but only the case where the TFT 130 is formed of an N type will be described below.

The TFT 130 charges the pixel electrode 122 with the video signal. To this end, the TFT 130 includes a gate electrode 106 connected to a gate line (not shown), a source electrode 108 included in the data line 104, and a pixel contact hole 120 penetrating through the passivation layer 118. An active layer 114 is formed between the source electrode 108 and the drain electrode 110 by the drain electrode 110 and the gate electrode 106 connected to the pixel electrode 122.

The active layer 114 is formed on the lower substrate 101 with the buffer layer 116 interposed therebetween. The gate electrode 106 connected to the gate line (not shown) is formed to overlap the channel region 114C of the active layer 114 and the gate insulating layer 112 therebetween. The source electrode 108 and the drain electrode 110 are formed to be insulated from each other with the gate electrode 106 and the interlayer insulating layer 126 therebetween. The source electrode 108 and the drain electrode 110 included in the data line 104 may have a source contact hole 124S and a drain contact hole 124D passing through the interlayer insulating layer 126 and the gate insulating layer 112. Are connected to each of the source region 114S and the drain region 114D of the active layer 114 implanted with n + impurity. In addition, the active layer 114 may include a lightly doped drain (LDD) region (not shown) in which n− impurities are implanted between the channel region 114C and the source and drain regions 114S and 114D to reduce the off current. ) May be further provided.

The seal line 132 is formed around the active region of the thin film transistor substrate 150 to bond the thin film transistor substrate 150 and the color filter substrate 140 together. The seal line 132 is formed in the remaining region except for the liquid crystal injection hole 134 for injecting liquid crystal between the two bonded substrates 140 and 150.

The end seal 133 injects the liquid crystal into the active region through the liquid crystal injection hole 134 and seals the liquid crystal injection hole 134 so that the liquid crystal does not flow down. To this end, the end seal 133 is applied to the liquid crystal injection hole 134 after the liquid crystal injection process and cured by ultraviolet rays.

The guard line 128 is connected to the short point 142 to prevent static electricity from flowing into the active region and to close the static electricity flowing from the common electrode of the color filter substrate 140. The short point 142 connects the common electrode with a common voltage supply pad (not shown) formed on the lower substrate to supply a common voltage to the common electrode. This guard line 128 is formed on the same plane with the same metal as the gate 106. The guard line 128 is formed to have a first width in an area overlapping the seal line 132 and is transparent to the guard pattern 127 having a second width smaller than the first width in an area overlapping the end line 133. The holes 136 are alternately formed. Ultraviolet light passing through the plurality of transmission holes 136 may be prevented from being uncured by irradiating the end seal 133. As a result, even when the edge of the color filter substrate 140 and the guard line 128 are close to each other, the end seal 133 may be prevented from flowing into the driving circuit and the liquid crystal cell driving the active region. Meanwhile, the guard line 128 may be formed to have at least one through hole 136 to prevent uncuring of the seal line 132 even in a region overlapping the seal line 132.

3A to 3G are cross-sectional views illustrating a method of manufacturing a liquid crystal display panel according to the present invention.

Referring to FIG. 3A, a buffer layer 116 is formed on the lower substrate 101, and an active layer 114 is formed thereon.

The buffer layer 116 is formed by depositing an inorganic insulating material such as SiO ₂ on the lower substrate 101.

The active layer 114 deposits amorphous silicon on the buffer film 116 and crystallizes the amorphous silicon with a laser to become poly-silicon, and then pattern the poly-silicon by a photolithography process and an etching process. It is formed by.

Referring to FIG. 3B, the gate insulating layer 112 is formed on the buffer layer 116 on which the active layer 114 is formed, and the transmission hole 136 and the guard pattern 127 are alternately disposed in the liquid crystal injection hole region thereon. A first conductive pattern group including the guard line 128 and the gate electrode 106 formed thereon is formed.

The gate insulating layer 112 is formed by depositing an inorganic insulating material such as SiO ₂ on the buffer layer 116 on which the active layer 114 is formed.

The gate electrode 106 and the guard line 128 are formed by forming a gate metal layer on the gate insulating film 112, and then patterning the gate metal layer by a photolithography process and an etching process.

The n + impurity is implanted into the active layer 114 using the gate electrode 106 as a mask, so that the source region 114S and the drain region 114D of the active layer 114 which are not overlapped with the gate electrode 106 are formed. Is formed. The source and drain regions 114S and 114D of the active layer 114 face each other with the channel region 114C overlapping the gate electrode 106 interposed therebetween.

Referring to FIG. 3C, an interlayer insulating layer 126 is formed on the gate insulating layer 112 on which the first conductive pattern group is formed, and source and drain contact holes 124S penetrating through the interlayer insulating layer 126 and the gate insulating layer 112. , 124D).

The interlayer insulating layer 126 is formed by depositing an inorganic insulating material such as SiO ₂ on the gate insulating layer 112 on which the first conductive pattern group including the guard line 128 and the gate electrode 106 is formed.

Subsequently, the source and drain contact holes 124S exposing the source and drain regions 114S and 114D of the active layer 114 through the interlayer insulating layer 126 and the gate insulating layer 112 by photolithography and etching processes, respectively. 124D) is formed.

Referring to FIG. 3D, a second conductive pattern group including the data line 104, the source electrode 108, and the drain electrode 110 is formed on the interlayer insulating layer 126.

The second conductive pattern group including the data line 104, the drain electrode 110, and the source electrode 108 may form a source / drain metal layer on the interlayer insulating layer 126, and then photolithography the source / drain metal layer. It is formed by patterning in a process and an etching process.

The source electrode 104 and the drain electrode 110 are connected to each of the source region 114S and the drain region 114D of the first active layer 114 through the source and drain contact holes 124S and 124D, respectively.

Referring to FIG. 3E, a passivation layer 118 is formed on the interlayer insulating layer 126 on which the second conductive pattern group is formed, and a pixel contact hole 120 penetrating the passivation layer 118 is formed.

The passivation layer 118 is formed by depositing an organic insulating material such as an inorganic insulating material or photoacryl on the interlayer insulating layer 126 on which the data line 104 and the drain electrode 110 are formed.

Subsequently, the pixel contact hole 120 penetrating the passivation layer 118 and / or the interlayer insulating layer 126 is formed by a photolithography process and an etching process. The pixel contact hole 120 penetrates through the passivation layer 118 to expose the drain electrode 110 of the TFT 130.

Referring to FIG. 3F, a third conductive pattern group including the pixel electrode 122 is formed on the passivation layer 118.

The third conductive pattern group including the pixel electrode 122 is formed by depositing a transparent conductive film such as ITO on the protective film 118 and then patterning the transparent conductive film by a photolithography process and a dry etching process.

Referring to FIG. 3G, a seal line 132 is formed around the active region of the thin film transistor substrate 150, and the thin film transistor substrate 150 and the color filter substrate 140 are bonded together using the seal line 132. Let's do it. Then, after the liquid crystal is injected into the active region through the liquid crystal injection hole, the liquid crystal injection hole is sealed with an end seal. The sealed end seal 133 is cured by irradiating ultraviolet rays.

4 is a plan view illustrating a liquid crystal display panel according to a second exemplary embodiment of the present invention.

In the liquid crystal display panel illustrated in FIG. 4, except for the guard line 128 overlapping the liquid crystal injection hole 134, detailed descriptions of components overlapping with those of the first exemplary embodiment will be omitted.

The guard line 128 is connected to the short point 142 and is formed in a closed shape to prevent static electricity from entering the active region and to block static electricity flowing from the common electrode of the color filter substrate 140. The common electrode is connected to a common voltage supply pad (not shown) formed on the lower substrate to supply a common voltage to the common electrode. This guard line 128 is formed on the same plane with the same metal as the gate 106. The guard line 128 is formed to have a first width in an area overlapping with the seal line 132, and a transmission hole 136 for removing one end of the guard line 128 in an area overlapping with the end seal 133. By a second width thinner than the first width. Ultraviolet rays are irradiated through the transmission hole 136 and irradiated to the end seal 133 to prevent the end seal 133 from being uncured. As a result, even when the edge of the color filter substrate 140 and the guard line 128 are close to each other, the end seal 133 may be prevented from flowing into the circuit and the liquid crystal cell driving the active region.

As described above, in the liquid crystal display panel according to the present invention and a method of manufacturing the same, the transmittance of ultraviolet rays is relatively increased by the through holes formed in the guard lines in the overlapping regions of the end seal region, thereby preventing uncuring of the end seal. .

Accordingly, the liquid crystal display panel and the method of removing the same according to the present invention can prevent the end seal from penetrating into the active region and the driving circuit.

In addition, the liquid crystal display panel and the method of manufacturing the same according to the present invention can prevent the introduction of static electricity by using a guard line, thereby improving reliability.

Although the detailed description of the present invention described above has been described with reference to a preferred embodiment of the present invention, those skilled in the art or those skilled in the art, those skilled in the art, described in the claims below It will be understood that various modifications and changes can be made in the present invention without departing from the spirit and scope of the invention.

Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (10)

A seal line formed to provide an active region and a liquid crystal injection hole; An end seal for sealing the liquid crystal injection hole; And a guard line formed in a closed shape to block static electricity flowing into the active area and having at least one through hole in an area overlapping at least one of the seal line and the end seal. The method of claim 1, A thin film transistor formed in the active region; And a liquid crystal cell connected to the thin film transistor. The method of claim 2, And the guard line is formed of the same material on the same plane as the gate electrode of the thin film transistor. The method of claim 1, And the guard line has a width in a region overlapping with the end seal by the transmission hole smaller than a width in the remaining region. The method of claim 1, And wherein the guard line alternately forms a guard pattern and the transmission hole in a region overlapping the end seal. The method of claim 1, And the guard line has at least one through hole in an area overlapping the seal line. Bonding the thin film transistor substrate and the color filter substrate including a guard line formed in a closed shape along the active region and having at least one through hole using a seal line; Injecting liquid crystal into the active region by using the liquid crystal injection hole provided by the seal line; Sealing the liquid crystal injection hole using an end seal, And the guard line has the through hole in an area overlapping at least one of the seal line and the end seal. The method of claim 7, wherein And the guard line is formed of the same material on the same plane as the gate electrode of the thin film transistor. The method of claim 7, wherein And the guard line has a width in a region overlapping with the end seal by the transmission hole smaller than a width in the remaining region. The method of claim 7, wherein And the guard line is alternately formed with the guard pattern in an area overlapping the end seal.

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