KR20070101060A - Display panel - Google Patents

Abstract

A liquid crystal display panel is provided to make the variation width of light transmittance of a second pixel unit equal to the variation width of light transmittance of a first pixel unit and prevent a stain due to luminance difference in the display panel from being generated, thereby improving display quality of an image. A liquid crystal display panel comprises the following parts: gate lines which are formed by a first direction; data lines, which are formed by a second direction, for defining unit pixels; a first circuit board having a thin film transistor for controlling pixel electrodes; a second circuit board having a common electrode installed in the front part; and a liquid crystal layer which is comprised of liquid crystals installed between the first circuit board and the second circuit board. The pixel electrodes(150) have a first pixel unit and a second pixel unit which is separated from the first pixel unit in the first direction wherein the second pixel unit has the same shape as the first pixel unit.

Description

 Display panel {DISPLAY PANEL}

1 is a plan view illustrating unit pixels of a display panel according to a first exemplary embodiment of the present invention.

FIG. 2 is a cross-sectional view taken along the line II ′ of FIG. 1.

3 is a circuit diagram illustrating a unit pixel of FIG. 1.

4 is a plan view illustrating unit pixels of a display panel according to a second exemplary embodiment of the present invention.

5 is a circuit diagram illustrating a unit pixel of FIG. 4.

6 is a waveform diagram illustrating signals in the circuit diagram of FIG. 5.

<Explanation of symbols for main parts of the drawings>

100: first substrate TFT: thin film transistor

DE: contact electrode FE: floating electrode

150 pixel electrode 152 first pixel portion

152-a: first outer electrode 152-b: first center electrode

154: second pixel portion 154-a: second outer electrode

154-b: second center electrode 200: second substrate

240: common electrode 242: first domain divider

244: second domain divider

The present invention relates to a display panel, and more particularly, to a display panel with improved display quality of an image.

In general, a liquid crystal display includes a liquid crystal display panel for displaying an image using light transmittance of liquid crystal and a light crystal display panel disposed under the liquid crystal display panel to provide light to the liquid crystal display panel. And a back-light assembly.

The liquid crystal display panel includes a first substrate having a thin film transistor and a pixel electrode, a second substrate having a color filter and a common electrode, and a liquid crystal interposed between the first and second substrates. Layer.

The thin film transistor is electrically connected to the pixel electrode to charge the pixel electrode. The charged pixel electrode generates an electric field between the common electrode, and the generated electric field changes the light transmittance by changing the arrangement of the liquid crystals.

In recent years, the pixel electrode is divided into two sub-electrodes in order to improve the side viewing angle of the liquid crystal display panel, and different voltages are applied to the separated sub-electrodes. That is, the pixel electrode includes a first pixel portion and a second pixel portion to which different voltages are applied. Here, the pixel electrode includes the first and second pixel units, and thus the pixel electrodes have an asymmetric shape.

However, when the pixel electrode is formed, an alignment miss may occur in a process. When the misalignment occurs, the first and second pixel parts may be formed as the pixel electrode has an asymmetric shape. Differences in light transmittance may occur. As such, when a difference in light transmittance between the first and second pixel units occurs, unevenness is generated on the liquid crystal display panel, thereby degrading display quality.

Accordingly, the technical problem of the present invention is to solve such a conventional problem, and an object of the present invention is to provide a display panel which improves the display quality of an image by preventing a difference in light transmittance due to alignment miss.

According to an exemplary embodiment of the present invention, a display panel includes a first substrate, a second substrate, and a liquid crystal layer.

The first substrate may include gate wires formed in a first direction, data wires formed in a second direction perpendicular to the first direction to define unit pixels, pixel electrodes formed in the unit pixels, and the pixel electrodes. And controlling thin film transistors. Each of the pixel electrodes includes a first pixel portion and a second pixel portion spaced apart from the first pixel portion in the first direction and having the same shape as the first pixel portion.

On the other hand, the second substrate includes a common electrode formed on the front surface facing the first substrate to form an electric field between the pixel electrodes, the liquid crystal layer is interposed between the first and second substrate Consisting of liquid crystals.

In some embodiments, a contact electrode may be formed at a position corresponding to the first pixel portion, and a floating electrode may be formed at a position corresponding to the second pixel portion. In detail, the contact electrode is electrically connected to the drain electrode of the thin film transistor, is electrically connected to the first pixel portion through a contact hole, and the floating electrode is electrically connected to the contact electrode. The pixel unit is spaced apart from the predetermined distance. The first pixel portion receives a first voltage from the contact electrode, and the second pixel portion receives a second voltage lower than the first voltage by being spaced apart from the floating electrode by a predetermined distance.

Alternatively, the thin film transistor may include a first switching unit electrically connected to the first pixel unit and applying the first voltage, and a second switching unit electrically connected to the second pixel unit and applying the second voltage. It may include. The display panel may further include a storage line including a first storage unit formed in the second direction to cross the first pixel unit and a second storage unit formed in the second direction to cross the second pixel unit. It is desirable to. In this case, a first switching voltage for switching at a predetermined frequency is applied to the first storage unit, and a second switching voltage for switching to have a phase opposite to the first switching voltage is applied to the second storage unit.

According to the present invention, since the first and second pixel portions constituting the pixel electrode are formed to be spaced apart from each other along the gate wiring, different voltages are applied, and have the same shape, alignment misalignment occurs when forming the pixel electrode. Even if it is possible to prevent the difference in the light transmittance between the first and second pixel portion, it is possible to further improve the display quality of the image.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

<First Embodiment of Display Panel>

1 is a plan view illustrating unit pixels of a display panel according to a first exemplary embodiment of the present invention, and FIG. 2 is a cross-sectional view taken along the line II ′ of FIG. 1.

1 and 2, the display panel according to the present exemplary embodiment includes a first substrate 100, a second substrate 200, and a liquid crystal layer 300.

The first substrate 100 may include a first transparent substrate 110, a gate wiring GL, a data wiring DL, a storage wiring SL, a gate insulating film 120, a thin film transistor TFT, a protective film 130, The organic insulating layer 140 includes a pixel electrode 150, a contact electrode PE, a floating electrode FE, and a connection electrode CE.

The first transparent substrate 110 has a plate shape and is made of a transparent material. The first transparent substrate 110 is made of, for example, glass, quartz, sapphire or transparent synthetic resin.

The gate line GL and the data line DL are formed to cross each other perpendicularly. In detail, the gate lines GL are formed to extend in the first direction, and a plurality of gate lines GL are formed in parallel along the second direction perpendicular to the first direction. On the other hand, the data lines DL are formed to extend in the second direction so as to cross the gate lines GL, and a plurality of data lines DL are formed in parallel in the first direction. As such, as the gate lines GL and the data lines DL are formed to cross each other, a plurality of unit pixels are defined, and the thin film transistor TFT and the pixel electrode 150 are defined in each of the unit pixels. Is formed. Here, each of the unit pixels preferably has a substantially square shape in plan view.

The gate line GL is formed on the first transparent substrate 110. In addition, the storage line SL is formed on the first transparent substrate 110. The storage line SL includes the main line SL-a formed in the first direction and the sub lines SL-b extending in the second direction from the main line SL-a. In this case, the sub wirings SL-b overlap the portion of the pixel electrode 150.

The gate insulating layer 120 is formed on the first transparent substrate 110 to cover the gate line GL and the storage line SL. The data line DL is formed on the gate insulating layer 120 and electrically insulated from the gate line GL.

The thin film transistor TFT includes a gate electrode G, a source electrode S, a drain electrode D, an active layer A, and an ohmic contact layer O.

The gate electrode G extends in the second direction from the gate wiring GL and has a rectangular shape when viewed in plan view. The active layer A is formed on the gate electrode G. The active layer A is made of a semiconductor material. For example, the active layer A is made of amorphous silicon (a-Si).

The source electrode S extends in the first direction from the data line DL and overlaps a part of the active layer A. FIG. The drain electrode D is formed to be spaced apart from the source electrode S by a predetermined distance, and extends in the first direction to be electrically connected to the contact electrode PE. A part of the drain electrode D overlaps with a part of the active layer A. FIG. Here, the source electrode S is preferably formed by extending a pair in the first direction between the drain electrode D.

On the other hand, an ohmic contact layer O is formed between the active layer A and the source electrode S, and between the active layer A and the drain electrode D. FIG. The ohmic contact layer O is made of, for example, high-density ion-doped amorphous silicon (n + a-Si), between the active layer A and the source electrode S, and between the active layer A and the drain electrode D. To reduce the contact resistance.

The passivation layer 130 is formed on the gate insulating layer 120 to cover the thin film transistor TFT. As a result, the passivation layer 130 protects the thin film transistor TFT from external physical or chemical effects. The organic insulating layer 140 is formed on the entire surface of the passivation layer 130 to planarize the surface. Meanwhile, a contact hole 142 is formed on the contact electrode PE. That is, the contact hole 142 is formed as a portion of the passivation layer 130 and the organic insulating layer 140 are etched and opened.

The pixel electrode 150 is formed in each unit pixel, and is formed on the organic insulating layer 150. The plurality of pixel electrodes 150 may be made of a transparent conductive material. For example, indium tin oxide (ITO), indium zinc oxide (IZO), amorphous indium tin oxide, and the like. a-ITO) and the like.

Each of the pixel electrodes 150 includes a first pixel portion 152 to which a first voltage is applied and a second pixel portion 154 to which a second voltage lower than the first voltage is applied. In this case, the second pixel portion 154 is formed to be spaced apart from the first pixel portion 152 in the first direction and has the same shape as the first pixel portion 152.

In detail, the first pixel unit 152 includes a first outer electrode 152-a and a first center electrode 152-b electrically connected to each other. The first outer electrode 152-a and the first center electrode 152-b have a symmetrical shape along the second direction, for example, have a V-shape. Here, the first outer electrode 152-a is formed at the outer side of the first center electrode 152-b. Meanwhile, the first pixel unit 152 is electrically connected to the drain electrode D through the contact hole 142.

Like the first pixel unit 152, the second pixel unit 154 includes a second outer electrode 154-a and a second center electrode 154-b electrically connected to each other. The second outer electrode 154-a and the second center electrode 154-b have the same shape as the first outer electrode 152-a and the first center electrode 152-b.

Here, the sub wirings SL-b of the storage line SL overlap the portion of the first pixel portion 152 and the portion of the second pixel portion 154. Specifically, for example, the sub wirings SL-b of the storage line SL may overlap both ends in the first direction of the first pixel portion 152 and both ends in the first direction of the second pixel portion 154. It is preferably formed.

The contact electrode PE is formed at a position corresponding to the first pixel portion 152 and is electrically connected to the drain electrode D of the thin film transistor TFT. The contact electrode PE is electrically connected to the first pixel portion 152 through the contact hole 142.

The floating electrode FE is formed at a position corresponding to the second pixel portion 154 and is electrically connected to the contact electrode PE. As a result, the floating electrode FE may be electrically connected to the drain electrode D of the thin film transistor TFT. In this case, the electrical connection between the floating electrode FE and the contact electrode PE is made by the connection electrode CE. The floating electrode FE is preferably formed at the center of the second pixel portion 154.

Here, the first pixel portion 152 is electrically connected to the drain electrode D to receive the first voltage from the drain electrode D, and the second pixel portion 154 has a predetermined distance from the floating electrode FE. Spaced apart, a second voltage is applied.

The second substrate 200 facing the first substrate 100 may include a second transparent substrate 210, a light blocking film 220, a color filter 230, and a common electrode 240.

The second transparent substrate 210 has a plate shape like the first transparent substrate 110 and is made of a transparent material.

The light blocking film 220 is formed on a portion of the second transparent substrate 210 to face the first transparent substrate 110 to block the movement of light. The light blocking film 220 is preferably formed at a position corresponding to the gate line GL, the data line DL, and the thin film transistor TFT.

The color filter 230 is formed on the second transparent substrate 210 to cover the light blocking film 220. The color filter 230 is formed at a position corresponding to the pixel electrodes 250 formed in the unit pixels. The color filter 230 may include, for example, a red color filter, a green color filter, and a blue color filter. Alternatively, the color filter 230 may include a black color filter.

The common electrode 240 is formed on the color filter 230. Like the pixel electrode 150, the common electrode 240 is made of a transparent conductive material.

Meanwhile, the second substrate 200 further includes a first domain divider 242 and a second domain divider 244. In the present exemplary embodiment, the first and second domain divisions 242 and 244 are openings formed by etching part of the common electrode 240. Alternatively, the first and second domain divisions 242 and 244 may be protrusions formed on a part of the common electrode 240.

In detail, the first domain divider 242 is formed at a position corresponding to the first pixel portion 152 to form a plurality of domains. The first domain divider 242 includes a first outer divider 242-a and a first center divider 242-b. Preferably, the first outer division part 242-a is formed along the center of the first outer electrode 152-a, and the first center division part 242-b is the first center electrode 152-b. Is formed along the center.

Meanwhile, the second domain divider 244 is formed at a position corresponding to the second pixel portion 154 to form a plurality of domains. The second domain divider 244 includes a second outer divider 244-a and a second center divider 244-b. Preferably, the second outer division part 244-a is formed along the center of the second outer electrode 154-a, and the second central division part 244-b is the second center electrode 154-b. Is formed along the center.

The liquid crystal layer 300 is composed of liquid crystals interposed between the first substrate 100 and the second substrate 200. The liquid crystals of the liquid crystal layer 300 are rearranged by an electric field formed between the pixel electrode 150 and the common electrode 240. The rearranged liquid crystal layer 300 adjusts the light transmittance of light applied from the outside to display an image.

Meanwhile, in the present exemplary embodiment, the liquid crystals of the liquid crystal layer 300 disposed in the unit pixel are aligned in four directions perpendicular to each other. In order to align the liquid crystals in this manner, the first and second pixel units 152 and 154 have a symmetrical shape with respect to an imaginary center line crossing the center of each unit pixel in parallel with the first direction. It can be divided into two parts based on the center line of the upper domain partition and the lower domain partition.

Specifically, the upper domain divider is formed above the centerline, and serves to align the liquid crystals along a third direction inclined at an acute angle with respect to a first direction, and the lower domain divider is formed below the centerline. The alignment of the liquid crystals is performed along the fourth direction perpendicular to the third direction. As such, when the liquid crystals of the liquid crystal layer 300 disposed in the unit pixel are aligned in four perpendicular directions, the viewing angle of the display panel may be further improved.

3 is a circuit diagram illustrating a unit pixel of FIG. 1.

Referring to FIG. 3, the display panel according to the present exemplary embodiment will be described in terms of circuits.

The gate line GL and the data line DL are vertically formed to cross each other. The gate electrode G of the thin film transistor TFT is electrically connected to the gate line GL, the source electrode S is electrically connected to the data line DL, and the drain electrode D is an A-pixel ( Electrically connected to A-Pixel). Here, the A-pixel is the first pixel portion 152.

The drain electrode D of the thin film transistor TFT is also connected to the floating electrode FE. In this case, the floating electrode FE is formed below the B-pixel B-Pixel to form the floating capacitor Ccp between the floating electrode FE and the B-pixel B-Pixel. Here, the B-pixel B-Pixel is the second pixel portion 154.

Meanwhile, the A-Pixel forms the first storage capacitor Cst-a with the storage line SL, and the first liquid crystal capacitor Clc-a with the common electrode 240. ). Similarly, the B-pixel B-Pixel forms the second storage capacitor Cst-b with the storage line SL, and the second liquid crystal capacitor Clc- with the common electrode 240. b) is formed.

Accordingly, the A-pixel A-Pixel is electrically connected to the drain electrode D, and charge is applied to the first voltage by applying charge from the drain electrode D. FIG. The B-pixel B-Pixel is charged to the second voltage lower than the first voltage by the floating capacitor Ccp.

According to the present exemplary embodiment, the first and second pixel units 152 and 154 to which the different first and second voltages are respectively applied are formed to be spaced apart from each other in the first direction and have the same shape. When the first and second pixel units 152 and 154 have the above-described shape, even when an alignment miss occurs when the pixel electrode 150 is formed through a photo process by a mask, the first and second pixel units 152 and 154 may be formed. Alignment errors occur in the same size at 152 and 154 so that the light transmittance change width of the first pixel portion 152 and the light transmittance change width of the second pixel portion 154 are the same. As such, when the light transmittance variation ranges of the first and second pixel units 152 and 154 are the same, the occurrence of unevenness due to the luminance difference on the display panel can be prevented, and as a result, the display quality of the image is further improved. You can.

Second Embodiment of Display Panel

4 is a plan view illustrating unit pixels of a display panel according to a second exemplary embodiment of the present invention.

Referring to FIG. 4, the display panel according to the present exemplary embodiment includes a first substrate, a second substrate, and a liquid crystal layer.

The first substrate includes a first transparent substrate, a gate wiring GL, a data wiring DL, a storage wiring, a gate insulating film, a thin film transistor, a protective film, an organic insulating film, and a pixel electrode 150.

The first transparent substrate has a plate shape and is made of a transparent material. The gate line GL is formed on the first transparent substrate. The gate insulating layer is formed on the first transparent substrate to cover the gate line GL. The data line DL and the storage line are formed on the gate insulating layer.

The gate lines GL extend in the first direction and are formed in parallel in a second direction perpendicular to the first direction. The data lines DL are formed to extend in the second direction to cross the gate lines GL, and a plurality of data lines DL are formed in parallel in the first direction.

As such, as the gate lines GL and the data lines DL are formed to cross each other, a plurality of unit pixels are defined, and the thin film transistor TFT and the pixel electrode 150 are defined in each of the unit pixels. Is formed. Here, each of the unit pixels preferably has a substantially square shape in plan view.

The pixel electrode 150 is formed in each unit pixel and is made of a transparent conductive material. Each of the pixel electrodes 150 includes a first pixel unit 152 to which a first voltage is applied and a second pixel unit 154 to which a second voltage lower than the first voltage is applied. The first pixel portion 152 is formed on the right side around the data line DL, and the second pixel portion 154 is formed on the left side around the data line DL. The first pixel portion 152 and the second pixel portion 154 have the same shape. Here, the first pixel portion 152 and the second pixel portion 154 according to the present embodiment have the same shape as the first pixel portion 152 and the second pixel portion 154 according to the first embodiment. Detailed description will be omitted.

The storage line is formed in parallel with the data line DL and includes a first storage unit SL1 and a second storage unit SL2. The first storage unit SL1 is formed on the right side around the data line DL, and the second storage unit SL2 is formed on the left side around the data line DL. In detail, the first storage unit SL1 is formed along the second direction to cross the first pixel unit 152, and the second storage unit SL2 crosses the second pixel unit 154. It is formed along the second direction.

The thin film transistor includes a first transistor TFT1 electrically connected to the first pixel unit 152 and a second transistor TFT2 electrically connected to the second pixel unit 154. The first transistor TFT1 and the second transistor TFT2 have a symmetrical shape with respect to the data line DL.

In detail, the first transistor TFT1 includes a first gate electrode G1, a first source electrode S1, a first drain electrode D1, and a first active layer A1. The first gate electrode G1 extends in the second direction from the gate line GL, and the first active layer A1 is formed on the first gate electrode G1. The first source electrode S1 is branched from the data line DL to have an L-shape, and overlaps with a portion of the first active layer A1, and the first drain electrode D1 is formed of the first source electrode. It is formed to be spaced apart from the predetermined distance (S1) and overlap a part of the first active layer A1, and is formed along the second direction.

The second transistor TFT2 includes a second gate electrode G2, a second source electrode S2, a second drain electrode D2, and a second active layer A2. Specific shapes of the second gate electrode G2, the second source electrode S2, the second drain electrode D2, and the second active layer A2 may include the first gate electrode G1 and the first source electrode S1. The first drain electrode D1 and the first active layer A1 are the same.

The passivation layer is formed on the gate insulating layer to cover the thin film transistor. The organic insulating film is formed on the entire surface of the protective film to planarize the surface. The pixel electrode 150 is formed on the organic insulating layer.

A first contact hole 142 and a second contact hole 144 are formed in the passivation layer and the organic insulating layer. The first contact hole 142 is formed on the first drain electrode D1 to electrically connect the first drain electrode D1 and the first pixel portion 152. The second contact hole 144 is formed on the second drain electrode D2 to electrically connect the second drain electrode D2 and the second pixel portion 154.

The second substrate facing the first substrate includes a second transparent substrate, a light blocking film, a color filter, and a common electrode 240. Since the second substrate according to the present embodiment is the same as the second substrate 200 according to the first embodiment, detailed description thereof will be omitted.

The liquid crystal layer is composed of liquid crystals interposed between the first substrate and the second substrate. The liquid crystals of the liquid crystal layer are rearranged by an electric field formed between the pixel electrode 150 and the common electrode 240.

Meanwhile, in the present embodiment, in order to align the liquid crystals of the liquid crystal layer disposed in the unit pixel in four directions perpendicular to each other, the first and second pixel units 152 and 154 may be divided into upper domain portions as in the first embodiment. It can be divided into two parts: installment and lower domain partition.

5 is a circuit diagram illustrating a unit pixel of FIG. 4.

Referring to FIG. 5, the display panel according to the present embodiment will be described in terms of circuits.

The gate line GL and the data line DL are vertically formed to cross each other. The first storage unit SL1 is formed parallel to the data line DL on the right side of the data line DL, and the second storage unit SL2 is parallel to the data line DL on the left side of the data line DL. Is formed. The first transistor TFT1 is formed on the right side of the data line DL, and the second transistor TFT2 is formed on the left side of the data line DL.

In detail, the first gate electrode G1 of the first transistor TFT1 is electrically connected to the gate line GL, and the first source electrode S1 is electrically connected to the data line DL. The drain electrode D1 is electrically connected to the A-pixel. Here, the A-pixel is the first pixel portion 152.

Similarly, the second gate electrode G2 of the second transistor TFT2 is electrically connected to the gate line GL, and the second source electrode S2 is electrically connected to the data line DL. The drain electrode D2 is electrically connected to the B-pixel B-Pixel. Here, the B-pixel B-Pixel is the second pixel portion 154.

The A-Pixel forms a first storage capacitor Cst-a between the first storage unit SL1 and the first liquid crystal capacitor Clc between the common electrode 240. -a) is formed. Similarly, the B-pixel B-Pixel forms the second storage capacitor Cst-b between the second storage unit SL2 and the second liquid crystal capacitor between the common electrode 240. Clc-b).

6 is a waveform diagram illustrating signals in the circuit diagram of FIG. 5.

Referring to FIG. 6, a first switching voltage for switching at a predetermined frequency is applied to the first storage unit SL1. In this case, the first switching voltage has a voltage of a square wave oscillating at 1H. A second switching voltage is applied to the second storage unit SL2 so as to have a phase opposite to that of the first switching voltage.

On the other hand, when the gate-on signal is applied to the gate line GL, the data signals applied to the data line DL are A-pixels and B- through the first and second transistors TFT1 and TFT2. It is applied to the pixel B-Pixel to charge it. In this case, the first storage unit SL1 corresponding to the A-pixel A-Pixel has the voltage of the first switching voltage, and the second storage unit SL2 corresponding to the B-pixel B-Pixel As the second switching voltage having a phase opposite to the first switching voltage has a voltage, the A-pixel and the B-pixel also have oscillating voltages that vibrate with each other.

In one example, A-Pixel has a first voltage oscillating higher than the reference voltage V, and B-Pixel has a second voltage oscillating lower than the reference voltage V. . In this case, since the average value of the first voltage has a value greater than the reference voltage V, and the average value of the second voltage has a value less than the reference voltage V, the A-pixel A-Pixel has a value B-. It has a voltage relatively higher than that of the pixel B-Pixel.

According to the present exemplary embodiment, the first and second pixel units 152 and 154 to which different voltages are respectively applied have the same shape so as to be symmetrical about the data line DL. As a result, even when an alignment miss occurs when the pixel electrode 150 is formed, alignment misses are generated in the first and second pixel units 152 and 154 with the same size, so that the luminance difference on the display panel is reduced. The occurrence of stains can be prevented.

According to the present invention, the first and second pixel portions receiving different first and second voltages, respectively, are formed to be spaced apart from each other in the first direction, and have the same shape to form pixel electrodes. Even when an alignment miss occurs, an alignment miss occurs with the same size as each other in the first and second pixel units.

Therefore, the light transmittance change width of the first pixel portion and the light transmittance change width of the second pixel portion are the same, thereby preventing the occurrence of unevenness due to the luminance difference on the display panel, thereby improving the display quality of the image.

In the detailed description of the present invention described above with reference to the preferred embodiments of the present invention, those skilled in the art or those skilled in the art having ordinary skill in the art will be described in the claims to be described later It will be understood that various modifications and variations can be made in the present invention without departing from the scope of the present invention.

Claims (12)

Gate lines formed in a first direction, data lines formed in a second direction perpendicular to the first direction to define unit pixels, pixel electrodes formed in the unit pixels, and thin film transistors controlling the pixel electrodes. A first substrate having; A second substrate having a common electrode formed on a front surface thereof to face the first substrate; And A liquid crystal layer comprising liquid crystals interposed between the first and second substrates, Each of the pixel electrodes includes a first pixel portion and a second pixel portion spaced apart from the first pixel portion in the first direction and having the same shape as the first pixel portion. The display panel of claim 1, wherein each of the unit pixels has a substantially square shape when viewed in plan view. The display device of claim 1, wherein a contact electrode is formed at a position corresponding to the first pixel portion, and a floating electrode is formed at a position corresponding to the second pixel portion. The contact electrode is electrically connected to the drain electrode of the thin film transistor, and is electrically connected to the first pixel portion through a contact hole. The floating electrode is electrically connected to the contact electrode and is spaced apart from the second pixel portion by a predetermined distance. The display device of claim 3, wherein the first pixel portion receives a first voltage from the contact electrode. And the second pixel unit receives a second voltage lower than the first voltage by being spaced apart from the floating electrode by a predetermined distance. 4. The storage device of claim 3, further comprising: a main wiring formed in the first direction and sub wirings formed along the second direction so as to overlap a portion of the first and second pixel portions from the main wiring. Display panel, characterized in that. The thin film transistor of claim 1, wherein the thin film transistor is A first switching unit electrically connected to the first pixel unit; And And a second switching unit electrically connected to the second pixel unit. The display panel of claim 6, wherein the first and second switching units have a symmetrical shape with respect to the data line. 7. The storage device of claim 6, further comprising: a storage wiring having a first storage portion formed in the second direction to cross the first pixel portion and a second storage portion formed in the second direction to cross the second pixel portion. Display panel characterized in that. The method of claim 8, wherein the first storage unit is applied with a first switching voltage for switching at a predetermined frequency, And a second switching voltage for switching the second storage unit to have a phase opposite to that of the first switching voltage. The display device of claim 9, wherein the first pixel unit receives the first switching voltage to form a first voltage. And the second pixel unit receives the second switching voltage to form a second voltage lower than the first voltage. The display panel of claim 1, wherein the first and second pixel units have a symmetrical shape with respect to an imaginary center line crossing the center of the unit pixel in parallel with the first direction. The method of claim 11, wherein the first and second pixel units An upper domain dividing unit formed above the center line and aligning the liquid crystals along a third direction inclined at an acute angle with respect to the first direction; And And a lower domain dividing unit formed under the center line and aligning the liquid crystals in a fourth direction perpendicular to the third direction.

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