KR20070094060A - Display device - Google Patents

Abstract

A display apparatus is provided to prevent a blurring phenomenon by performing various impulsive driving operations based on a separation, which a frame is divided into plural intervals, using a high speed frame memory. A display apparatus includes plural pixels(PX), a scan driver(400), a frame memory(650) and a data driver(500). The scan driver supplies a scan signal to the plural pixels in each of three intervals for forming a frame. The frame memory stores an input image signal of the frame and outputs the stored input image signal during at least two of the plural intervals. The data driver converts an image signal from the frame memory into an image data voltage, supplies the image data voltage to the plural pixels during at least two intervals, and supplies a black data voltage to the plural pixels during the rest intervals.

Description

Display device {DISPLAY DEVICE}

1 is a block diagram of an organic light emitting diode display according to an exemplary embodiment of the present invention.

2 is an equivalent circuit diagram of one pixel of an organic light emitting diode display according to an exemplary embodiment of the present invention.

3 is a block diagram of a frame memory unit of an organic light emitting diode display according to an exemplary embodiment of the present invention.

4 is a waveform diagram of a clock signal of the frame memory unit of FIG. 3.

5 is a signal waveform diagram illustrating an operation of an organic light emitting diode display according to an exemplary embodiment of the present invention.

6 is a schematic diagram illustrating a screen of an organic light emitting diode display shown in FIG. 5.

7 is a signal waveform diagram illustrating an operation of an organic light emitting diode display according to another exemplary embodiment of the present invention.

FIG. 8 is a schematic diagram illustrating a screen of an organic light emitting diode display shown in FIG. 7.

<Description of Drawing>

300 ... Display panel 400 ... Scan drive

500 ... Data driver 600 ... Signal controller

650 ... Frame memory section 800 ... Gradation voltage generator

654 Memory ... 654

R, G, B ... input video signal DE ... data enable signal

Hsync ... Horizontal Sync Signal Vsync ... Vertical Sync Signal

MCLK ... multi-clock CONT1 ... scan control signal

CONT2 ... data control signal DAT ... image data

Von ... high voltage Voff ... low voltage

D ₁ -D _m ... data line .G ₁ -G _n ...

PX ... pixel Vcom ... common voltage

Vdd ... driving voltage Qs ... switching transistor

Qd ... drive transistor Cst ... capacitor

LD ... organic light emitting element I _LD ... driving current

CLKin ... input clock signal CLKout ... output clock signal

1FT ... frame Vdat ... data voltage

V _DAT ... image data voltage V _BLACK ... black data voltage

Vg ₁ -Vg _n ... scanning signal

The present invention relates to a display device.

In recent years, with the reduction in weight and thickness of personal computers and televisions, display devices are also required to be lighter and thinner, and cathode ray tubes (CRTs) are being replaced by flat panel displays.

Such flat panel displays include an organic light emitting display (LCD), a field emission display (FED), an organic light emitting display, and a plasma display panel (PDP). Etc.

In general, in an active flat panel display, a plurality of pixels are arranged in a matrix form, and an image is displayed by controlling the light intensity of each pixel according to given luminance information. The organic light emitting diode display is a display device that displays an image by electrically exciting the fluorescent organic material. The organic light emitting diode display is self-luminous, has low power consumption, and has a fast response time of pixels, thereby easily displaying high quality video.

The organic light emitting diode display includes an organic light emitting diode (OLED) and a thin film transistor (TFT) driving the organic light emitting diode (OLED). The thin film transistor is classified into a polysilicon thin film transistor and an amorphous silicon thin film transistor according to the type of the active layer. The organic light emitting diode display employing the polysilicon thin film transistor has many advantages, and thus is widely used. However, the manufacturing process of the thin film transistor is complicated and thus the cost increases. In addition, it is difficult to obtain a large screen with such an organic light emitting display device. On the other hand, an organic light emitting diode display employing an amorphous silicon thin film transistor is easy to obtain a large screen and has a relatively smaller manufacturing process than an organic light emitting diode display employing a polysilicon thin film transistor.

However, since the organic light emitting diode display is a hold type display device, blurring may occur when an edge of an object is not clear and blurred when displaying a moving image.

Accordingly, an object of the present invention is to provide an organic light emitting display device capable of preventing blurring.

According to an aspect of the present invention, there is provided a display device including a scan driver configured to supply a scan signal to a plurality of pixels in each of at least three sections forming a plurality of pixels and a frame, and an input image signal of the frame. And a frame memory unit for outputting the stored input image signal for at least two of the plurality of sections, and converting the image signal from the frame memory into an image data voltage, and for the at least two sections. And a data driver for supplying a voltage to the plurality of pixels and supplying a black data voltage to the plurality of pixels for the remaining periods.

The image data voltages supplied to the pixels during different sections may be the same.

The data driver may supply the image data voltage to the pixel for two consecutive sections.

The data driver may alternately supply the image data voltage and the black data voltage to the pixel.

The frame memory unit transfers the input image signal to the storage unit in accordance with an input clock signal and a storage unit for storing the input image signal, and outputs the input image signal stored in the storage unit in accordance with an output clock signal. It may include an input and output unit.

The output clock signal may have a shorter period than the input clock signal.

The period of the output clock signal may be 1/2 of the period of the input clock signal.

The input / output unit may output the image signal in synchronization with the rising edge and the falling edge of the output clock signal.

The frame memory unit may include a DDR memory.

DETAILED DESCRIPTION Embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like parts are designated by like reference numerals throughout the specification. When a part of a layer, film, region, plate, etc. is said to be "on" another part, this includes not only the other part being "right over" but also another part in the middle. On the contrary, when a part is "just above" another part, there is no other part in the middle.

A display device according to an embodiment of the present invention will now be described in detail with reference to the accompanying drawings.

1 is a block diagram of an organic light emitting diode display according to an exemplary embodiment of the present invention, and FIG. 2 is an equivalent circuit diagram of one pixel of the organic light emitting diode display according to an exemplary embodiment of the present invention.

As shown in FIG. 1, an organic light emitting diode display according to an exemplary embodiment includes a display panel 300, a scan driver 400, a data driver 500, and a data driver 500 connected thereto. Connected gray voltage generator 800 and a signal controller 600 for controlling the gray voltage generator 800.

Include - (D _m D ₁₎ signal lines _{(G 1 -G n, D 1} -D m) is a data line for transmitting a plurality of scan lines (G ₁ -G _n) and a data signal to pass the scanning signal. The scan lines G ₁ -G _n extend substantially in the row direction and are substantially parallel and separated from each other. The data lines D ₁ -D _m extend substantially in the column direction and are substantially parallel to each other. Each voltage line (not shown) transfers a driving voltage Vdd or the like.

2, one pixel of an organic light emitting diode display according to an exemplary embodiment includes an organic light emitting element LD, a driving transistor Qd, a capacitor Cst, and a switching transistor Qs. .

The driving transistor Qd is a three-terminal device, with a control terminal connected to the output terminal of the switching transistor Qs, an input terminal connected to the driving voltage Vdd, and the output terminal connected to the organic light emitting element LD. It is connected to the anode. The driving transistor Qd is supplied with a data voltage to the control terminal through the switching transistor Qs to supply the corresponding driving current I _LD to the organic light emitting element LD.

The organic light emitting element LD is a light emitting diode having a light emitting layer, and an anode is connected to the output terminal of the driving transistor Qd, and a cathode is connected to the common voltage Vcom. The organic light emitting element LD receives the driving current I _LD from the driving transistor Qd to emit predetermined light.

The capacitor Cst is connected between the control terminal and the input terminal of the driving transistor Qd to charge the data voltage supplied through the switching transistor Qs.

The switching transistor Qs is also a three-terminal element, with an input terminal connected to the data line Dj, an output terminal connected to the control terminal of the driving transistor Qd, and a control terminal connected to the scan line Gi. It is. The switching transistor Qs is turned on by the scan signal supplied through the scan line Gi to transfer the data voltage to the control terminal of the driving transistor Qd.

The switching transistor Qs and the driving transistor Qd are formed of an n-channel MOSFET (Metal Oxide Semiconductor Field Effect Transistor) made of amorphous silicon or polycrystalline silicon. However, these transistors Qs and Qd may also be p-channel MOSFETs. In this case, since the p-channel MOSFET and the n-channel MOSFET are complementary to each other, the operation, voltage, and current of the p-channel MOSFETs are determined by the n-channel MOSFETs. On the contrary.

Referring back to FIG. 1, the scan driver 400 may be connected to the scan lines G ₁ -G _n of the display panel 300 to turn off a high voltage Von that can turn on the switching transistor Qs. Scan signals composed of a combination of the low voltages Voff are applied to the scan lines G ₁ -G _n , respectively.

The data driver 500 is connected to the data lines D ₁ -D _m of the display panel 300 to convert an image data voltage V _DAT representing an image signal and a black data voltage V _BLACK representing black. ₁ -D _m ).

The gray voltage generator 800 generates a gamma voltage and outputs the gamma voltage to a digital-to-analog converter (not shown) of the data driver 500.

The OLED display includes a frame memory unit 650 that stores one frame of input image signals R, G, and B.

Hereinafter, the frame memory unit 650 will be described.

3 is a block diagram of a frame memory unit of the organic light emitting diode display according to an exemplary embodiment, and FIG. 4 is a waveform diagram of a clock signal of the frame memory unit of FIG. 3.

Referring to FIG. 3, the frame memory unit 650 according to an embodiment of the present invention includes a storage unit 652 and an input / output unit 654.

The storage unit 652 includes a plurality of cells (not shown), and each cell stores input image signals R, G, and B of one frame in units of bits.

The input / output unit 654 includes a plurality of buffers (not shown). The input / output unit 654 receives input image signals R, G, and B of one frame and transmits the received image signals R, G, and B to the storage unit 652 according to the input clock signal CLKin. In response to the output clock signal CLKout, the input video signals R, G, and B stored in the storage unit 652 are output to the signal control unit 600.

The frame memory unit 650 may be implemented as a double data rate (DDR) memory, or may be implemented as a DDRII memory or a DDRIII memory according to the connection of the storage unit 652 and the input / output unit 654.

4 illustrates an input clock signal CLKin and an output clock signal CLKout when the frame memory unit 650 is implemented as a DDRII memory, and a period of the output clock signal CLKout is determined by Have half of the period.

Since the DDR memory outputs the input video signals R, G, and B stored in synchronization with the rising and falling edges of the output clock signal CLKout, the frame memory unit 650 stores the stored input video signals R and G. , B) is output 4 times faster than memory speed.

Unlike in FIG. 4, when the frame memory unit 650 is implemented as a DDRIII memory, the period of the output clock signal CLKout has one quarter of the period of the input clock signal CLKin. Therefore, the frame memory unit 650 may output the input image signals R, G, and B at a speed eight times faster than the storage speed.

The frame memory unit 650 may be formed in the signal controller 600 as shown in FIG. 1, or alternatively, may be formed outside the signal controller 600.

The signal controller 600 controls the scan driver 400, the data driver 500, the frame memory unit 650, and the like.

Each of the driving devices 400, 500, 800, 600, and 650 may be mounted directly on the display panel 300 in the form of at least one integrated circuit chip, or may be a flexible printed circuit film (not shown). It may be mounted on the display panel 300 in the form of a tape carrier package (TCP) or mounted on a separate printed circuit board (not shown). Alternatively, these driving devices 400, 500, 800, 600, and 650 may be integrated in the display panel 300 together with the signal lines G ₁ -G _n , D ₁ -D _m and the thin film transistor switching element Q. It may be. In addition, the driving devices 400, 500, 800, 600, and 650 may be integrated into a single chip, in which case at least one of them or at least one circuit element constituting them may be outside the single chip.

Next, the operation of the organic light emitting diode display will be described in detail with reference to FIGS. 5 and 6.

5 is a signal waveform diagram illustrating an operation of an organic light emitting diode display according to an exemplary embodiment of the present invention, and FIG. 6 is a schematic diagram illustrating a screen of the organic light emitting diode display that is displayed according to FIG. 5.

The signal controller 600 receives an input control signal for controlling display from an external graphic controller (not shown), and the frame memory unit 650 receives input image signals R, G, and B of one frame. . The input image signals R, G, and B contain luminance information of each pixel PX, and the luminance is a predetermined number, for example, 1024 (= 2 ¹⁰ ), 256 (= 2 ⁸ ), or 64 (= 2 ⁶ ) It has gray. Examples of the input control signal include a vertical sync signal Vsync, a horizontal sync signal Hsync, a main clock MCLK, and a data enable signal DE.

The signal controller 600 generates the scan control signal CONT1 and the data control signal CONT2 based on the input control signal, and then sends the scan control signal CONT1 to the scan driver 400 and sends the data control signal CONT2. ) Is exported to the data driver 500.

The scan control signal CONT1 includes a scan start signal STV indicating a scan start and at least one clock signal for controlling an output period of the high voltage Von. The scan control signal CONT1 may also further include an output enable signal that defines the duration of the high voltage Von.

The data control signal CONT2 is a horizontal synchronization start signal indicating the start of transmission of the digital image data DAT for one row of pixels PX and an analog image data voltage V _DAT on the data lines D ₁ -D _m . And a selection signal for selecting one of a load signal, a data clock signal, and an image data voltage V _DAT or a black data voltage V _BLACK .

When the first small frame T1 is started, the frame memory unit 650 outputs the input image signals R, G, and B stored in accordance with the output clock signal CLKout to the signal controller 600, and the signal controller The signal 600 processes the input image signals R, G, and B and outputs the processed image data DAT to the data driver 500.

The data driver 500 converts the image data DAT into an analog image data voltage V _DAT according to the data control signal CONT2 from the signal controller 600 and applies the data data D D to the corresponding data lines D ₁ -D _m . do.

The scan driver 400 receives a vertical synchronization start signal STV and a clock signal supplied from the signal controller 600, and outputs scan signals Vg _{1 to} Vg _n for maintaining a high voltage Von for one clock period. do.

When the scan signal Vg _i of the high voltage Von is supplied from the scan driver 400, the switching transistor Qs is turned on. The driving transistor Qd receives the image data voltage V _DAT through the turned-on switching transistor Qs and outputs a corresponding driving current I _LD to the organic light emitting element LD. Therefore, the organic light emitting element LD emits light corresponding to the driving current I _LD supplied.

Such an operation is sequentially performed up to the pixel PX of the nth row so that one image is displayed.

Next, when the second small frame T2 is started, the frame memory unit 650 outputs the input image signals R, G, and B stored in accordance with the output clock signal CLKout to the signal controller 600 again. The signal controller 600 processes the same and supplies the image data DAT to the data driver 500.

The data driver 500 supplies the image data voltage V _DAT to the corresponding data lines D ₁ -D _m according to the image data _DAT , and the scan driver 400 scan signal Vg having a high voltage Von. ₁ -Vg _n ) is supplied to the scan line G ₁ -G _n .

Therefore, the pixel PX receives an image data voltage V _DAT equal to the image data voltage V _DAT supplied from the first small frame T1 and displays the same image as the first small frame T1.

Next, when the third small frame T3 is started, the data driver 500 supplies the black data voltage V _BLACK stored according to the selection signal to the corresponding data lines D ₁ -D _m , and the scan driver 400 supplies a scan signal Vg ₁ -Vg _n of a high voltage Von to the scan line G ₁ -G _n .

The driving transistor Qd of the pixel PX is turned off by applying the black data voltage V _BLACK through the turned-on switching transistor Qs. The organic light emitting element LD does not emit light because the driving current I _LD is not supplied, and the pixel PX displays black.

In this case, the black data voltage V _BLACK may be stored in the data driver 500 as described above. Alternatively, the data driver 500 may transmit the black data corresponding to the black data voltage V _BLACK from the signal controller 600. It can also be generated by converting it.

Finally, when the fourth small frame T4 starts, the frame memory unit 650 outputs the input image signals R, G, and B again, and the signal controller 600 processes them to process the image data DAT. Supply to the data driver 500.

The pixel PX receives an image data voltage V _DAT equal to the image data voltage V _DAT supplied from the first small frame T1 and the second small frame T2, and the pixel PX is connected to the first small frame T1. Display the same image.

Referring to FIG. 6, an image of a previous frame is displayed on the screen of the initial frame (0). When the first small frame T1 starts, an image of the current frame is displayed from the top of the screen. Therefore, at 1/4 frame (1/4), the image of the current frame is displayed on the entire screen. When the second small frame T2 starts, the current frame image is displayed again from the top of the screen, and the image of the current frame is displayed on the entire screen up to 1/2 frames.

Next, when the third small frame T3 starts, a black image is displayed from the top of the screen, and black is displayed on the upper half of the screen at 5/8 frames (5/8), and 3/4 frames (3 / In 4), a black image is displayed on the entire screen.

Finally, when the fourth small frame T4 starts, an image of the current frame is displayed from the top of the screen, so that an image is displayed on the upper half of the screen at 7/8 frame (7/8), and at 1 frame (1FT). The current frame image is displayed on the whole.

The pixel PX emits light for 3/4 of one frame 1FT according to the image data voltage V _DAT of the current frame, and does not emit light for the remaining 1/4. Therefore, it is possible to reduce the luminance reduction while preventing the blurring phenomenon in which the image is not clear and blurred overall.

Hereinafter, another embodiment of an organic light emitting diode display for obtaining an impulsive effect will be described with reference to the drawings.

FIG. 7 is a signal waveform diagram illustrating an operation of an organic light emitting diode display according to another exemplary embodiment. FIG. 8 is a schematic diagram illustrating a screen of the organic light emitting diode display displayed according to FIG. 7.

Referring to FIG. 7, the signal controller 600 divides one frame 1FT into four small frames T5, T6, T7, and T8, and displays an image in one small frame. Show black.

In the first small frame T5 and the third small frame T7, the signal controller 600 receives the input image signals R, G, and B from the frame memory unit 650, processes them, and processes the image data DAT. Is output to the data driver 500. The data driver 500 converts the image data _DAT and supplies the image data voltage V _DAT to the pixel PX so that the pixel PX displays an image. At this time, in a first predetermined frame image data voltage (V _DAT) and a video data voltage (V _DAT) of 3 small frame (T7) of (T5) it is identical to each other pixels (PX) includes first and third small frames ( The same image is displayed at T5 and T7).

Meanwhile, in the second small frame T6 and the fourth small frame T8, the data driver 500 supplies the black data voltage V _BLACK to the pixel PX so that the pixel PX displays black.

Referring to FIG. 8, the black of the previous frame is displayed on the initial screen of the frame.

When the first small frame T5 starts, an image of the current frame is displayed from the top of the screen. Therefore, at 1/4 frame (1/4), the image of the current frame is displayed on the entire screen.

Next, when the second small frame T6 starts, a black image is displayed from the top of the screen. In the 3/8 frame (3/8), black is displayed on the upper half of the screen, and 1/2 frame (1 / In 2), a black image is displayed on the entire screen.

When the third small frame T7 starts, the current frame image is displayed again from the top of the screen, and in the 3/4 frame (3/4), the image of the current frame is displayed on the entire screen.

Finally, when the fourth small frame T8 starts, black is again displayed from the top of the screen. In the 7/8 frame (7/8), black is displayed on the upper half of the screen, and in the 1 frame (1FT), the entire screen is displayed. Black is displayed.

The pixel PX emits light for one half of one frame 1FT according to the image data voltage V _DAT of the current frame and does not emit light for the other half to obtain an impulsive effect.

In the organic light emitting diode display according to the present invention, black may be displayed on any one of four small frames, and black may be displayed on two different small frames. In some cases, black may be displayed in three small frames. By including the high speed frame memory unit 650 as described above, one frame is divided into a plurality of small frames, thereby enabling various impulsive driving.

In addition, unlike FIG. 4, when the organic light emitting diode display according to the present invention uses the DDRIII memory as the frame memory unit 650, it is possible to divide one frame into eight small frames, thereby performing various impulsive driving. can do.

As described above, according to the present invention, by dividing a frame into a plurality of sections by using a high speed frame memory unit, various impulsive driving is possible, and blurring phenomenon in which an image is not clear and blurred can be prevented.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

Claims (9)

A plurality of pixels, A scan driver supplying a scan signal to the plurality of pixels in each of at least three sections forming one frame, A frame memory unit for storing an input video signal of the frame and outputting the stored input video signal for at least two of the plurality of sections, and A data driver converting an image signal from the frame memory into an image data voltage, supplying the image data voltage to the plurality of pixels for the at least two sections, and supplying a black data voltage to the plurality of pixels for the remaining sections. Display device comprising a. In claim 1, And the image data voltages supplied to the pixels during different periods are the same. In claim 2, And the data driver supplies the image data voltage to the pixel for two consecutive sections. In claim 2, And the data driver alternately supplies the image data voltage and the black data voltage to the pixel. In claim 1, The frame memory unit, A storage unit for storing the input video signal, and An input / output unit configured to transfer the input video signal to the storage unit according to an input clock signal, and output the input video signal stored in the storage unit according to an output clock signal. Containing Display device. In claim 5, And the output clock signal has a shorter period than the input clock signal. In claim 6, And a period of the output clock signal is 1/2 of a period of the input clock signal. In claim 6 or 7, And the output unit outputs the image signal in synchronization with a rising edge and a falling edge of the output clock signal. In claim 6, The frame memory unit includes a DDR memory.

Images