KR20070082649A - Liquid crystal display - Google Patents

Abstract

An LCD(Liquid Crystal Display) is provided to compensate a common voltage and a pixel voltage and apply a compensated common voltage by placing a voltage line in a horizontal direction and in a negative 45°. A plurality of pixels each include a switching device(Q), a pixel electrode(191) connected to the switching device, and a common electrode(270) receiving a common voltage. A gate line(Gi) and a data line(Dj) are connected to the switching device. A gradation voltage generator generates a plurality of reference gradation voltages. A common voltage generator generates a common voltage and applies the common voltage to the common electrode. A common voltage compensator receives a fed-back common voltage, and generates a compensated common voltage. A voltage line transmits the compensated common voltage.

Description

Liquid crystal display {LIQUID CRYSTAL DISPLAY}

With reference to the accompanying drawings will be described in detail the embodiments of the present invention to make the present invention clear.

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

2 is an equivalent circuit diagram of one pixel of a liquid crystal display according to an exemplary embodiment of the present invention.

3 is a schematic layout view of a liquid crystal display according to another exemplary embodiment of the present invention.

4 is an example of a circuit diagram of a gray voltage generator of a liquid crystal display according to an exemplary embodiment of the present invention.

5 is an example of a circuit diagram of a common voltage correcting unit of a liquid crystal display according to an exemplary embodiment of the present invention.

6 illustrates a common voltage, a compensation voltage, and a pixel voltage in a liquid crystal display according to an exemplary embodiment of the present invention.

The present invention relates to a liquid crystal display device.

A typical liquid crystal display (LCD) includes two display panels provided with pixel electrodes and a common electrode, and a liquid crystal layer having dielectric anisotropy interposed therebetween. The pixel electrodes are arranged in a matrix and connected to switching elements such as thin film transistors (TFTs) to receive data voltages one by one in sequence. The common electrode is formed over the entire surface of the display panel and receives a common voltage. The pixel electrode, the common electrode, and the liquid crystal layer therebetween form a liquid crystal capacitor, and the liquid crystal capacitor becomes a basic unit that forms a pixel together with a switching element connected thereto.

In such a liquid crystal display, a voltage is applied to two electrodes to generate an electric field in the liquid crystal layer, and the intensity of the electric field is adjusted to adjust the transmittance of light passing through the liquid crystal layer to obtain a desired image. In this case, in order to prevent degradation caused by an electric field applied to the liquid crystal layer for a long time, the polarity of the data voltage with respect to the common voltage is inverted frame by frame, row by pixel, or pixel by pixel.

Such a liquid crystal display includes a liquid crystal panel assembly having a pixel including a switching element and a display signal line connected thereto, a data driver for applying a corresponding data voltage to the pixel through a switching element, and generating a gray voltage and supplying the gray voltage to the data driver. The gray voltage generator includes a common voltage generator that provides a common voltage to the liquid crystal panel assembly.

On the other hand, there is a parasitic capacitance between the gate drain of the switching element, which causes the common voltage to be coupled with the data voltage so as to be changed higher or lower than the original voltage, so that the direct current is applied as a kind of alternating current and thus the difference in the voltage charged in the pixel is reduced. cause. If this difference is severe, it causes horizontal crosstalk, which appears as a band on the screen. In addition, as the distance from the data driver increases, the pixel voltage may appear lower due to signal delay due to resistance of the wiring.

The technical problem to be achieved by the present invention is to provide a liquid crystal display device that can solve the problems of the prior art.

According to an exemplary embodiment of the present invention, a liquid crystal display device includes a switching element, a plurality of pixels each including a pixel electrode connected thereto and a common electrode applied with a common voltage, and connected to the switching element. A gate line and a data line, a gray voltage generator for generating a plurality of reference gray voltages, a common voltage generator for generating a common voltage and applying the same to the common electrode, and a common voltage for generating a compensated common voltage by feeding back the common voltage And a voltage corrector and a voltage line transferring the compensated common voltage.

The liquid crystal display may further include a detector configured to draw and detect a pixel voltage corresponding to a difference between the pixel electrode and the common voltage, wherein the detector generates a reference voltage based on the pixel voltage to generate the gray voltage. It can be provided to the generation unit.

The data line and the gate line may cross each other, and the voltage line may extend parallel to the gate line, and the pixel electrode may have a rectangular shape.

In contrast, the data line extends in the positive 45 degree direction, the voltage line extends in the negative 45 degree direction, and the gate line extends in the horizontal direction, wherein the pixel electrode may be a rhombus.

The common voltage corrector may be integrated in the liquid crystal display.

DETAILED DESCRIPTION Embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like parts are designated by like reference numerals throughout the specification. When a portion of a layer, film, region, plate, etc. is said to be "on top" of another part, this includes not only when the other part is "right on" but also another part in the middle. On the contrary, when a part is "just above" another part, there is no other part in the middle.

A liquid crystal display according to an exemplary embodiment of the present invention will be described in detail with reference to FIGS. 1 to 6.

1 is a block diagram of a liquid crystal display according to an embodiment of the present invention, FIG. 2 is an equivalent circuit diagram of one pixel of a liquid crystal display according to an embodiment of the present invention, and FIG. 3 is another embodiment of the present invention. A schematic layout view of a liquid crystal display according to an example.

4 is an example of a circuit diagram of a gray voltage generator of a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 5 is an example of a circuit diagram of a common voltage corrector of a liquid crystal display according to an exemplary embodiment of the present invention. 6 is a diagram illustrating a common voltage, a compensation voltage, and a pixel voltage in a liquid crystal display according to an exemplary embodiment of the present invention.

As shown in FIG. 1, a liquid crystal display according to an exemplary embodiment of the present invention includes a liquid crystal panel assembly 300, a gate driver 400, a data driver 500, and a data driver 500 connected thereto. The gray voltage generator 800, the common voltage corrector 700, the detector 750, and the signal controller 600 controlling the gray voltage generator 800 connected to the 500 are included.

The liquid crystal panel assembly 300 may include a plurality of signal lines G ₁ -G _n , D ₁ -D _m , C ₁ -C _n , and a plurality of pixels connected to the plurality of signal lines (e.g. pixel) PX. On the other hand, in the structure shown in FIG. 2, the liquid crystal panel assembly 300 includes lower and upper panels 100 and 200 facing each other and a liquid crystal layer 3 interposed therebetween.

The signal lines G ₁ -G _n , D ₁ -D _m , and C ₁ -C _n transfer data signals and a plurality of gate lines G ₁ -G _n that carry gate signals (also called “scan signals”). And a plurality of data lines D ₁ -D _m and voltage lines C ₁ -C _n to which the compensated common voltage is applied. The gate line and the voltage line G ₁ -G _n , C ₁ -C _n extend approximately in the row direction and are substantially parallel to each other, and the data lines D ₁ -D _m extend approximately in the column direction and are substantially parallel to each other. .

Each pixel PX, for example, the pixel PX connected to the i-th (i = 1, 2,, n) gate line G _i and the j-th (j = 1, 2,, m) data line Dj. ) Is a switching element Q connected to the signal line G _i D _j , a liquid crystal capacitor Clc and a storage capacitor Cst, and a voltage line across the pixel PX. C ₁ -C _n ). Holding capacitor Cst can be omitted as needed.

The switching element Q is a three-terminal element of a thin film transistor or the like provided in the lower panel 100, the control terminal of which is connected to the gate line G _i , and the input terminal of which is connected to the data line D _j . The output terminal is connected to the liquid crystal capacitor Clc and the storage capacitor Cst.

The liquid crystal capacitor Clc has two terminals, the pixel electrode 191 of the lower panel 100 and the common electrode 270 of the upper panel 200, and the liquid crystal layer 3 between the two electrodes 191 and 270 is a dielectric material. Function as. The pixel electrode 191 is connected to the switching element Q as a quadrangle, and the common electrode 270 is formed on the entire surface of the upper panel 200 and receives a common voltage Vcom.

The storage capacitor Cst, which serves as an auxiliary part of the liquid crystal capacitor Clc, is formed by overlapping a separate signal line (not shown) and the pixel electrode 191 provided on the lower panel 100 with an insulator interposed therebetween. A predetermined voltage such as the common voltage Vcom is applied to the separate signal line. However, the storage capacitor Cst may be formed such that the pixel electrode 191 overlaps the front gate line directly above the insulator.

Meanwhile, FIG. 3 illustrates a structure of the pixel PX of the liquid crystal display according to another exemplary embodiment of the present invention. Since the other structures are the same except for the shape of the pixel PX, detailed description thereof will be omitted. In addition, (k-2) th (k + 2) th pixel rows are shown among n pixel rows.

In FIG. 3, the pixel PX includes a pixel electrode 191 having a diamond shape that is not rectangular in FIG. 2. The pixel PX is surrounded by the data line DL extending in the positive 45 degree direction, the gate line GL extending in the horizontal direction, and the common voltage applying line CL extending in the negative 45 degree direction. Unlike FIG. 2, the gate line GL passes through the center of the pixel electrode 191.

On the other hand, in order to implement color display, each pixel PX uniquely displays one of the primary colors (spatial division) or each pixel PX alternately displays the primary colors over time (time division). The desired color is recognized by the spatial and temporal sum of these primary colors. Examples of the primary colors include three primary colors such as red, green, and blue. 2 and 3 show that each pixel PX includes a color filter 230 representing one of the primary colors in an area of the upper panel 200 corresponding to the pixel electrode 191 as an example of spatial division. Giving.

At least one polarizer (not shown) for polarizing light is attached to an outer surface of the liquid crystal panel assembly 300.

Referring back to FIG. 1, the detector 750 feedbacks the pixel voltage Vp displayed on the liquid crystal panel assembly 300 and applies the reference voltage Vref necessary for correction to the gray voltage generator 800.

The gray voltage generator 800 includes a plurality of sets of reference gray voltages related to transmittance of the pixel PX, including a plurality of resistors R connected in series between a power supply voltage AVDD and a ground voltage. Produces (VG1-VG18). One of the two sets VG1-VG8 has a positive value with respect to the reference voltage Vref, and the other set VG9-VG18 has a negative value. In this case, the magnitudes of the reference gray voltages VG1-VG18 that are output also vary according to the magnitude of the reference voltage Vref.

Meanwhile, as shown in FIG. 6, as the distance from the data driver 500 increases, the size of the pixel voltage Vp, which is a difference between the data voltage V _DATA and the common voltage Vcom, may decrease due to a signal delay.

The sensing unit Vp detects the pixel voltage Vp and applies the reference voltage Vref compensated to the gray voltage generator 800, and the gray voltage generator 800 is the reference voltage Vref as described above. The reference gray voltages VG1-VG18 are generated according to the difference between the pixel voltages Vp.

The gate driver 400 includes a plurality of gate driver integrated circuits 440 and is connected to the gate lines G ₁ -G _n and GL of the liquid crystal panel assembly 300 to gate-off voltage Von and gate-off. A gate signal composed of a combination of the voltages Voff is applied to the gate lines G ₁ -G _n .

The data driver 500 includes a plurality of data driver integrated circuits 540, and is connected to the data lines D ₁ -D _m of the liquid crystal panel assembly 300, and the gray level from the gray voltage generator 800. The voltage is selected and applied to the data lines D ₁ -D _m as data signals. However, when the gray voltage generator 800 provides only a predetermined number of reference gray voltages instead of providing all of the voltages for all grays, the data driver 500 divides the reference gray voltages to divide the gray voltages for all grays. Generate and select the data signal from it.

The common voltage corrector 700 is formed together with the switching element Q of the pixel PX to be integrated in the liquid crystal panel assembly 300 and positioned in front of the gate driver 400. In addition, as illustrated in FIG. 5, an operational amplifier OP, a capacitor C having one end connected between the non-inverting terminal + and the common voltage Vcom of the operational amplifier OP and grounded at the other end, and an operation Compensation by compensating for the feedback voltage Vcomf of the common voltage Vcom, including the resistors R1 and R2 connected between the inverting terminal (-) of the amplifier OP and the feedback voltage Vcomf and the output terminal, respectively. The applied voltage Vcomc is applied through the voltage lines C ₁ -C _n .

The operational amplifier OP is a differential amplifier and outputs a compensated common voltage Vcomc by compensating a difference between the common voltage Vcom and the feedback voltage Vcomf.

At this time, the 6 In, feedback voltage (Vcomf) appears at a rising edge and falling edge of the data voltage (V _DATA), and due to the coupling of data voltage (V _DATA) in a pulse form.

The pulse-type feedback voltage Vcomf is input to the common voltage corrector 700, and as shown, the pulses are output as the compensated common voltage Vcomc having opposite shapes to each other. The compensated common voltage Vcomc is applied through the voltage lines C ₁ -C _n as described above, and the common voltage Vcom having a direct current form indicated by a dotted line is generated due to the applied compensation voltage Vcomc.

The signal controller 600 controls the gate driver 400, the data driver 500, and the like.

Each of the driving devices 400, 500, 600, and 800 is mounted on a flexible printed circuit film 410 and 510, as shown in FIG. 3, in the form of a tape carrier package (TCP). It may be attached to the assembly 300 or mounted on a separate printed circuit board 550. Alternatively, these driving devices 400, 500, 600, and 800 may be mounted directly on the liquid crystal panel assembly 300 in the form of at least one integrated circuit chip, or may include signal lines G ₁ -G _n , D ₁ -D _m , The C ₁ -C _n ) and the thin film transistor switching element Q may be integrated in the liquid crystal panel assembly 300. In addition, the driving devices 400, 500, 600, and 800 may be integrated into a single chip, in which case at least one of them or at least one circuit element constituting them may be outside the single chip.

Next, the operation of the liquid crystal display will be described in detail.

The signal controller 600 receives input image signals R, G, and B and an input control signal for controlling the display thereof from an external graphic controller (not shown). Examples of the input control signal include a vertical sync signal Vsync, a horizontal sync signal Hsync, a main clock MCLK, and a data enable signal DE.

The signal controller 600 properly processes the input image signals R, G, and B according to operating conditions of the liquid crystal panel assembly 300 based on the input image signals R, G, and B and the input control signal, and controls the gate. After generating the signal CONT1 and the data control signal CONT2, the gate control signal CONT1 is sent to the gate driver 400, and the data control signal CONT2 and the processed image signal DAT are transmitted to the data driver 500. Export to).

The gate control signal CONT1 includes a scan start signal STV indicating a scan start and at least one clock signal controlling an output period of the gate-on voltage Von. The gate control signal CONT1 may also further include an output enable signal OE that defines the duration of the gate-on voltage Von.

The data control signal CONT2 is a load for applying a data signal to the horizontal synchronization start signal STH and the data lines D ₁ -D _m indicating the start of image data transmission for the pixels PX in one row [bundling]. Signal LOAD and data clock signal HCLK. The data control signal CONT2 is also an inverted signal inverting the voltage polarity of the data signal relative to the common voltage Vcom (hereinafter referred to as "polarity of the data signal" by reducing the "voltage polarity of the data signal for the common voltage"). (RVS) may be further included.

According to the data control signal CONT2 from the signal controller 600, the data driver 500 receives the digital image signal DAT for the pixels PX in one row (bundling), and each digital image signal DAT. By converting the digital image signal DAT into an analog data signal by selecting a gray scale voltage corresponding to), it is applied to the corresponding data lines D ₁ -D _m .

The gate driver 400 applies the gate-on voltage Von to the gate lines G ₁ -G _n in response to the gate control signal CONT1 from the signal controller 600, thereby applying the gate lines G ₁ -G _n . Turn on the switching element (Q) connected to. Then, the data signal applied to the data lines D ₁ -D _m is applied to the pixel PX through the switching element Q turned on.

The difference between the voltage of the data signal applied to the pixel PX and the common voltage Vcom is shown as the charging voltage of the liquid crystal capacitor Clc, that is, the pixel voltage. The arrangement of the liquid crystal molecules varies depending on the magnitude of the pixel voltage, thereby changing the polarization of light passing through the liquid crystal layer 3. The change in polarization is represented by a change in transmittance of light by a polarizer attached to the display panel assembly 300.

This process is repeated in units of one horizontal period (also referred to as "1H" and equal to one period of the horizontal sync signal Hsync and the data enable signal DE), thereby all the gate lines G ₁ -G _n. ), The gate-on voltage Von is sequentially applied to the data signal to all the pixels PX, thereby displaying an image of one frame.

When one frame ends, the state of the inversion signal RVS applied to the data driver 500 is controlled so that the next frame starts and the polarity of the data signal applied to each pixel PX is opposite to the polarity of the previous frame. "Invert frame"). In this case, the polarity of the data signal flowing through one data line is changed (eg, row inversion and point inversion) or the polarity of the data signal applied to one pixel row is different depending on the characteristics of the inversion signal RVS within one frame. (E.g. column inversion, point inversion).

In this way, not only the common voltage but also the pixel voltage can be compensated. In addition, a common voltage compensated by applying a voltage line in a horizontal direction as well as a negative 45 degree direction may be applied.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

Claims (8)

A plurality of pixels each comprising a switching element, a pixel electrode connected thereto and a common electrode to which a common voltage is applied; A gate line and a data line connected to the switching element, A gray voltage generator for generating a plurality of reference gray voltages; A common voltage generator for generating a common voltage and applying the same to the common electrode; A common voltage corrector configured to feedback the common voltage to generate a compensated common voltage; A voltage line transferring the compensated common voltage Containing Liquid crystal display. In claim 1, And a detector configured to draw and detect a pixel voltage corresponding to a difference between the pixel electrode and the common voltage. In claim 2, The sensing unit generates a reference voltage based on the pixel voltage and provides the reference voltage to the gray voltage generator. In claim 3, And the data line and the gate line cross each other, and the voltage line extends in parallel with the gate line. In claim 4, The pixel electrode is a rectangular liquid crystal display device. In claim 3, And the data line extends in a positive 45 degree direction, the voltage line extends in a negative 45 direction, and the gate line extends in a horizontal direction. In claim 6, The pixel electrode is a rhombus. In claim 5 or 7, And the common voltage corrector is integrated in the liquid crystal display.

Images