KR20070081645A - Method and apparatus for estimating synchronization in mobile communications system - Google Patents

Abstract

A method and an apparatus for estimating synchronization in a mobile communications system are provided to reduce a calculating quantity by estimating the synchronization based on a length of a channel. An apparatus for estimating synchronization in a mobile communications system includes a correlator(31), a chip synchronizer(33), a symbol synchronizer(36), and a channel length estimator(38). The correlator(31) calculates a self correlation value between a reference lower link synchronization code and a receiving signal. The chip synchronizer(33) estimates chip synchronization by using the autocorrelation value calculated by the correlator(31). The symbol synchronizer(36) estimates symbol synchronization by using the autocorrelation value from the correlator(31) and an estimated channel length. The symbol synchronizer(36) variably sets a window section according to the correlation value from the correlator(31) and the estimated channel length from the channel length estimator(38). The channel length estimator(38) estimates the channel length.

Description

Method and apparatus for estimating synchronization in mobile communication system

1 shows a format of a downlink subframe of a 3GPP TDD LCR system.

2 is a block diagram of a preferred embodiment of a synchronization estimation apparatus according to the present invention;

3 is a graph illustrating autocorrelation values calculated according to Equation 1 in an ITU-R vehicle A channel environment.

FIG. 4 is a diagram for explaining an estimated phenomenon of channel vector pulling when a synchronization error occurs;

5A to 6B illustrate various types of window sections and channel lengths when a synchronization error occurs.

FIG. 7 illustrates BLER performance curves when using a joint detection receiver for the prior art and the present invention in a 3GPP TDD LCR system.

The present invention relates to a 3GPP TDD system, such as TD-CDMA (3GPP 3.84Mcps TDD mode) or TD-SCDMA (3GPP 1.28Mcps TDD mode). More specifically, the present invention relates to a synchronization estimation method and apparatus therefor at a receiving side of a 3GPP TDD system.

The TD-SCDMA system is also referred to as 3GPP TDD LCR system as the third generation (3G) wireless communication standard proposed in China and approved by ITU and 3GPP. Since the TD-SCDMA system is a time division duplex (TDD) system, the TD-SCDMA system has many characteristics different from the conventional frequency division duplex (FDD) mobile communication system. The conventional FDD method uses a continuous common pilot channel called a common pilot channel (CPICH), so that chip synchronization can be tracked for each multipath, and in this case, the synchronization can be tracked by over-sampling chip units. Can be. On the other hand, in the TDD scheme, a continuous pilot channel does not exist and a section in which a pilot signal is transmitted is different from a section in which data is transmitted, and thus, multiple paths cannot be individually tracked using this. In addition, since all reception processes are performed in units of time slots, the purpose of synchronization is not to track chip synchronization of each multipath, but to track the starting point of time slots.

1 shows a format of a downlink subframe of a 3GPP TDD LCR system. In the TDD LCR system, a pilot includes a downlink pilot channel (DwPCH) generated periodically every 5ms and a midamble included in every time slot. The DwPCH consists of a guard period of 32 chips and a SYNC-DL code of 64 chips, and one of 32 SYNC-DL codes is selected and used for each cell. In the 3TDD LCR system, the reference signal SYNC-DL of the downlink sync code is 32, and each code consists of a 64 chip long random code. The downlink sync code SYNC-DL is located after the first downlink time slot Ts0 of the subframe.

The midamble consists of a 128-chip long random code, there is one basic code, and a plurality of codes may be generated by cyclic shifting the basic code. It is also possible to send multiple codes simultaneously. If K is defined as the number of codes that can be transmitted simultaneously, K is a value that is related to the response length of the channel and the number of concurrent users, and is basically used to distinguish a channel between users. DwPCH is a common pilot channel and the midamble is a dedicated pilot channel. The SYNC-DL is broadcast in all cells to transmit transmission timing information of the base station, and the terminal acquires time synchronization using this information.

In the prior art, not only the unnecessary computation is increased by estimating the synchronization without considering the length of the channel, which can vary with time, but also the synchronization point is easily affected by the size of the noise when the channel length is very small, thereby making it a time slot. There was a problem that can be greatly shaken every time, relatively quickly motivated.

On the other hand, the purpose of acquiring synchronization at the receiving side may vary depending on the case. For example, the purpose of the synchronization in the demodulator is to have a maximum SINR in terms of symbols after despreading, and in a receiver that does not perform despreading such as the remaining automatic frequency control (AFC) and initial synchronization. The purpose of the synchronization is to find the multipath with the maximum power. In the prior art, even though the synchronization purpose is different according to each functional module on the receiving side, there is a problem in that it is difficult to satisfy all the purposes of different synchronizations by obtaining synchronization using one synchronization acquisition scheme.

The present invention has been made to solve the problems of the prior art as described above, an object of the present invention is to estimate the length of the channel to estimate the synchronization to reduce the unnecessary calculation amount, due to the consideration of unnecessary interference The present invention provides a synchronous estimation method and apparatus capable of preventing performance degradation.

Another object of the present invention is to provide a method and an apparatus capable of estimating synchronization by adaptively selecting a synchronization estimation scheme that meets the purpose according to the purpose of synchronization at a receiving side.

One feature of the present invention is to estimate the length of the channel to reflect the estimated channel length in symbol synchronization and demodulation. The length of the channel can be obtained using the channel matrix obtained in the channel estimation process. The length of the channel can be estimated at every time slot and updated using the previous and current values.

Another aspect of the present invention is to estimate synchronization by adaptively selecting a synchronization estimation scheme that meets the purpose according to the purpose of synchronization at the receiving side of the mobile communication system. More specifically, the present invention is characterized by applying different synchronization estimation algorithms to the demodulator on the receiving side and the remaining portions except for the demodulator.

The purpose of the synchronization in the demodulator on the receiver is to have the maximum SINR in terms of symbols after despreading, and in other parts that do not require despreading, such as AFC and initial synchronization, the purpose of synchronization is maximum power. Find the location of n multipaths with Since synchronization is estimated for different purposes, performance improvement can be achieved by efficiently combining algorithms for each purpose instead of one synchronization estimation algorithm.

In one aspect of the present invention, a synchronization estimation method in a TDD CDMA mobile communication system according to the present invention includes a reference downlink synchronization code and a received signal in a synchronization estimation method at a receiving side of a time division duplex (TDD) CDMA mobile communication system; Calculating a correlation value with a channel matrix, estimating a channel length using a channel matrix obtained through channel estimation, and varying the correlation value calculated in the correlation value calculation step according to the estimated channel length. Estimating symbol synchronization using a cumulative sum over a window period set to be.

In another aspect of the present invention, a synchronization estimating apparatus in a TDD CDMA mobile communication system includes a correlator for calculating a correlation value between a reference downlink synchronization code and a received signal, and a channel matrix obtained through channel estimation. A symbol length estimator for estimating a symbol length by using a channel length estimator for estimating a channel length and a sum of a correlation value calculated by the correlator for a window period that is variably set according to the estimated channel length. And a symbol synchronizer.

The construction, operation and other features of the present invention will be readily understood by the preferred embodiments of the present invention described below with reference to the accompanying drawings. The embodiments described below are examples in which the technical features of the present invention are applied to a 3GPP TDD LCR system (TD-SCDMA system). The following embodiments are merely exemplary and it is obvious that the technical features of the present invention can be applied to other types of CDMA mobile communication systems.

2 is a block diagram of a preferred embodiment of a synchronization estimation apparatus according to the present invention. Referring to FIG. 2, the synchronization estimation apparatus 30 according to an embodiment of the present invention includes a correlator 31 that calculates an autocorrelation value between a reference downlink synchronization (SYNC-DL) code and a received signal, and the correlator. The chip synchronizer 33 estimates chip synchronization using the autocorrelation values calculated by (31), and the symbol sync using the autocorrelation values calculated by the correlator 31 and the estimated channel length. And a symbol synchronizer 36 for estimating a and a channel length estimator 38 for estimating a channel length. In FIG. 2, the post processor 34, the AFC and the frame synchronizer 35, and the demodulator 37 are components of the receiver in which the synchronization estimator 30 is implemented. These are those using the acquired chip synchronization or symbol synchronization.

라고 하면, k 번째 칩부터 시작되는 수신신호에 대한 자기 상관은 다음의 수학식 1과 같다. The correlator 31 calculates an autocorrelation value between a reference downlink sync (SYNC-DL) code and a received signal. The i th received signal received in units of oversampling of R _s is r _i , and the reference SYNC-DL code is

In this case, the autocorrelation of the received signal starting from the kth chip is expressed by Equation 1 below.

The chip synchronizer 33 estimates chip sync using the autocorrelation values calculated by the correlator 31. As an example of a method of estimating chip synchronization, a method of estimating a point where the correlation value of the reference SYNC-DL code calculated by the correlator 31 becomes the maximum may be a chip synchronization point. In other words, the value _k is the maximum value of c _k calculated by Equation 1 is estimated as a chip sync point, which is expressed by the following Equation 2.

According to the above method, by selecting n pieces in descending order from the largest value among the correlation values calculated by the correlator 31 and estimating k corresponding to each selected value as the chip sync point for each path, We can find n paths with power. That is, the same role as the searcher of the rake receiver of the CDMA system may be performed.

The chip synchronization estimated by the chip synchronizer 33 may be used for various purposes in the part where chip synchronization is required in the receiver. For example, when one point is selected as the chip synchronization point by the chip synchronizer 33, a post-processing unit 34, such as a loop filter, takes a temporal average of the chip synchronization point to obtain a reference synchronization point. Can be used as In addition, it may be used by the AFC (Auto Frequency Control) or the frame synchronizer 35 for frequency offset compensation.

The search interval for calculating the correlation value in the correlator 31 may vary according to the chip synchronization estimated by the chip synchronizer 33 or the reference synchronization point selected by the post processor 34. That is, a search section may be set based on the chip sync point or the reference sync point and the correlation value may be calculated accordingly.

The symbol synchronizer 36 estimates symbol synchronization using the autocorrelation values calculated by the correlator 31 and the channel length estimated by the channel length estimator 38. Here, the symbol means a transmission symbol before spreading by a code, and symbol synchronization is like finding a spreading code. In addition, since symbol synchronization is performed in units of time slots, symbol synchronization has the same meaning as time slot synchronization.

라고 하면, 윈도우 구간(W) 동안 누적된 자기 상관은 다음의 수학식 3과 같다.The symbol synchronizer 36 variably sets a window section according to the channel length estimated by the channel length estimator 38, and adds the sum of autocorrelation calculated by the correlator 31 during the set window section. The point where the accumulated value is maximized is identified as the motivating point. The i th received signal received in units of oversampling of R _s is r _i , and the reference SYNC-DL code is

In this case, the autocorrelation accumulated during the window period W is expressed by Equation 3 below.

3 is a graph illustrating autocorrelation values calculated according to Equation 1 in an ITU-R vehicle A channel environment. When the time t ₀ having the maximum autocorrelation among the autocorrelation values accumulated during the window period obtained by Equation 3 is determined as the start position of the time slot, the value becomes a symbol synchronization point. This may be expressed as Equation 4 below.

In this case, in order to increase the accuracy of the correlation, a method of accumulating the estimation result for a plurality of frames using a first-order loop filter may be used.

When the window section is fixed to a constant value without considering the length of the channel, if the length of the channel is actually smaller than the window section, the amount of calculation due to unnecessary calculation increases. In addition, since the synchronization point is easily affected by the size of the noise, it can be greatly shaken for each time slot, and there is a problem of relatively fast synchronization. Therefore, it is preferable to set the window period W variably according to the estimated channel length by estimating the length of the channel. Here, the channel length refers to the distance from the start point of the first path to the start point of the last path among the multiple paths, and the unit is a chip.

The channel length estimator 38 estimates the channel length. In estimating the length of the channel, the channel length estimator 38 may use the channel matrix obtained in the channel estimation process. The process of estimating the length of the channel will be described below.

In the 3GPP TDD LCR system, many channel estimation algorithms based on fast fourier transform (FFT) are used. In this case, 128 estimated channels exist.

이고, K는 타임 슬롯마다 정의되는 값으로 K=2,4,6,8,10,12,14,16의 짝수 값을 갖는다. K는 구분 가능한 사용자 채널의 수라고 볼 수 있으며, 결국 W는 허용 가능한 채널의 최대 길이라고 볼 수 있다. 즉, W는 K 값에 매칭되어 W=64, 32, 21, 16, 12, 10, 9, 8의 값을 갖는다. 반면, 현재 TDD 시스템의 타임 슬롯 사이의 보호구간의 길이가 16이므로 16 이상인 값은 매우 특수한 경우로 채널의 길이의 의미보다는 동시 사용자 수와 관련되어 있다. 따라서, 채널의 길이는 16 이하라고 가정할 수 있다. 일반적으로 K=8이라고 가정하면, 128 개의 값은 길이 16인 8 개의 채널 값으로 볼 수 있다.The 128 estimated channel values are divided by a system variable called W. At this time,

K is a value defined for each time slot and has an even value of K = 2,4,6,8,10,12,14,16. K can be regarded as the number of distinguishable user channels, and W can be regarded as the maximum length of allowable channels. That is, W matches the K value and has a value of W = 64, 32, 21, 16, 12, 10, 9, 8. On the other hand, since the guard interval between time slots of the current TDD system is 16, a value of 16 or more is a special case and is related to the number of concurrent users rather than the channel length. Therefore, it can be assumed that the length of the channel is 16 or less. In general, assuming K = 8, 128 values can be regarded as 8 channel values having a length of 16.

In the TDD-LCR system, channel estimation is performed using a midamble. When the cyclic shift structure of the midamble is used, channel estimation can be easily performed by using an FFT and an inverse fast fourier transform (IFFT).

라고 하면, 추정된 채널 행렬

은 다음의 다음과 같이 표현된다.The midamble part of the received signal

The estimated channel matrix

Is expressed as

이고,

인 미드앰블 코드이다. here,

ego,

In midamble code.

는 다음과 같이 W 개씩 나누어 각 K개의 채널에 할당된다.Channel matrix obtained by the above method

Is allocated to each of K channels by dividing by W as follows.

The process of estimating the length of the channel from the channel obtained by the above process will be described in detail.

First, power for W channels is obtained according to Equation 5 below.

According to Equation 6, w is sequentially increased from 1 to W to obtain power for w channels.

, w=1, ..., W

, w = 1, ..., W

M (w) representing the ratio of P _{k , w} and P _k obtained according to Equations 5 and 6 is obtained as in Equation 7 below.

를 구할 수 있다.The effective length of the channel according to Equation 8 using M (w) obtained by Equation 7

Can be obtained.

, 여기서, 는 인 임계값으로서 SNR(Signal to Noise Ratio)에 따라서 다르게 설정될 수 있으나, 0.95 이상인 것이 바람직하다.

Here, may be differently set according to Signal to Noise Ratio (SNR) as the threshold value, but is preferably 0.95 or more.

보다 큰 범위 내에서의 가장 작은 w를 채널의 길이

로 한다는 것이다. 예를 들어,

를 0.95라 하면, P_{k ,w}가 P_k의 95 % 를 초과하는 한도에서 가장 작은 w 값을 채널의 길이

로 한다.Equation (8) means that M (w), which means the ratio of P _{k , w} and P _k , is the threshold value.

The length of the smallest w channel within a greater range

That is to say. E.g,

Is 0.95, the smallest w value is defined as the length of the channel as long as P _{k , w} exceeds 95% of P _k .

Shall be.

를 최종적인 채널의 길이로 추정하는 것도 가능하지만, 동기 추정 과정에서 발생된 오류를 보정해 주는 것이 바람직하다. 오류 보정 과정의 일례를 설명하면 다음과 같다.Determined according to Equation 8

Can be estimated as the final channel length, but it is desirable to correct the errors generated during the synchronization estimation process. An example of an error correction process is as follows.

FIG. 4 is a diagram for explaining an estimated phenomenon of channel vector pulling when a synchronization error occurs. For example, if a synchronization delay occurs, the entire channel vector is cyclically shifted to the left of one chip, and if the first chip is caught first, the entire channel vector is cyclically shifted to the right of one chip. In FIG. 4, the difference between the actual channel start point and the point considered by the channel estimator as the start point is different from the synchronization error, resulting in multiple access interference (MIA) and inter symbol interference (ISI).

을 정의하고, 다음의 수학식 9를 만족하는

를 계산한다.

값은 SNR에 따라 결정될 수 있으나, 0.05를 사용하는 것이 바람직하다.1) First, in order to offset the increase in the length of the channel that occurs by catching synchronization quickly, the effective channel power

To satisfy the following equation (9)

Calculate

The value may be determined according to the SNR, but it is preferable to use 0.05.

>0인 경우, 동기를 빠르게 잡은 경우이다. 이 경우는 도 5a 및 도 5b에 도시된 바와 같이 두 가지 경우가 있을 수 있다. 2)

If> 0, synchronization is fast. In this case, there may be two cases as shown in FIGS. 5A and 5B.

인 경우

로 재설정하고 종료한다. (도 5a)a)

If

Reset and exit. (FIG. 5A)

인 경우 다른 채널 쪽으로 채널값이 유입될 가능성이 있으므로

로 재설정하고 수학식 5 내지 수학식 8의 과정을 다시 수행하여 얻어진 유효 길이를 최종 채널 길이

로 결정한다. (도 5b)b)

In case of, the channel value may flow to other channel.

The effective length obtained by resetting to and performing the process of Equations 5 to 8 again is the final channel length.

Decide on (FIG. 5B)

,

=0 인 경우는 도 6a 및 도 6b와 같이 두 가지 경우가 있다. 3)

,

There are two cases where = 0 is shown in FIGS. 6A and 6B.

으로 n을 변화시키면서 수학식 5 내지 수학식 8의 과정의 과정을 반복한 후 얻은 가장 작은

를 채널의 길이로 결정한다. (도 6a)a) In this case, the synchronization is fast but the values of other channels are introduced. Assuming that the time slot synchronization function is operating relatively normally, in this case, the length of inflow of other channels can be considered to be within N chips.

The smallest value obtained after repeating the process of Equations 5 to 8 with n being changed to

Is determined as the length of the channel. (FIG. 6A)

으로 n을 변화시키면서 수학식 5 내지 수학식 8의 과정의 과정을 반복한 후 얻은 가장 작은

를 채널의 길이로 결정한다. (도 6b)b) In this case, the synchronization is delayed and a synchronization error occurs.

The smallest value obtained after repeating the process of Equations 5 to 8 with n being changed to

Is determined as the length of the channel. (FIG. 6B)

으로 계산 가능하다. (단,

>0인 경우 n은 0으로 고정)4) Through the above process, correction of synchronization error is possible, and synchronization error

Can be calculated as (only,

N is 0 if> 0)

로 보정한다.In order to take into account the change in the channel, it is desirable to correct the estimated channel length. If the length of the estimated channel is shorter than actual, the signal power is reduced. On the other hand, if the length of the estimated channel is long, there is no big problem unless a synchronization error occurs. Therefore, it is very prudent to reduce the estimated channel length. Should be. To take into account channel changes

Correct with

The length of the channel estimated by the method as described above may be updated by the following method in consideration of the change of the channel. That is, since the channel may change at every channel length estimation, the channel is compensated for by the following method in consideration of this.

(단, n은 추정 순서로 n-1은 이전 값)인 경우는

로 셋팅함.One)

(Where n is the estimated order and n-1 is the previous value)

Set to.

인 경우는 내부적으로 count라는 변수를 설정하고, count =count+1로 count를 증가시킨다.2)

Is set internally to a variable named count and increments count by count = count + 1.

로 하고 count=0 Reset 한다.If count = T is satisfied

And count = 0 Reset.

The larger the T value, the higher the reliability required to reduce the channel length.

에 따라 가변적으로 윈도우 구간을 설정하여 심볼 동기를 추정할 수 있다. 예를 들어, 수학식 3에서 단순히 W를

로 대체하면 다음의 수학식 10과 같다. Length of channel estimated by the method as described above

The symbol synchronization can be estimated by variably setting the window interval according to the method. For example, simply saying W in

If replaced with the following equation (10).

At this time, the symbol synchronization t ₀ using the maximum value is determined according to Equation 11 below.

In FIG. 3, the demodulator 37 is composed of a matched filter and an equalizer to perform block demodulation, in which case the length of the channel is fixed to W and performed. The following equations (12) and (13) represent a matching filter (b) and a system channel matrix (A), respectively.

로 대체하여 계산하면, 복잡도가 감소하고 실제 존재하지 않는 채널에 대한 고려에 의해 발생하는 성능 저하를 방지할 수 있다. 또한, 필요한 경우 추정된 동기 오류만큼 동기 지점을 이동하여 수신 신호의 동기를 보정하여 사용할 수 있다.In Equation 13, W is the length of the estimated channel.

Calculation by substituting for, reduces complexity and prevents performance degradation caused by consideration of channels that do not actually exist. If necessary, the synchronization point may be moved by the estimated synchronization error to correct the synchronization of the received signal.

조건에서 본 발명의 BLER 성능이 종래기술에 비해 개선되었음을 확인할 수 있다.FIG. 7 illustrates a block error rate (BLER) performance curve when a joint detection receiver is used for the prior art and the present invention in a 3GPP TDD LCR system. That is, FIG. 8 illustrates a case of estimating synchronization using a fixed window interval according to the prior art under an ITU Pedestrian B channel (3 km / h) environment and a channel length estimated by estimating the channel length according to the present invention. When the synchronization is estimated by setting the window interval according to the length, the BLER performance at 16 QAM is compared. same

In the conditions it can be seen that the BLER performance of the present invention is improved compared to the prior art.

It is apparent to those skilled in the art that the present invention can be embodied in other specific forms without departing from the spirit and essential features of the present invention. Accordingly, the above detailed description should not be construed as limiting in all aspects and should be considered as illustrative. The scope of the invention should be determined by reasonable interpretation of the appended claims, and all changes within the equivalent scope of the invention are included in the scope of the invention.

According to the present invention, the receiver can provide various synchronization estimates that meet different synchronization purposes, estimate the length of the channel, estimate the synchronization, reduce unnecessary computation, and generate performance due to consideration of unnecessary interference. There is an effect that can prevent the degradation.

Claims (11)

A synchronization estimation method at a receiving side of a TDD (Time Division Duplex) CDMA mobile communication system, Calculating a correlation value between the reference downlink synchronization code and the received signal; Estimating a length of a channel using a channel matrix obtained through channel estimation; And And estimating a symbol synchronization using a cumulative sum of the correlation values calculated in the correlation value calculation step for a window period that is variably set according to the estimated channel length. The method of claim 1, And demodulating the received signal using the estimated channel length and symbol synchronization. The method of claim 2, And estimating chip sync using the correlation value calculated in the correlation value calculating step. The method of claim 1, And in the symbol synchronization estimating step, estimating a point at which the cumulative sum of correlation values is maximum during the window period as a symbol synchronization point. The method of claim 1, wherein the channel length estimating step: Calculating a channel matrix from the signal of the midamble portion of the received signal; Calculating power P _k for a channel by the maximum allowable channel length W allowable in the system; calculating power P _{k , w} for w channels while sequentially increasing w from 1 to W; And estimating the smallest w as the length of the channel within a range in which the ratio of P _k to P _{k , w} is greater than a specific threshold. The method of claim 5, And a step of correcting an error generated in the synchronization estimation process. A correlator for calculating a correlation value between a reference downlink sync code and a received signal; A channel length estimator for estimating a channel length using a channel matrix obtained through channel estimation; And And a symbol synchronizer for estimating symbol synchronization using a cumulative sum of a correlation value calculated by the correlator for a window period that is variably set according to the estimated channel length. The method of claim 7, wherein And a demodulator for receiving the received signal using the estimated channel length and symbol synchronization. The method of claim 7, wherein And a chip synchronizer for estimating chip sync using the correlation value calculated in the correlation value calculating step. The method of claim 7, wherein And the symbol synchronization estimating unit estimates a point at which the cumulative sum of correlation values becomes maximum during the window period as a symbol synchronization point. The method of claim 7, wherein the channel length estimator, Means for calculating a channel matrix from signals in the midamble portion of the received signal; Means for calculating power P _k for a channel by the maximum allowable channel length W allowable in the system; means for calculating the power (P _{k , w} ) for _w channels while sequentially increasing w from 1 to W; And means for estimating the smallest w as the length of the channel within a range in which the ratio of P _k to P _{k , w} is greater than a specific threshold.

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