KR20070081199A - Apparatus for compensating memory effect of power amplifier in a wireless communication system - Google Patents

Abstract

An apparatus for compensating for a memory effect of a power amplifier in a wireless communication system is provided to make it possible to provide an analog pre-distortion unit for compensating for a non-linear feature of the power amplifier together with the memory effect. An apparatus for compensating for a memory effect of a power amplifier in a wireless communication system comprises a controller(233), the first pre-compensator(207), the second pre-compensator(205), a subtraction unit(227), and an AD converter(229). The controller calculates and outputs distortion coefficient for compensating for a non-linear feature of the power amplifier. The first pre-compensator, constructed on a forward path, performs a pre-distortion process of a transmission signal according to the distortion coefficient from the controller. The second pre-compensator, constructed on a feedback path, performs a distortion process of a feedback signal according to the distortion coefficient. The subtraction unit generates an error signal by subtracting the output signal of the second pre-compensator from the output signal of the first pre-compensator. The AD converter converts the error signal into a digital signal and provides the converted digital signal for the controller.

Description

A device for compensating the memory effect of a power amplifier in a wireless communication system {APPARATUS FOR COMPENSATING MEMORY EFFECT OF POWER AMPLIFIER IN A WIRELESS COMMUNICATION SYSTEM}

1 illustrates a transmitter configuration of a wireless communication system that compensates for the nonlinear characteristics of a power amplifier using a conventional analog predistorter.

2 is a diagram illustrating a transmitter configuration of a wireless communication system equipped with an analog predistorter that compensates for a memory effect according to an embodiment of the present invention.

FIG. 3 is a diagram illustrating a detailed configuration of the first and second predistorters illustrated in FIG. 2. FIG.

4 is a diagram showing the configuration of the analog predistorter described in FIG.

5 illustrates a transmitter using a conventional digital predistorter and a transmitter according to the present invention in an indirect learning structure.

The present invention relates to a device for compensating the nonlinear characteristics of a power amplifier in a wireless communication system, and more particularly, to an analog pre-distortion apparatus for linearizing the nonlinear distortion characteristics of a broadband power amplifier.

In general, a power amplifier for transmitting and receiving in a wireless communication system using a radio frequency (RF) signal is classified into a low power low noise amplifier (LNA) and a high power amplifier (HPA). . The high power amplifier is mainly used in transmitters where efficiency is more important than noise. Therefore, high power amplifiers, which are widely used in wireless communication systems, operate close to nonlinear operating points for high efficiency.

In this case, the output of the power amplifier produces an intermodulation distortion (IMD) component that affects the spurious signal in other bands as well as in-band. In order to remove the spurless component, a feed forward method is mainly used. The feedforward method almost completely eliminates the spurless component, but the disadvantage is that the amplification efficiency is lowered and the control is required at the radio stage (RF stage).

In the high power amplifier of such a wireless communication system, nonlinear characteristics are generated in the process of obtaining high efficiency, and a so-called pre-distortion method is being studied to compensate for the nonlinear characteristics. The predistortion method is classified into an analog method and a digital method. Hereinafter, the analog predistortion method will be described. The analog predistortion method uses an analog stage, such as an analog stage, between a digital to analog converter and a power amplifier to output a signal that is equal in magnitude and antiphase to the horn modulation distortion (IMD) component of the power amplifier. In this case, the signal of the power amplifier having the nonlinear characteristic is linearized by making it at the IF or RF stage and applying it to the power amplifier input stage.

Herein, the non-linear characteristics include AM / AM (Amplitude Modulation to AM) characteristics in which an output signal is changed according to an input signal size of a power amplifier, and AM / PM (AM to Phase Modulation) in which a phase of an output signal is changed according to an input signal size. ) Characteristics.

To date, most predistorters have been studied a lot for signals with single-tone or narrowband frequencies, so they only compensate for the memoryless nonlinear nature of the power amplifier (i.e., only the current input affects the current output). Most of the way was. However, the nonlinear nature of the power amplifier at broadband frequencies significantly changes the AM / AM and AM / PM characteristics by affecting the output of the current power amplifier as well as the current input signal.

This phenomenon is called memory effects, and the nonlinearity of the power amplifier varies depending on the frequency bandwidth of the input signal. Recently, as the frequency band of a wireless communication system is gradually widened, research and development considering the memory effect of a nonlinear amplifier are being actively conducted. However, in the conventional analog predistorter, only the linearization of the AM-AM and AM-PM distortion components of the power amplifier is implemented, and since the memory effect of the power amplifier is not considered, the linearization performance cannot be maximized.

1 illustrates a configuration of a transmitter 100 of a wireless communication system that compensates for the nonlinear characteristics of a power amplifier using a conventional analog predistorter.

The transmitter having the configuration of FIG. 1 is used in, for example, a wireless communication system using Radio Frequency (RF). First, referring to the forward path of the transmitter 100 of FIG. 1, a baseband signal X (n), which is a digital signal, is applied as an input signal, and the input signal is a digital quadrature modulator (DQM) ( 101), a digital pre-analog converter (DAC) 103, an intermediate frequency (IF) band pass filter (BPF) 105, and an analog pre-distorter (PD). 107).

The analog predistorter 107 outputs a signal having the same magnitude as that of the nonlinear characteristic of the power amplifier (PA) 115 and having an antiphase. The output signal of the analog predistorter 107 is converted into a desired radio frequency through a frequency up converter composed of an RF local oscillator (LO) 109 and a mixer 111, and a high frequency. After the radio frequency (RF) band pass filter (BPF) 113 is removed and the out-of-band components are removed, they are amplified by the power amplifier 115 and transmitted to the wireless network through the antenna.

Next, referring to the feedback path of the transmitter 100 of FIG. 1, a portion of an output signal of the power amplifier 115 is extracted through a directional coupler 117 to form an RF local oscillator (LO). 109 and another mixer 119 is passed to a frequency down converter. The frequency down converter converts the amplified signal to an intermediate frequency (IF), and the signal converted to the intermediate frequency is a feedback band pass filter (FB BPF) 121, an analog to digital converter (ADC) ( The digital quadrature demodulator (DQDM) 125 is inputted through 123.

The digital quadrature demodulator 125 demodulates the input digital signal into an in-phase signal component and a quadrature signal component, and transmits the demodulated digital signal to the controller 129. The controller 129 compares the input signal to the analog predistorter 107 and the distorted output signal through the power amplifier 115, and is then transmitted to the analog predistorter 107 so that the difference between the two signals is minimized. Update the predistorter coefficient G. Here, the input signal to the analog predistorter 107 is extracted only to the baseband signal through an envelope detector (ED) 127 and transmitted to the controller 129.

In addition, in FIG. 1, reference numeral P1 is shown as a functional block by tying up the analog predistorter 107, the envelope detector 127, and the controller 129 that perform the precompensation operation.

In the above-described configuration of FIG. 1, only the current input signal is transmitted to the controller 129 when the predistorter coefficient G is determined. However, as described above, the nonlinear signal of the power amplifier has a 'memory effect' which is influenced by the past input signal in addition to the current input signal. This memory effect generally increases as the bandwidth of the input signal increases, affecting the magnitude and phase of the IMD component, which in turn degrades the linearization performance of the power amplifier. Especially for the linearization of power amplifiers in broadband wireless communication systems, such memory effects must be considered.

In addition, if the output of the power amplifier 115 is directly returned using the directional coupler 117, the dynamic range of the signal input to the analog-to-digital converter 123 is very large, resulting in high bit resolution. An analog-to-digital converter must be used. That is, there is a problem that an expensive analog-to-digital converter must be used.

It is therefore an object of the present invention to provide an apparatus for compensating for the nonlinear characteristics of a power amplifier in a wireless communication system.

Another object of the present invention is to provide an apparatus for compensating for the memory effect of a power amplifier in a wireless communication system.

It is still another object of the present invention to provide an apparatus for reducing the input dynamic range of an analog-to-digital converter provided in a path environment configured to compensate for nonlinear characteristics of a power amplifier.

According to a preferred embodiment of the present invention for achieving the above object, an apparatus for compensating for nonlinear characteristics of a power amplifier in a wireless communication system, comprising: a controller for calculating and outputting a distortion coefficient for compensating for the nonlinear characteristics of a power amplifier; And a first predistorter for predistorting and outputting a transmission signal according to a distortion coefficient from the controller, and a feedback path, and a feedback path from the power amplifier. A second predistorter for distorting the feedback signal by the distortion coefficient, and outputting an error signal obtained by subtracting the output signal of the second predistorter from the output signal of the first predistorter; And an analog / digital converter for converting an error signal into a digital signal and providing the same to the controller.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the following description of the present invention, if it is determined that a detailed description of a related known function or configuration may unnecessarily obscure the subject matter of the present invention, the detailed description thereof will be omitted.

The present invention proposes a method of improving the compensating performance of a predistorter by considering a memory effect of a past input signal of a power amplifier when an analog predistorter is used to compensate for nonlinear characteristics in a power amplifier of a wireless communication system. Shall be. In addition, the present invention will be described with respect to a method for reducing the dynamic range (dynamic range) of the analog-to-digital converter provided in the path environment configured to compensate for the nonlinear characteristics of the power amplifier.

2 illustrates a configuration of a transmitter 200 of a wireless communication system equipped with an analog predistorter that compensates for a memory effect according to an embodiment of the present invention.

As shown, the transmitter 200 includes a digital quadrature modulator (DQM) 201, a digital-to-analog converter (DAC) 203, an intermediate frequency bandpass filter (IF BPF) 205, and a first predistorter ( 207, local oscillator 209, mixer 211, radio frequency bandpass filter (RF BPF) 213, power amplifier (PA) 215, directional coupler 217, variable attenuator 219, mixer ( 221, feedback bandpass filter (FB BPF) 223, second predistorter 225, subtractor 227, analog / digital converter 229, digital quadrature demodulator (DQDM) 231, controller 233 ), A phase shifter 235, and a comparator 237.

First, referring to a forward path of the transmitter 200, the digital quadrature modulator 201 quadrature modulates an input baseband signal to output an intermediate frequency signal. The digital-to-analog converter 9203 converts the intermediate frequency signal from the digital quadrature modulator 201 into an analog signal and outputs the analog signal. The intermediate frequency bandpass filter 205 outputs only the signal of a desired band from the signal from the digital quadrature modulator 201.

As shown in FIG. 3, the first predistorter 207 includes a plurality of retarders 307 to 309, a plurality of predistorters 301 to 305, and a combiner 319. Here, the plurality of delayers 307 to 309 are for generating constant past input signals, and the predistorters 310 to 305 are for predistorting the current input signal and the predetermined past input signals. The number of the delayers 307 to 309 is set to an appropriate number through simulation. The first predistorter 207 distorts the current input signal and the constant past input signals by the coefficients G ₁ to G _n from the controller 233 to compensate for the nonlinear characteristics of the power amplifier 215. And combines and outputs the distorted signals.

The local oscillator 209 generates a local oscillator (LO) frequency for converting the IF signal into a radio frequency (RF) signal. The mixer 211 mixes the signal from the first predistorter 207 and the local oscillation frequency generated by the local oscillator 209 to convert the IF signal into an RF signal and outputs the converted RF signal.

The radio frequency band pass filter 205 outputs only the signal of a desired band from the signal from the mixer 211. The power amplifier 215 amplifies the signal from the radio frequency bandpass filter 205 and transmits it through the antenna. Here, since the signal input to the power amplifier 215 is a predistorted signal in consideration of a memory effect, the signal passing through the power amplifier 215 may maintain a linear characteristic.

Next, referring to the feedback path, the directional coupler 217 couples the output signal of the power amplifier 215 to the variable attenuator 219. The comparator 237 compares the signal input to the first predistorter 207 and the signal input to the second predistorter 225, and the variable attenuator 219 so that the amplitudes of the two signals are the same. To control. The variable attenuator 219 adjusts and outputs an amplitude of a signal input under the control of the comparator 237. Here, a variable amplifier circuit may be used instead of the variable attenuator 219.

The mixer 221 mixes the signal from the variable attenuator 219 and the local oscillation frequency generated by the local oscillator 209 to convert the RF signal into an IF signal and output the result. The feedback bandpass filter 223 passes only the signal of a desired band and outputs the signal from the mixer 221.

The second predistorter 225 has the same structure as the first predistorter 207 and distorts and outputs the signal from the bandpass filter 223 by the coefficients from the controller 233. .

The phase shifter 235 adjusts the phase of the output signal of the first predistorter 207 such that the output of the first predistorter 207 and the output phase of the second predistorter 225 are the same. Adjust the output. The subtractor 227 subtracts the signal from the second predistorter 225 from the signal from the delayer 235 and outputs the subtracted signal. Here, the subtractor 227 may be implemented as an orthogonal hybrid. In this way, if the phase is adjusted in the same manner through the phase shifter 235, the subtractor 227 may obtain the correct error signal e (n).

The analog / digital converter 229 converts the error signal from the subtractor 227 into a digital signal and outputs the digital signal. Here, the signal input to the analog-to-digital converter 229 is an error signal obtained by subtracting the output signal of the second predistorter 225 from the output signal of the first predistorter 207 and having a small dynamic range. The digital quadrature demodulator 231 quadrature demodulates the signal from the analog-to-digital converter 239 and outputs a baseband signal.

The controller 233 uses the error signal e (n) from the digital quadrature demodulator 231 and the input signal x (n) of the digital quadrature modulator 201 to provide the first and second predistorters 207. , And calculates and outputs a coefficient set W (G ₁ to G _n ) necessary for the control of 225. The controller 233 may be implemented by a digital signal processor (DSP), and calculates the coefficient set by using an adaptive control algorithm such as a least mean square (LMS) or a recursive least square (RLS). In this case, the input signal of the adaptive control algorithm is x = [x (n) x (n-1) x (n-1) ... x (nM)], which is a set of past samples of x (n), and an error signal. The output signal e (n) of the digital quadrature demodulator 231 is used.

3 illustrates a detailed configuration of the first and second predistorters 207 and 225 described in FIG. 2. The following description focuses on the operation of the first predistortion unit 207.

Referring to FIG. 3, the signal output from the intermediate frequency bandpass filter 205 is transferred to a plurality of analog predistorters PD1, PD2,..., PDn 301, 303, and 305. At this time, the current input signal is transmitted to the predistorter (PD1) 301 of the first stage, and the past input signal delayed through the delay unit 307 is transmitted to the predistorter (PD2) 303 of the second stage. do. In the same manner, the n−1 th past input signal is delivered to the n th predistorter (PDn) 305 through the n−1 delayers 307,..., 309.

Then, each of the predistorters 301 to 305 multiplies the input signal by a corresponding coefficient G from the controller 233 and outputs the multiplied coefficient. That is, the predistorters 301 to 305 predistort the current input signal and the predetermined past input signals and output the predistorted signals. Then, the combiner 319 combines the signals from the predistorters 301 to 305 and outputs them to the mixer 211. Here, the coefficients G1, G2, ..., Gn of each predistorter may be divided into an in-phase signal component and a quadrature signal component. As such, the present invention further includes predistorters for the past input signals, thereby compensating for the memory effect of the power amplifier by the past input signals.

FIG. 4 shows the configuration of the analog predistorters 301 to 305 described in FIG.

4, the real component extractor 401 of the predistorter detects an in-phase signal component from the input signal x (n), and the imaginary component extractor 403 uses a quadrature signal component from the input signal x (n). Extract The multipliers 405 and 407 multiply the in-phase signal components by the in-phase precompensation gain Gi, and the quadrature signal components by the quadrature in-phase precompensation gain G _q . The signal components multiplied by the precompensation gains Gi and G _q are summed through a summer 409 and output to the combiner 319.

According to the above-described embodiment of the present invention, a low bandwidth DAC can be used, which is less restricted in a required bandwidth of a signal input to a power amplifier than a conventional digital predistorter. In this regard, referring to Korean Patent Application No. P2004-0000148, which is the applicant's prior application, discloses a digital predistorter using a FIR structure lookup table capable of compensating the memory effect of a power amplifier. In the case of the digital predistorter as in the above example, the input bandwidth of the DAC is larger than the input bandwidth of the digital predistorter because it is located in front of the digital-to-analog converter (DAC). Therefore, when the digital predistorter of the above structure is used, it is difficult to use an expensive high-speed DAC device having a relatively high 'sampling rate' so as not to be restricted by the input bandwidth of the DAC side, and the present invention can improve this point. have.

In addition, the present invention corresponds to the difference between the output signal of the first predistorter 207 and the output signal of the second predistorter 225 is input to the analog-to-digital converter 239 configured in the track environment path Since this is an error signal, an analog-to-digital converter using low bit resolution can be used in the path environment. Using low bit resolution means that you can sample properly with fewer bits. Accordingly, it is possible to use an analog-to-digital converter that supports a high sample rate, which is advantageous in that it can process a signal having a wider bandwidth. The following is a closer look at this.

FIG. 5 illustrates a transmitter using a conventional digital predistorter and a transmitter according to the present invention in an indirect learning structure. (a) shows the indirect learning structure of the transmitter using the existing digital predistorter, and (b) shows the indirect learning structure of the transmitter according to the present invention.

Referring to (a), first, the nonlinear distorted signal y (n) and the input signal x (n) are processed by the same signal processor f (.), and the difference e (n) between the output d (n) and o (n). The signal processor f (.) Is controlled so that) becomes '0'. If the signal processor f (.) Is a monotonically increasing function, y (n) and x (n) must be equal to e (n) to be '0'. Thus, y (n) generated by the signal pre-distorted through f (.) Becomes equal to x (n), so the nonlinear distortion part (amplifier) is linearized.

Referring to (b), the above-described structure of (a) is modified. In this case, the control algorithm for the signal processor f (.) is such that e (n) becomes '0'. As mentioned earlier, if f (.) Is a monotonically increasing function, e (n) must be equal to x (n) since y (n) must be equal to x (n), so that the nonlinear distortion part (amplifier) is linearized. Can be obtained.

The difference between the two structures is that the input signal of the control algorithm for f (.) Is different from y (n) and e (n) in (a) and x (n) and e (n) in (b). will be. When using the structure of (a), y (n) is required as an input signal, so a high bit resolution ADC that sufficiently takes into account the amplitude variation of y (n) is required to transfer it to the algorithm controller without distortion. In this case, the error signal e (n) is easy to be processed in the digital block, which is suitable for the digital predistorter.

However, the structure of (b) uses the input signal x (n) as it is as input from the algorithm controller. The other input signal e (n) is a value obtained by digitally converting the difference between the output of the first predistorter 207 and the output of the second predistorter 225 as proposed by the present invention. In this case, the amplitude change range of e (n) is much smaller than y (n), so a relatively low bit resolution ADC can be used.

Meanwhile, in the detailed description of the present invention, specific embodiments have been described. However, various modifications may be made without departing from the scope of the present invention. Therefore, the scope of the present invention should not be limited to the described embodiments, but should be determined not only by the scope of the following claims, but also by the equivalents of the claims.

As described above, according to the present invention, an analog predistorter capable of compensating for the nonlinear characteristics and the memory effect of a power amplifier in a wireless communication system can be provided. In addition, the present invention can reduce the dynamic range of the ADC input signal configured in the path environment, it is possible to use the ADC of low bit resolution. In other words, an ADC that supports a high sample rate can be used, which has the advantage of processing a wider bandwidth signal.

Claims (9)

An apparatus for compensating for nonlinear characteristics of a power amplifier in a wireless communication system, the apparatus comprising: A controller for calculating and outputting a distortion coefficient for compensating for nonlinear characteristics of the power amplifier; A first predistorter configured in a forward path, for predistorting and outputting a transmission signal by a distortion coefficient from the controller; A second predistorter configured to be in a feedback path, the second predistorter compensating and outputting the feedback signal from the power amplifier by the distortion coefficient; A subtractor for generating an error signal obtained by subtracting the output signal of the second predistorter from the output signal of the first predistorter; And an analog / digital converter for converting the error signal from the subtractor into a digital signal and providing the same to the controller. The method of claim 1, And the first predistorter is configured in an analog intermediate frequency (IF) stage. The method of claim 1, And the controller calculates the distortion coefficient by performing an adaptive control algorithm with the error signal and the baseband signal. The method of claim 1, And the adaptive control algorithm is a Least Mean Square (LMS) or a Recursive Least Square (RLS) algorithm. The method of claim 1, And a variable attenuator for adjusting the amplitude of the feedback signal such that an input signal of the first predistorter and an input signal of the second predistorter are the same. The method of claim 1, And a phase shifter for adjusting the phase of the output signal of the first predistorter to provide the subtractor. The method of claim 1, wherein the first and second predistortion unit, A plurality of delayers for generating predetermined past input signals, A plurality of predistorters multiplying each of the current input signal and the past input signals by the distortion coefficient from the controller; And a combiner for combining and outputting the predistorted signals from the predistorters. The method of claim 1, wherein the transmission path, A digital quadrature modulator for orthogonally modulating the baseband signal to an intermediate frequency signal; A digital / analog converter for converting a signal from the digital quadrature modulator into an analog signal and outputting the analog signal to the first predistorter; An RF converter for converting a signal from the first predistorter into a radio frequency (RF) signal; And the power amplifier for amplifying a signal from the RF converter and transmitting it through an antenna. The method of claim 1, wherein the bin environment, A coupler for coupling the output of the power amplifier, A variable attenuator for adjusting signal amplitude from the coupler; An IF converter converting the signal from the variable attenuator into an IF signal and outputting the signal to the second predistorter; And a digital quadrature demodulator for quadrature demodulating the signal from the analog / digital converter to provide a baseband signal to the controller.

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