KR20070076842A - Liquid crystal display panel and manufacturing method thereof - Google Patents

Liquid crystal display panel and manufacturing method thereof Download PDF

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KR20070076842A
KR20070076842A KR1020060006230A KR20060006230A KR20070076842A KR 20070076842 A KR20070076842 A KR 20070076842A KR 1020060006230 A KR1020060006230 A KR 1020060006230A KR 20060006230 A KR20060006230 A KR 20060006230A KR 20070076842 A KR20070076842 A KR 20070076842A
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South Korea
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column spacer
thin film
film transistor
contact hole
substrate
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KR1020060006230A
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Korean (ko)
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이남석
홍권삼
조우식
임배혁
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삼성전자주식회사
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Priority to KR1020060006230A priority Critical patent/KR20070076842A/en
Publication of KR20070076842A publication Critical patent/KR20070076842A/en

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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1339Gaskets; Spacers; Sealing of cells
    • G02F1/13394Gaskets; Spacers; Sealing of cells spacers regularly patterned on the cell subtrate, e.g. walls, pillars
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1335Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509Filters, e.g. light shielding masks
    • G02F1/133514Colour filters
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136227Through-hole connection of the pixel electrode to the active element through an insulation layer
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/1368Active matrix addressed cells in which the switching element is a three-electrode device

Abstract

An LCD panel and a manufacturing method thereof are provided to reduce a mask process and improve process efficiency by forming a column spacer on a thin film transistor at the same time when a contact hole is patterned in a stacked organic layer. A thin film transistor(10) is formed on a substrate(101). An organic layer is applied on the substrate and the thin film transistor, and is patterned by a mask process to simultaneously form a column spacer(162) and a contact hole(170). The organic layer has a thickness ranging from 6 to 7 m in consideration of a height difference of the column spacer when the column spacer and the contact hole are formed. The column spacer is formed integrally with the organic layer.

Description

액정 표시 패널 및 그 제조방법 {Liquid Crystal Display Panel And Manufacturing Method Thereof}Liquid Crystal Display Panel And Manufacturing Method Thereof {Liquid Crystal Display Panel And Manufacturing Method Thereof}

도 1은 본 발명의 바람직한 실시예에 따른 액정 표시 패널을 개략적으로 도시한 단면도이다.1 is a schematic cross-sectional view of a liquid crystal display panel according to an exemplary embodiment of the present invention.

도 2a 및 도 2b는 본 발명의 바람직한 실시예에 따라 액정 표시 패널의 개략적인 공정을 도시한 공정도이다.2A and 2B are flowcharts illustrating a schematic process of a liquid crystal display panel according to an exemplary embodiment of the present invention.

<도면부호의 주요부분에 대한 설명><Description of main parts of drawing code>

1: 박막트랜지스터기판 101: 기판1: thin film transistor substrate 101: substrate

110: 게이트전극 120: 게이트절연막110: gate electrode 120: gate insulating film

131: 활성층 132: 오믹접촉층 131: active layer 132: ohmic contact layer

141: 드레인전극 142: 소오스전극 141: drain electrode 142: source electrode

150: 무기막 160: 유기막150: inorganic film 160: organic film

161: 유기절연막 162: 컬럼스페이서161: organic insulating film 162: column spacer

170: 컨택홀 180: 화소전극170: contact hole 180: pixel electrode

2: 칼라필터기판 210: 기판2: color filter substrate 210: substrate

220: 칼라필터 230: BM220: color filter 230: BM

240: 공통전극 3: 액정240: common electrode 3: liquid crystal

본 발명은 액정 표시 패널 제조방법에 관한 것으로, 더욱 상세하게는 유기절연막 형성시, 동시에 컬럼스페이서를 형성함으로써 마스크 공정을 단축시킬 수 있는 액정 표시 패널 및 그 제조방법에 관한 것이다. BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a liquid crystal display panel, and more particularly, to a liquid crystal display panel and a method for manufacturing the same, which can shorten a mask process by simultaneously forming a column spacer when forming an organic insulating film.

종래의 액정표시패널 제조방법은 블랙매트릭스, RGB칼라필터, 오버코트 및 공통전극을 차례대로 패터닝한 후 셀갭을 유지하기 위해 컬럼스페이서를 칼라필터 기판 전면에 형성하고 있다.In the conventional method of manufacturing a liquid crystal display panel, a column spacer is formed on the entire surface of the color filter substrate to maintain a cell gap after patterning the black matrix, the RGB color filter, the overcoat, and the common electrode in order.

그러나, 종래의 액정표시패널 제조방법은 컬럼스페이서를 형성하기 위한 별도의 마스크 공정이 필요하므로 공정의 효율성이 떨어지는 문제가 있었다.However, the conventional liquid crystal display panel manufacturing method has a problem in that the efficiency of the process is inferior because a separate mask process for forming the column spacer is required.

또한, 증가되는 마스크 공정에 의해 후공정 마진이 부족하고, 컬럼스페이서 하부에서 얼라인(Align)이 잘 되지 않아 스미어(smear)불량 또는 출렁임(brusing) 현상이 발생할 가능성이 큰 문제가 있었다. In addition, there is a problem that the post-process margin is insufficient due to the increased mask process, the alignment is not well under the column spacer, the smear (smear) defect or the phenomenon of swelling (brusing) was a big problem.

본 발명은 상기와 같은 문제점을 해결하기 위해 안출된 것으로써, 본 발명의 목적은 컬럼스페이서와 컨택홀을 동일한 마스크 공정에 의해 형성함으로써 마스크 공정을 단축시켜 제작비용을 절감할 수 있을 뿐만아니라, 공정의 효율성을 높이는데 있다.The present invention has been made to solve the above problems, the object of the present invention is to reduce the manufacturing cost by shortening the mask process by forming the column spacer and contact holes by the same mask process, process To increase the efficiency.

본 발명의 또 다른 목적은 컬럼스페이서와 유기절연막을 일체로 형성함으로써 가압시 스미어 불량이 발생하는 것을 방지하여 표시 품질을 향상시키는 데 있다. Still another object of the present invention is to form a column spacer and an organic insulating film integrally, thereby preventing smear defects from occurring during pressurization, thereby improving display quality.

상기와 같은 문제점을 해결하기 위해 본 발명에 따른 액정 표시 패널은 칼라필터가 형성된 칼라필터 기판과; 박막트랜지스터가 형성된 박막트랜지스터 기판과;상기 박막트랜지스터 기판에 상기 박막트랜지스터를 덮는 유기절연막및; 상기 유기절연막과 일체로 형성된 컬럼스페이서를 포함하여 구성되는 것을 특징으로 한다.In order to solve the above problems, the liquid crystal display panel according to the present invention includes a color filter substrate having a color filter; A thin film transistor substrate having a thin film transistor; an organic insulating layer covering the thin film transistor on the thin film transistor substrate; It characterized in that it comprises a column spacer formed integrally with the organic insulating film.

한편, 본 발명에 따른 액정 표시 패널 제조방법은 기판 상에 박막트랜지스터를 형성하는 단계; 상기 기판 및 박막트랜지스터 상에 유기막을 도포하고 마스크 공정에 의해 패터닝하여 컬럼스페이서와 컨택홀을 동시에 형성하는 단계를 포함하여 구성되는 것을 특징으로 한다.On the other hand, the liquid crystal display panel manufacturing method according to the present invention comprises the steps of forming a thin film transistor on the substrate; And forming a column spacer and a contact hole simultaneously by applying an organic layer on the substrate and the thin film transistor and patterning the same by a mask process.

그리고, 상기 컬럼스페이서와 컨택홀을 형성하는 단계에서 컬럼스페이서의 단차를 고려해 유기막을 6~7um 두께로 도포하는 것을 특징으로 한다.In addition, in the forming of the column spacer and the contact hole, the organic layer may be applied to a thickness of 6 to 7 μm in consideration of the step difference of the column spacer.

그리고, 상기 컬럼스페이서는 유기절연막과 일체로 형성되는 것을 특징으로 한다.The column spacer may be integrally formed with the organic insulating layer.

그리고, 상기 컬럼스페이서와 컨택홀을 동시에 형성하는 단계는 컬럼스페이서와 컨택홀을 슬릿 마스크 또는 하프톤 마스크를 이용하여 동시에 패터닝하는 것을 특징으로 한다.In the forming of the column spacer and the contact hole simultaneously, the column spacer and the contact hole may be simultaneously patterned using a slit mask or a halftone mask.

이하, 본 발명의 구체적인 구성 및 작용에 대해 실시예와 도면을 참조하여 상세히 설명하기로 한다.Hereinafter, specific configurations and operations of the present invention will be described in detail with reference to embodiments and drawings.

도 1는 본 발명의 바람직한 실시예에 따른 액정표시패널을 개략적으로 도시한 단면도이다.1 is a schematic cross-sectional view of a liquid crystal display panel according to an exemplary embodiment of the present invention.

도 1에 도시된 액정 표시 패널은 액정(3)을 사이에 두고 서로 대향하여 합착된 박막트랜지스터기판(1) 및 칼라필터기판(2)을 구비한다.The liquid crystal display panel shown in FIG. 1 includes a thin film transistor substrate 1 and a color filter substrate 2 bonded together to face each other with a liquid crystal 3 therebetween.

박막트랜지스터기판(1)에는 박막트랜지스터(10), 박막트랜지스터(10)와 접속된 화소전극(180)이 기판(101)상에 형성된다.In the thin film transistor substrate 1, a thin film transistor 10 and a pixel electrode 180 connected to the thin film transistor 10 are formed on the substrate 101.

또한, 박막트랜지스터기판(1)은 박막 트랜지스터(10)와 화소 전극(170) 사이에 형성되어 박막트랜지스터(10)를 보호하는 유기절연막(161)을 포함하고, 데이타 배선과 유기절연막(161) 사이에는 무기절연막(150)이 더 포함될 수 있다. Further, the thin film transistor substrate 1 includes an organic insulating film 161 formed between the thin film transistor 10 and the pixel electrode 170 to protect the thin film transistor 10, and between the data line and the organic insulating film 161. The inorganic insulating film 150 may be further included.

박막 트랜지스터는 게이트배선과 연결되는 게이트전극(110)과, 데이터배선과 연결되는 소스 전극(142)과, 화소전극(180)과 연결되는 드레인 전극(141)을 구비한다. 이러한 박막 트랜지스터(10)는 게이트배선에 공급되는 스캔 신호에 응답하여 데이터 배선에 공급되는 화소 신호를 화소전극(180)에 공급한다. 데이타배선과 유기절연막(161) 사이에는 무기절연막(150)이 더 포함될 수 있다. The thin film transistor includes a gate electrode 110 connected to the gate line, a source electrode 142 connected to the data line, and a drain electrode 141 connected to the pixel electrode 180. The thin film transistor 10 supplies the pixel signal supplied to the data line to the pixel electrode 180 in response to the scan signal supplied to the gate line. An inorganic insulating layer 150 may be further included between the data line and the organic insulating layer 161.

무기절연막(150)은 유기절연막(161)과 박막 트랜지스터(10)의 활성층(131)의 접촉을 차단하여 유기절연막(161)과 활성층(131)의 화학 반응으로 인한 박막 트랜지스터(10)의 특성 열화를 방지한다. 유기절연막(161)은 무기막(150) 보다 유전율이 높고 두껍게 형성되어 기생 캐패시턴스의 영향없이 화소전극(180)이 게이트 라 인 및 데이터 라인과 중첩 가능하게 함으로써 화소전극(180)의 개구율이 향상되게 한다. 유기절연막(161)은 아크릴 등과 같은 감광성 유기물질이 이용된다. 유기막은 아크릴 등과 같은 감광성 유기물질이 이용된다.The inorganic insulating layer 150 blocks contact between the organic insulating layer 161 and the active layer 131 of the thin film transistor 10, thereby deteriorating characteristics of the thin film transistor 10 due to a chemical reaction between the organic insulating layer 161 and the active layer 131. To prevent. The organic insulating layer 161 has a higher dielectric constant and is formed thicker than the inorganic layer 150 so that the pixel electrode 180 can overlap the gate line and the data line without affecting the parasitic capacitance, thereby improving the aperture ratio of the pixel electrode 180. do. As the organic insulating layer 161, a photosensitive organic material such as acryl is used. As the organic film, a photosensitive organic material such as acryl is used.

화소전극(180)은 유기절연막(161)위에 형성되고 유기절연막(161) 및 무기절연막(150)을 관통하는 컨택홀(170)을 통해 박막트랜지스터(10)의 드레인 전극(141)과 접속된다.The pixel electrode 180 is formed on the organic insulating layer 161 and is connected to the drain electrode 141 of the thin film transistor 10 through a contact hole 170 passing through the organic insulating layer 161 and the inorganic insulating layer 150.

칼라필터기판(2)에는 빛샘 방지를 위한 블랙매트릭스(220), 칼라구현을 위한 칼라필터(230), 화소전극(180)과 전계를 이루는 공통전극(240)이 형성된다.The color filter substrate 2 includes a black matrix 220 for preventing light leakage, a color filter 230 for color implementation, and a common electrode 240 forming an electric field with the pixel electrode 180.

이러한 칼라필터기판(2)과 박막트랜지스터기판(1) 사이에는 두 기판이 소정 간격인 셀갭(Cell Gap)을 유지하게 하기 위한 컬럼스페이서(column spacer)(162)가 형성된다.A column spacer 162 is formed between the color filter substrate 2 and the thin film transistor substrate 1 so that the two substrates maintain a cell gap at predetermined intervals.

본 발명에 따른 컬럼스페이서(162)는 박막트랜지스터기판(1)의 유기절연막(161)과 일체화되어 형성된다. The column spacer 162 according to the present invention is formed integrally with the organic insulating film 161 of the thin film transistor substrate 1.

표-1은 종래의 컬럼스페이서와 유기절연막의 물성을 비교한 것이다.Table-1 compares the physical properties of the conventional column spacer and the organic insulating film.

본 발명에 따른 유기절연막(411B)Organic insulating film 411B according to the present invention 종래의 컬럼스페이서 (JSR NN-777)Conventional Column Spacer (JSR NN-777) 점도(CP)Viscosity (CP) 27.5 ±2 CP27.5 ± 2 CP 24 CP24 CP 투과율(%) (400nm 기준)% Transmittance (at 400nm) 91.5%91.5% >86%> 86%

상기 표-1을 통해 알 수 있듯이, 종래의 컬럼스페이서와 비교해볼때 유기절연막의 점도와 투과율 성능이 우수하기 때문에 종래의 아크릴계 에폭시 수지로 형성되는 컬럼스페이서를 유기절연막으로 훌륭하게 대체할 수 있다.As can be seen from Table 1, since the organic insulating film has excellent viscosity and transmittance performance compared to the conventional column spacer, the column spacer formed of the conventional acrylic epoxy resin can be replaced with the organic insulating film.

본 발명에 따른 컬럼스페이서(162)는 유기절연막(161)과 일체로 형성되므로 안정된 구조가 가능하며, 이를 통해 가압시 스미어 발생을 방지할 수 있어 표시품질을 향상시킬 수 있다.Since the column spacer 162 according to the present invention is formed integrally with the organic insulating layer 161, a stable structure is possible, and thus, smear generation can be prevented during pressurization, thereby improving display quality.

또한, 컬럼스페이서(162)로써 유기막의 우수한 재료적인 특성 뿐만아니라, 하기에 설명할 공정에 있어서도 마스크 공정을 단축시킬 수 있으므로 공정효율성 측면에서도 매우 탁월한 효과가 발생한다.In addition, not only the excellent material properties of the organic film as the column spacer 162, but also the mask process can be shortened in the process to be described below.

본 발명에 따른 액정 표시 패널의 제조방법에 대해 실시예를 참조하여 상세하게 살펴보기로 한다.A method of manufacturing a liquid crystal display panel according to the present invention will be described in detail with reference to an embodiment.

도 3a 및 도 3b는 본 발명의 바람직한 실시예에 따라 컬럼스페이서(162)를 형성하는 방법을 개략적으로 도시한 공정도이다. 3A and 3B are process diagrams schematically illustrating a method of forming the column spacer 162 according to a preferred embodiment of the present invention.

도 3a를 참조하면, 기판(101)상에 게이트 금속을 증착(Depositon)하고, 포토리소그라피(Photolithograpy) 및 식각공정에 의해 금속을 패터닝하여 게이트전극(110)을 포함한 게이트배선을 형성한다.Referring to FIG. 3A, a gate metal is deposited on a substrate 101, and the metal is patterned by photolithography and etching to form a gate wiring including the gate electrode 110.

그 후, 게이트 절연막(120)을 증착하고, 비정질실리콘막(amorphous silicon layer)과 n+ 비정질실리콘막을 증착한 후, 포토리소그라피 및 식각공정에 의해 n+ 비정질실리콘막과 비정질실리콘막을 패터닝하여 활성층(131)과 오믹접촉층(132)을 형성한다.Thereafter, the gate insulating layer 120 is deposited, an amorphous silicon layer and an n + amorphous silicon layer are deposited, and then the n + amorphous silicon layer and the amorphous silicon layer are patterned by photolithography and etching processes to form the active layer 131. And the ohmic contact layer 132 is formed.

이어서, 오믹접촉층(132)과 게이트 절연막(120) 상에 데이타 금속을 증착하고 포토리소그라피 및 식각공정에 의해 데이타 금속을 패터닝하여 소스전극(142)과 드레인전극(141)을 포함하는 데이타배선을 형성한다. 이에 따라, 기판(101)상에는 게이트 배선 및 데이타 배선과 접속된 박막트랜지스터(10)가 형성된다.Subsequently, the data metal is deposited on the ohmic contact layer 132 and the gate insulating layer 120, and the data metal is patterned by photolithography and etching to form a data wiring including the source electrode 142 and the drain electrode 141. Form. As a result, the thin film transistor 10 connected to the gate wiring and the data wiring is formed on the substrate 101.

그리고, 박막트랜지스터(10)가 형성된 게이트절연막(120)상에 무기절연막(150)과 유기절연막(161)을 순차적으로 도포한다. 종래에 도포되는 유기막의 두께는 3~4um 높이로 도포되는데 반하여, 본 발명은 컬럼스페이서(162)를 유기막으로 형성하기 때문에 단차를 고려한 높이로 도포하여야 한다. 통상적으로 컬럼스페이서는 약 3um의 높이를 가지며, 유기막의 두께는 3~4um이므로 6~7um 높이로 유기막을 도포하는 것이 바람직하다.The inorganic insulating film 150 and the organic insulating film 161 are sequentially coated on the gate insulating film 120 on which the thin film transistor 10 is formed. The thickness of the conventional organic film to be applied is applied to a height of 3 ~ 4um, while the present invention is to form the column spacer 162 as an organic film should be applied to a height considering the step. Typically, the column spacer has a height of about 3 μm, and the thickness of the organic film is 3 to 4 μm, so that the organic film is preferably applied to a height of 6 to 7 μm.

이어서, 도 3b에 도시된 바와 같이 동일한 마스크 공정을 통해 컬럼스페이서(162)와 컨택홀(170)을 동시에 형성하게 된다. 컬럼스페이서(162)와 컨택홀(170)을 동시에 형성하기 위해 사용되는 마스크는 유기절연막이 이중두께를 갖게 할 수 있는 것이면 무엇이나 가능하며, 슬릿마스크 또는 하프톤 마스크를 사용하는 것이 바람직하다.Subsequently, as shown in FIG. 3B, the column spacer 162 and the contact hole 170 are simultaneously formed through the same mask process. The mask used to simultaneously form the column spacer 162 and the contact hole 170 can be any one that can cause the organic insulating film to have a double thickness, and it is preferable to use a slit mask or a halftone mask.

마스크 공정을 위해 사용되는 마스크(4)는 완전노광부(41), 부분노광부(42) 및 노광차단부(43)를 포함하여 구성된다. 완전노광부(41)를 통해 전부 노광된 유기막의 일부영역은 식각되지 않아 컬럼스페이서(162)가 되고, 부분노광부(42)를 통해 부분노광된 유기막의 다른 영역은 일부만 제거되어 상대적으로 낮은 두께의 유기절연막(161)이 되고, 노광차단부(43)를 통해서 노광이 차단된 부분은 전부 식각되어 컨택홀(170)을 형성한다. The mask 4 used for the mask process includes a complete exposure portion 41, a partial exposure portion 42, and an exposure blocking portion 43. Some areas of the organic film that are entirely exposed through the fully exposed portion 41 are not etched to become column spacers 162, and other portions of the organic film partially exposed through the partially exposed portion 42 are removed to have a relatively low thickness. The portion of the organic insulating layer 161 that is exposed to light through the exposure blocking unit 43 is etched to form the contact hole 170.

슬릿노광부(42)를 통해 패터닝 되는 두께의 조절은 마스크의 슬릿간격에 따라 노광되는 범위를 조절함으로써 가능하다. 다시말해, 슬릿 간격이 작으면 작을수록 노광량이 작아지며, 잔존하는 유기절연막의 두께가 작아진다. Adjustment of the thickness patterned through the slit exposure unit 42 is possible by adjusting the exposure range according to the slit interval of the mask. In other words, the smaller the slit interval, the smaller the exposure amount, and the smaller the thickness of the remaining organic insulating film.

상기와 같은 노광공정과 현상공정을 거쳐 컬럼스페이서(162)와 컨택홀(170)이 동시에 형성되게 된다.The column spacer 162 and the contact hole 170 are simultaneously formed through the exposure process and the development process as described above.

상기에서 살펴본, 본 발명의 바람직한 실시예에 따른 마스크 공정은 네가티브형 포토레지스트(Negative photoresist)로써 마스크를 통해 노광되지 않는 부분이 현상 과정에서 제거되어 패턴을 완성하게 되는 경우이나, 마스크를 통해 노광되는 부분이 현상 과정에서 제거되는 포지티브형 포토레지스트(Positive photoresist)에도 적용될 수 있다.  As described above, the mask process according to the preferred embodiment of the present invention is a negative photoresist, in which a portion not exposed through the mask is removed during the development process to complete the pattern, or exposed through the mask. It can also be applied to positive photoresist, in which portions are removed during development.

그리고, 유기절연막의 컨택홀을 통해 노출된 무기 절연막은 식각하여 드레인 전극이 노출되게 한다.The inorganic insulating layer exposed through the contact hole of the organic insulating layer is etched to expose the drain electrode.

그 다음, 유기막 상부에 투명도전물질을 증착한후 포토리소그라피 공정 및 식각공정에 의해 투명도전층을 패터닝함으로써 화소전극을 형성하여 박막트랜지스터 기판이 완성된다.Thereafter, the transparent conductive material is deposited on the organic layer, and then the transparent conductive layer is patterned by a photolithography process and an etching process to form a pixel electrode to complete the thin film transistor substrate.

상기에서 살펴본 바와 같이, 종래에는 별개의 마스크 공정으로 형성되는 컬럼스페이서와 컨택홀을 하나의 마스크 공정에 의해 형성함으로써 마스크 공정을 단축시켜 공정의 효율성을 높일 수 있을 뿐만 아니라, 비용절감 효과도 달성할 수 있게 된다.As described above, in the related art, column spacers and contact holes formed by separate mask processes may be formed by using a single mask process to shorten the mask process to increase the efficiency of the process and to achieve cost reduction effects. It becomes possible.

또한, 유기절연막과 컬럼스페이서가 일체로 형성되므로 컬럼스페이서가 안정된 구조로 형성될 수 있으므로 스미어 현상을 제거하여 표시품질을 향상시킬 수 있다.In addition, since the organic insulating layer and the column spacer are integrally formed, the column spacer may be formed in a stable structure, thereby improving display quality by removing the smear phenomenon.

한편, 칼라필터 기판(2) 하부에 검은색의 금속 또는 유기물질로 블랙매트릭스(220)를 형성하고, 블랙매트릭스(220)위에 RGB 칼라필터(230)를 각각 형성하고, 투명도전물질을 증착한 후 포토리소그라피 공정과 식각공정으로 투명도전층을 패터닝함으로써 공통전극을 형성하게 된다.Meanwhile, a black matrix 220 is formed of a black metal or an organic material under the color filter substrate 2, an RGB color filter 230 is formed on the black matrix 220, and a transparent conductive material is deposited. Then, the common electrode is formed by patterning the transparent conductive layer by a photolithography process and an etching process.

상기 형성된 박막트랜지스터 기판(1)과 칼라필터 기판(3)을 액정을 사이에 두고 합착하여 액정 표시 패널을 완성하게 된다.The formed thin film transistor substrate 1 and the color filter substrate 3 are bonded together with the liquid crystal interposed therebetween to complete the liquid crystal display panel.

상기와 같은 제조과정을 통해 본 발명에 따른 액정 표시 패널 제조방법은 마스크 공정을 1회 단축할 수 있으며, 이로 인해 제작 비용이 절감되고 공정의 효율성을 높일 수 있다.Through the manufacturing process as described above, the liquid crystal display panel manufacturing method according to the present invention may shorten the mask process once, thereby reducing the manufacturing cost and increasing the efficiency of the process.

상기에서 살펴본 바와 같이, 본 발명에 따른 액정 표시 패널 및 그 제조방법은 컬럼스페이서를 박막트랜지스터 기판상에 유기절연막 일체로 형성할 수 있으며, 컨택홀과 동시에 형성할 수 있으므로 이로 인해 마스크 공정을 단축시켜 원가절감 및 공정의 효율성을 높일 수 있다.As described above, the liquid crystal display panel and the method of manufacturing the same according to the present invention may form the column spacer integrally on the thin film transistor substrate and may be formed simultaneously with the contact hole, thereby shortening the mask process. Cost reduction and process efficiency can be improved.

또한, 유기절연막과 컬럼스페이서가 일체로 형성되기 때문에 컬럼스페이서가 안정적인 구조가 되어 스미어 현상 및 출렁임 현상을 제거할 수 있는 탁월한 효과가 발생한다.In addition, since the organic insulating film and the column spacer are integrally formed, the column spacer becomes a stable structure, and thus an excellent effect of removing the smear phenomenon and the slump phenomenon occurs.

이상에서 설명한 본 발명의 상세한 설명에서는 본 발명의 바람직한 실시예를 참조하여 설명하였지만, 본 발명의 보호범위는 상기 실시예에 한정되는 것이 아니 며, 해당 기술분야의 통상의 지식을 갖는 자라면 본 발명의 사상 및 기술영역으로부터 벗어나지 않는 범위 내에서 본 발명을 다양하게 수정 및 변경시킬 수 있음을 이해할 수 있을 것이다.Although the detailed description of the present invention described above has been described with reference to the preferred embodiment of the present invention, the protection scope of the present invention is not limited to the above embodiment, and those skilled in the art will appreciate It will be understood that various modifications and changes can be made in the present invention without departing from the spirit and scope of the invention.

따라서, 본 발명의 기술적 범위는 명세서의 상세한 설명에 기재된 내용으로 한정되는 것이 아니라 특허청구범위에 의해 정하여져야만 할 것이다. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (6)

칼라필터가 형성된 칼라필터 기판과;A color filter substrate on which a color filter is formed; 박막트랜지스터가 형성된 박막트랜지스터 기판과;A thin film transistor substrate on which the thin film transistor is formed; 상기 박막트랜지스터 기판에 상기 박막트랜지스터를 덮는 유기절연막 및;An organic insulating layer covering the thin film transistor on the thin film transistor substrate; 상기 유기절연막과 일체로 형성된 컬럼스페이서를 포함하여 구성되는 것을 특징으로 하는 액정 표시 패널And a column spacer formed integrally with the organic insulating layer. 기판 상에 박막트랜지스터를 형성하는 단계;Forming a thin film transistor on the substrate; 상기 기판 및 박막트랜지스터 상에 유기막을 도포하고 마스크 공정에 의해 패터닝하여 컬럼스페이서와 컨택홀을 동시에 형성하는 단계를 포함하여 구성되는 것을 특징으로 하는 액정 표시 패널 제조방법.And forming a column spacer and a contact hole at the same time by applying an organic film on the substrate and the thin film transistor and patterning the same by a mask process. 제 2항에 있어서, 상기 컬럼스페이서와 컨택홀을 형성하는 단계에서 컬럼스페이서의 단차를 고려해 유기막을 6~7um 두께로 도포하는 것을 특징으로 하는 액정 표시 패널 제조방법.The method of claim 2, wherein the organic layer is coated to have a thickness of about 6 μm to about 7 μm in consideration of the step difference between the column spacers. 제 2항에 있어서, 상기 컬럼스페이서는 유기절연막과 일체로 형성되는 것을 특징으로 하는 액정 표시 패널 제조방법.The method of claim 2, wherein the column spacer is integrally formed with the organic insulating layer. 제 2항에 있어서, 상기 컬럼스페이서와 컨택홀을 동시에 형성하는 단계는 컬럼스페이서와 컨택홀을 슬릿 마스크를 이용하여 동시에 패터닝하는 것을 특징으로 하는 액정 표시 패널 제조방법.The method of claim 2, wherein the forming of the column spacer and the contact hole simultaneously comprises simultaneously patterning the column spacer and the contact hole using a slit mask. 제 2항에 있어서, 상기 컬럼스페이서와 컨택홀을 동시에 형성하는 단계는 컬럼스페이서와 컨택홀을 하프톤 마스크를 이용하여 동시에 패터닝하는 것을 특징으로 하는 액정 표시 패널 제조방법.The method of claim 2, wherein the forming of the column spacer and the contact hole simultaneously comprises simultaneously patterning the column spacer and the contact hole using a halftone mask.
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