KR20070074734A - Liquid crystal display - Google Patents

Abstract

An LCD is provided to reduce the data capacity of a look-up table stored in a memory, thereby enabling color correction even with a low capacity memory and reducing the power consumption. An LCD comprises an LCD panel(130), a gate driving part(110) and a data driving part(120) for driving the LCD panel, and a timing controller(10) for supplying control signals to the gate driving part and the data driving part. The timing controller supplies image data signals, wherein the image data signals are corrected by computing a difference between the previous image data signals, which are stored in a reduced look-up table, and data signals currently inputted.

Description

Liquid Crystal Display {LIQUID CRYSTAL DISPLAY}

1 is a block diagram illustrating a liquid crystal display according to an exemplary embodiment of the present invention for each function.

FIG. 2 is a block diagram illustrating a block-by-block step in which an image data signal is corrected and output in a timing controller of a liquid crystal display according to an exemplary embodiment of the present invention.

3 is a block diagram illustrating the extended data signal generator of FIG. 2.

<Short description of drawing symbols>

10: timing controller 20: image data signal correction unit

30: extended data generation unit 40: control signal generation unit

50: memory 60: calculator

70: interpolation calculation unit 80: dithering unit

100: power supply unit 110: gate driver

120: data driver 130: liquid crystal panel

The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device having a reduced capacity of a lookup table stored in a memory.

A general liquid crystal display device includes two substrates including a pixel electrode and a common electrode, and a liquid crystal having dielectric anisotropy inherent therebetween. An electric field is formed between the pixel electrode and the common electrode, and by controlling the intensity of the electric field, the amount of light transmitted through the substrate is controlled to display a desired image.

Such liquid crystal displays are now being used not only as display devices in notebook computers but also as display devices in desktop computers. Current computer users have a desire to watch a video using a display device of a computer in an advanced multimedia environment. In order to meet these demands, it is necessary to improve the color characteristics in the liquid crystal display device.

As a method for improving the conventional color characteristics, ACC (Accurate Color Capture, hereinafter referred to as 'ACC') is used. The ACC expands and stores the input external image data bits in the memory, and when outputting the stored data, dithers the extended data and outputs them in the number of bits of the input image data signal.

Red (R), green (G), and blue (B) image data are input to the liquid crystal display device from an external graphic source, and each of the R, G, and B data is composed of N bits. The image data is used to determine the voltage to apply to the corresponding pixel on the liquid crystal panel. Here, the number N of bits of image data is related to the number of grays of the pixel applied voltage. That is, N bits of image data can express 2 ^N grays. Therefore, since the number of gray levels that can be displayed is determined by the number of bits of the input image data, in order to increase the number of gray levels that can be displayed, the number of bits of the input image data must be increased. However, when the input image data is increased, the capacity of the memory for storing the lookup table increases, thereby increasing power consumption and cost.

Accordingly, an object of the present invention is to provide a liquid crystal display device which reduces the capacity of a lookup table stored in a memory and performs color correction using a low capacity memory.

In order to achieve the above object, the present invention provides a liquid crystal panel, a gate driver and a data driver for driving the liquid crystal panel, a control signal supplied to the gate driver and the data driver, and stored in a reduced lookup table. And a timing controller for calculating a difference between the data signal and the currently input data signal to supply a corrected image data signal.

The timing controller calculates a difference between a control signal generator that generates a control signal supplied to the gate driver and the data driver, and a difference between a previous stage image data signal stored in the lookup table and a currently input data signal. The apparatus may further include an extension data generation unit configured to generate an extension data signal having a larger number.

The lookup table is characterized in that 16 bits of data are stored in 256 addresses.

The extended data generation unit may include a memory for storing the lookup table, an arithmetic unit configured to perform operations on data signals stored in the lookup table and input image data signals, data output from the lookup table, data output from the operation unit, And an interpolation calculator configured to calculate the input data using the interpolation method.

The extended data generation unit extends the image data signal input in 10 bits to 12 bits and outputs the extended image data signal.

The operation unit performs 12 bits by adding or subtracting the upper 8 bits of the data input in 10 bits and the base data plus 2 bits of 00, and the upper 10 bits of the 16 bits of data output from the lookup table. Outputting offset data.

When the most significant bit of the data of the upper 10 bits output from the lookup table indicates 0, an addition operation is performed, and when 1, a subtraction operation is performed.

The interpolation operation unit calculates data obtained by interpolation between the upper 6 bits of the 16-bit data output from the lookup table and the lower 2 bits of the image data input with 10 bits, and the 12-bit offset output from the calculation unit. And outputting the final extended data as the sum of the data.

The lower two bits of the image data input as the 10 bits indicate 0 for 00, 1/4 for 01, 2/4 for 10, and 3/4 for 11, respectively. It is characterized by multiplying data.

Other features of the present invention will be apparent from the description of the embodiments with reference to the accompanying drawings. Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings.

1 is a block diagram illustrating a liquid crystal display according to an exemplary embodiment of the present invention for each function.

Referring to FIG. 1, a liquid crystal display according to the present invention includes a liquid crystal panel 130, a gate driver 110 and a data driver 120 driving the liquid crystal panel 130, a gate driver 110 and a data driver. A timing controller 10 for supplying a control signal and an image signal to the 120 is provided. The timing controller 10 includes a control signal generator 40 for supplying control signals to the gate driver 110 and the data driver 120, and an image data signal beam for supplying a corrected image data signal to the data driver 120. Government 20 is included.

Specifically, the liquid crystal panel 130 is a structure in which liquid crystal is injected between two insulating substrates, and a thin film transistor is formed at an intersection of a gate line and a data line formed on a lower substrate, and the pixel is defined as the intersection of the gate line and the data line. A pixel electrode connected to the thin film transistor is formed in the region. In the upper substrate positioned to correspond to the lower substrate, color filters of R, G, and B formed for each pixel area and a common electrode are formed on the color filter. The liquid crystal layer is positioned between the pixel electrode of the lower substrate and the common electrode of the upper substrate to form a pixel matrix. As such, each pixel includes a thin film transistor that is turned on and off according to a gate voltage.

The power supply unit 100 supplies a voltage necessary for driving the gate driver 110, the data driver 120, and the timing controller 10 using an input voltage from the outside.

The gate driver 110 sequentially supplies a scan signal of the gate-on voltage Von to the gate line through a power signal applied from the power supply unit 100 and a control signal applied from the timing controller 10. In addition, the gate driver 110 supplies the gate-off voltage Voff to the gate line in the remaining period except for the period in which the gate-on voltage Von is supplied.

The data driver 120 converts the digital data signal from the timing controller 10 into an analog data signal and supplies the analog data signal to the data line. At this time, the data signal is swinged based on the common voltage Vcom.

The timing controller 10 includes an image data signal correction unit 20 for correcting and outputting R, G, and B image data signals, and a control signal generator 40 for generating a control signal.

In detail, the control signal generator 40 receives the vertical synchronization signal Vsync as the frame discrimination signal, the horizontal synchronization signal Hsync as the horizontal discrimination signal, and the main clock signal to receive the gate driver 110 and the data driver 120. Outputs a drive signal for driving (). The control signal output to the gate driver 110 includes a vertical start signal for instructing the application of the gate on voltage to be applied to the gate line, and a sequence for sequentially applying the gate on voltage to each gate line. And a gate enable OE for enabling the output of the gate clock signal CPV and the gate driver.

The control signal output to the data driver 120 is a horizontal start signal which is a command signal for inputting the digital image data signal input from the graphic controller to the data driver 120, and is converted into analog in the data driver 120. The signal LOAD for instructing the data signal to be applied to the liquid crystal panel 130 and the horizontal clock signal CL for data shifting of the data driver 120 may be used.

FIG. 2 is a block diagram illustrating each step of correcting and outputting an image data signal in a timing controller of a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 3 is a block diagram illustrating the extended data signal generator of FIG. 2. to be.

2 and 3, the image data signal correcting unit 20 converts the signal inputted from the extended data generating unit 30 and the extended data generating unit to generate the extended data back to the same number of bits of the input signal data. A dithering unit 80 to convert is provided.

Specifically, the extended data generator 30 outputs the input 10-bit image data signal as a color-corrected 12-bit extended data signal, and the corrected extended data signal is again converted by the dithering unit 80 into the 10-bit data signal. Reduced to.

The extended data generation unit 30 +/- operates the memory 50 in which the image information of the previous image data is stored as a look-up table (LUP), and the data output from the input data and the LUT memory 50. And an interpolation operation unit 70 for generating a 12-bit extended data output using an interpolation method of data output from the operation unit 60, data output from the memory 50, and input data. .

The memory 50 has a lookup table having 256 addresses and 16 bits of data mapped to each address. The data corresponding to the lookup table requires a memory capacity of 1024 x 12 bits to represent each of the 212 pixel grays, but the memory capacity of 256 x 16 bits is stored in the lookup table and the final 12 bits of the interpolation operation unit 70 are stored. Since the extended data DATA_exp is generated, 1: 1 matching of the pixel data is unnecessary, and the memory capacity of the lookup table is reduced to 1/3.

The calculation unit 60 adds the upper 8 bits of the input 10-bit image data bits and the least significant bits of the upper 8 bits of data to add 2 bits of '00' to input the 10 bits of data and the 16 bits of the lookup table. The lower 10 bits of data (diff) are + or-calculated to output 12 bits of offset data DATA_offset to the interpolation calculator 70. Here, the lower ten bits of data (diff) represent a difference between a 4-fold value of an actual address and a final data extension value of 12 bits of the corresponding address. The lower ten bits of data output from the lookup table are sinusoidal bits that cause the upper one bit to perform a + or − operation on the calculator, and the remaining 9 bits are bits representing differences from the input data. For example, if the sign bit is 0, the + operation is performed. If the sign bit is 1, the-operation is performed.

The interpolation calculator 70 performs a calculation as shown in Equation 1 and finally outputs 12-bit extended data. As shown in Equation 1, the data calculated between the upper six bits of the data N_diff and the lower two bits of the data LSB of the input data among the 16 bits of data output from the lookup table and the 12 bits input from the calculator 60 The final extension data DATA_exp is output as a sum of the offset data DATA_offset. Here, the upper six bits of data N_diff output from the lookup table indicate a difference value from the last extended data value at the next address. In the operation between the upper 6 bits of data (N_diff) and the lower 2 bits of data (LSB) of the input data output from the lookup table, 00 bits are multiplied by '0' based on the lower 2 bits of data (LSB). 01 bits multiply by 1/4, 10 bits multiply by 2/4, and 11 bits multiply by 3/4.

DATA_exp = DATA_offset + N_diff * LSB / 4

The final extension data DATA_exp output from the interpolation calculator 70 is reduced to 10 bits by the dithering unit 80 and supplied to the data driver 120. This 10-bit data is an image data signal whose image data signal is corrected.

As described above, when performing color correction through the reduced lookup table data and the interpolation operation unit performing data operation, the capacity of the lookup table data stored in the memory is reduced so that one 128Kbyte memory or two 64kbyte memory is not used. 64Kbyte memory will be available.

As described above, the liquid crystal display according to the present invention can reduce the capacity of the memory in which the lookup table is stored by reducing the capacity of the lookup table data stored in the memory. This can reduce memory size and reduce power consumption.

In addition, the cost is reduced because the memory capacity is reduced.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (9)

A liquid crystal panel; A gate driver and a data driver for driving the liquid crystal panel; And a timing controller supplying a control signal to the gate driver and the data driver, and supplying a corrected image data signal by calculating a difference between the previous stage image data signal stored in the reduced lookup table and the currently input data signal. A liquid crystal display device. The method of claim 1, The timing controller may include a control signal generator configured to generate a control signal supplied to the gate driver and the data driver; And an extended data generation unit configured to calculate a difference between a previous stage image data signal stored in the lookup table and a currently input data signal to generate an extended data signal having a larger number of bits than the input data. The method of claim 2, And the lookup table comprises 16 bits of data stored in 256 addresses. The method of claim 2, A memory for storing the lookup table; An arithmetic unit configured to perform a calculation of the data signal stored in the lookup table and the input image data signal; And an interpolation calculator configured to calculate data output from the lookup table, data output from the calculator, and input data using an interpolation method. The method of claim 4, wherein And the extended data generation unit extends the image data signal input with 10 bits into 12 bits and outputs the extended image data signal. The method of claim 4, wherein The operation unit performs 12 bits by adding or subtracting the upper 8 bits of the data input in 10 bits and the base data plus 2 bits of 00, and the upper 10 bits of the 16 bits of data output from the lookup table. And an offset data of the liquid crystal display device.  The method of claim 6, And performing a subtraction operation when the most significant bit of the upper 10 bits of data output from the lookup table displays 0 and a subtraction operation when 1 is displayed. The method of claim 4, wherein The interpolation operation unit calculates data obtained by interpolation between the upper 6 bits of the 16-bit data output from the lookup table and the lower 2 bits of the image data input with 10 bits, and the 12-bit offset output from the calculation unit. And a final extension data in sum with the data. The method of claim 8, The lower two bits of the image data input as the 10 bits indicate 0 for 00, 1/4 for 01, 2/4 for 10, and 3/4 for 11, respectively. And a multiplication operation with data.

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