KR20070074420A - Plasma display apparatus - Google Patents

Abstract

A plasma display device and an image processing method thereof are provided to remove an afterimage by supplying first and second reset pulses to a scan electrode and to secure sufficient driving time by preventing the length of a reset period from being excessively increased. A plasma display device includes a PDP(100) and a driving unit(101). Scan and sustain electrodes are formed to in parallel on the PDP. The driver supplies first and second reset pulses to the scan electrode during a reset period for initializing at least one of sub-fields in a frame. The first reset pulse gradually rises from a first voltage to a second voltage at a first slope and then falls from the second voltage to the first voltage at a second slope. The second reset pulse rapidly rises from the first voltage to a third voltage and then gradually rises from the third voltage to a fourth voltage at a third slope different from the first slope.

Description

Plasma Display Apparatus {Plasma Display Apparatus}

1 is a view for explaining a plasma display device of the present invention.

2A to 2B are diagrams for explaining an example of a plasma display panel included in the plasma display device of the present invention.

3 is a view for explaining an example of the operation of the plasma display device of the present invention;

4 is a diagram for explaining the first reset pulse and the second reset pulse in more detail.

5 is a diagram for explaining a falling slope of the first reset pulse.

6 is a view for explaining an example of implementing a driving unit of the plasma display device of the present invention.

7A to 7B are views for explaining an example of an expanded configuration of a drive unit of the plasma display device of the present invention.

8A to 8B are views for explaining the operation of the scan reference voltage supply control unit.

9 is a view for explaining an example of an operation of a driving unit of the plasma display device of the present invention.

10 is a diagram for explaining an example of a method of using a first reset pulse and a second reset pulse only in a predetermined subfield among a plurality of subfields of a frame.

FIG. 11 illustrates a falling waveform in which the voltage gradually falls before the first reset pulse is supplied in at least one or more subfields in which the first reset pulse and the second reset pulse are supplied to the scan electrode Y. FIG. A diagram for explaining an example of the method to be supplied to.

<Explanation of symbols for the main parts of the drawings>

100: plasma display panel 101: driving unit

The present invention relates to a plasma display device, and more particularly, to a plasma display device (Plasma Display Apparatus) improved the reset pulse supplied to the scan electrode (Y) in the reset period.

In general, the plasma display apparatus includes a plasma display panel in which a plurality of electrodes are formed and a driving unit for driving the electrodes of the plasma display panel.

Here, in the plasma display panel, a partition wall formed between the front panel and the rear panel forms a discharge cell. In the discharge cell, neon (Ne), helium (He), or a mixture of neon and helium (Ne + He) and a small amount of The discharge gas containing xenon (Xe) is filled. These discharge cells constitute a plurality of pixels (Pixel) for displaying an image. For example, red (R), green (G), and blue (B) discharge cells gather to form one pixel.

When the plasma display panel is discharged by a high frequency voltage, the discharge gas generates vacuum ultraviolet rays and emits phosphors formed between the partition walls to realize an image. Such a plasma display panel has a spotlight as a next generation display device because of its thin and light configuration.

The plasma display panel is supplied with a driving voltage for generating a discharge, and discharges such as reset discharge, address discharge, and sustain discharge are generated by the driving voltage, thereby displaying an image.

In a conventional plasma display apparatus, when an image of the same pattern is displayed for a predetermined time or more, distribution of wall charges in a discharge cell may be fixed.

For example, when an image of a specific window pattern is displayed on the screen for a predetermined time or more, the distribution of wall charges in the discharge cell is maintained and fixed to correspond to the specific window pattern.

In this case, when an image other than the image of the window pattern is displayed on the screen, the image of the previous window pattern is not erased on the screen but still remains, resulting in an afterimage.

An object of the present invention is to provide a plasma display device capable of preventing the generation of afterimages even when an image of a specific pattern is displayed on the same screen for a predetermined time or more.

The plasma display apparatus of the present invention for achieving the above object is a plasma display panel in which the scan electrode and the sustain electrode are parallel to each other, and the first voltage in the reset period for the initialization of at least one of the plurality of subfields of the frame; A first reset pulse that descends to a second slope from the second voltage to the first voltage after gradually rising from the first slope to a second voltage, and a third voltage after rapidly rising from the first voltage to the third voltage And a driver for supplying the scan electrode with a second reset pulse which gradually rises with a third slope different from the first slope from the first voltage to the fourth voltage.

The first sustain bias lower than the second sustain bias voltage supplied to the sustain electrode in the address period after the reset period while the driving unit supplies the first reset pulse and the second reset pulse to the scan electrode. It is characterized by supplying a voltage.

In addition, the first sustain bias voltage is characterized in that substantially equal to the voltage of the ground level (GND).

In addition, the first slope is characterized in that the third slope is larger than.

In addition, the second voltage is characterized in that greater than or approximately equal to the third voltage.

In addition, the fourth voltage is characterized by being more than 1 times and 3 times less than the second voltage.

The second slope may be approximately equal to the slope of the voltage recovery period of the sustain pulse supplied to the scan electrode and / or the sustain electrode in the sustain period after the reset period.

The subfields to which the first reset pulse and the second reset pulse are supplied among the plurality of subfields of the frame may range from the subfield having the lowest gray scale weight to the predetermined subfield in the order of increasing the gray scale weight.

The driving unit may further include a falling waveform in which a voltage gradually decreases to the scan electrode before the first reset pulse is supplied to at least one of the subfields to supply the first reset pulse and the second reset pulse. It characterized in that the supply.

The driving unit may supply the sustain electrode with a third sustain bias voltage higher than the second sustain bias voltage supplied to the sustain electrode in the address period after the reset period while supplying the falling waveform to the scan electrode. do.

The third sustain bias voltage may be approximately equal to the voltage Vs of the sustain pulse supplied to the scan electrode and / or the sustain electrode in the sustain period after the address period.

In addition, the length of the supply period of the first reset pulse is characterized in that more than 100 microseconds (250 seconds) or less.

The driving unit may include a rising waveform supply control unit configured to perform a preset switching operation between the sustain voltage source supplying the sustain voltage Vs and the scan electrode, and generate a first slope to a voltage passing through the rising waveform supply control unit. And a third slope generator for generating a third slope different from the first slope to a voltage passing through the rising waveform supply controller.

Hereinafter, a plasma display device of the present invention will be described in detail with reference to the accompanying drawings.

1 is a view for explaining a plasma display device of the present invention.

Referring to FIG. 1, the plasma display apparatus of the present invention includes a plasma display panel 100 and a driver 101.

Although one driving unit 101 is illustrated in FIG. 1, a plurality of driving units 101 may be divided according to electrodes formed on the plasma display panel 100. For example, when the address electrode X, the scan electrode Y, and the sustain electrode Z are formed in the plasma display panel 100, the driver 101 is not shown but the data driver, the scan driver, and the sustain driver are not shown. It can be divided into

Here, an example of the plasma display panel will be described with reference to FIGS. 2A to 2B.

2A to 2B are views for explaining an example of the plasma display panel included in the plasma display device of the present invention.

First, referring to FIG. 2A, a plasma display panel includes a front panel 200 having a scan electrode 202 and Y and a sustain electrode 203 and Z formed on a front substrate 201, which is a display surface on which an image is displayed, and a rear substrate which forms a back surface. The rear panel 210 on which the address electrodes 213 and X are formed so as to intersect the scan electrode 202 and the sustain electrode 203 described above is coupled side by side with a predetermined distance therebetween.

The front panel 200 includes a scan electrode 202 and a sustain electrode 203 for mutually discharging in a discharge space, that is, a discharge cell, and maintaining light emission of the discharge cell.

The scan electrode 202 and the sustain electrode 203 are covered by one or more upper dielectric layers 204 that limit the discharge current and insulate the electrode pairs, and facilitate discharge conditions on top of the upper dielectric layer 204. A protective layer 205 is formed for this purpose.

The protective layer 205 is formed by, for example, depositing a material such as magnesium oxide (MgO) over the upper dielectric layer 204.

The rear panel 210 includes a plurality of discharge spaces, that is, barrier ribs 212 of stripe type (or well type) for partitioning the discharge cells. In addition, a plurality of address electrodes 213 are provided for supplying data pulses.

Here, in the discharge cells partitioned by the partition walls, the phosphor layer 214 that emits visible light for image display upon address discharge, preferably red (R), green (G), and blue (Blue :) B) a phosphor layer is formed.

A lower dielectric layer 215 is formed between the address electrode 213 and the phosphor layer 214 to insulate the address electrode 213.

Here, the scan electrode 202 and the sustain electrode 203 are preferably made of a conductive metal material. For example, it may be made of silver (Ag) material or indium tin oxide (ITO) material.

In particular, in consideration of light transmittance and electrical conductivity, the scan electrode 202 and the sustain electrode 203 may be formed to include a bus electrode made of silver and a transparent electrode made of ITO. Looking at this in more detail as shown in Figure 2b.

In FIG. 2B, the scan electrode 202 and the sustain electrode 203 are formed between the front substrate 201 and the upper dielectric layer 204 as in region A of FIG. 2A.

Referring to FIG. 2B, the scan electrode 202 and the sustain electrode 203 of the plasma display panel of the present invention are formed to generate surface discharge, and emit light generated in the discharge cell to the outside and secure driving efficiency. For this purpose, the transparent electrodes 202a and 203a formed of a transparent ITO material and the bus electrodes 202b and 203b made of an opaque metal material are preferably included.

As such, the reason why the scan electrode 202 and the sustain electrode 203 include the transparent electrodes 202a and 203a is that the visible light generated in the discharge cell is effectively emitted when emitted to the outside of the plasma display panel. For that.

In addition, the reason why the scan electrode 202 and the sustain electrode 203 include the bus electrodes 202b and 203b is that the scan electrode 202 and the sustain electrode 203 include only the transparent electrodes 202a and 203a. In this case, the driving efficiency can be reduced because the electrical conductivity of the transparent electrodes 202a and 203a is relatively low, so as to compensate for the low electrical conductivity of the transparent electrodes 202a and 203a which can cause such a reduction in the driving efficiency. to be.

2A to 2B, only one example of the plasma display panel of the present invention is shown and described, and the present invention is not limited to the plasma display panel having the structure of FIGS. 2A to 2B. For example, although only the case where the upper dielectric layer 204 and the lower dielectric layer 215 are one layer is illustrated, at least one or more of the upper dielectric layer 204 and the lower dielectric layer 215 may be a plurality of layers. It is also possible to form a layer of.

That is, the plasma display panel which can be applied to the plasma display device of the present invention is formed with the scan electrode 202 and the sustain electrode 203, and other conditions may be used.

Next, the description of FIG. 2A to FIG. 2B will be finished, and FIG. 1 will be described again.

In FIG. 1, the driver 101 gradually increases from the first voltage V1 to the second voltage V2 in the reset period for initializing at least one of the plurality of subfields of the frame. The first reset pulse descending from the second voltage V2 to the first voltage V1 with the second slope, and the third voltage V3 after rapidly rising from the first voltage V1 to the third voltage V3. To the fourth voltage V4, the second reset pulse gradually rising to a third slope different from the above-described first slope is supplied to the scan electrode Y.

In addition, the driving unit 101 may supply a data pulse of the data voltage Vd to the address electrode X of the plasma display panel 100.

In addition, it is preferable to supply a negative scan pulse to the scan electrode Y and to supply a sustain pulse of the sustain voltage Vs.

In addition, the driving unit 101 preferably supplies a sustain bias voltage Vz and a sustain pulse to the sustain electrode Z.

An example of the operation of the plasma display apparatus of the present invention will be described with reference to FIG. 3.

3 is a view for explaining an example of the operation of the plasma display device of the present invention in detail.

Referring to FIG. 3, a driving waveform used in a subfield of the plasma display device of the present invention is shown.

In the reset period, the scan electrode Y is supplied with a first reset pulse gradually rising with a first slope and a second reset pulse gradually rising with a third slope. That is, the first reset pulse and the second reset pulse having different rising slopes are supplied.

A weak dark discharge occurs in the discharge cell by the first reset pulse and the second reset pulse. This dark discharge causes a certain amount of wall charges to accumulate in the discharge cell, and then a part of the wall charges is erased, so that the wall charges such that address discharge can stably occur in the discharge cell remain uniformly. do. That is, initialization is made to evenly distribute the wall charge in the discharge cells.

In addition, when the first reset pulse and the second reset pulse are supplied to the scan electrode Y in the reset period, the afterimage is prevented.

In more detail, in the plasma display apparatus, when the image of the same pattern is displayed for a predetermined time or more, distribution of wall charges in the discharge cells may be fixed.

For example, when an image of a specific window pattern is displayed on the screen for a predetermined time or more, the distribution of wall charges in the discharge cell is maintained and fixed to correspond to this specific window pattern.

In this case, when the first reset pulse and the second reset pulse are sequentially supplied, the first reset pulse supplied first shakes the distribution of the wall charges held and fixed in the discharge cell. The second reset pulse then supplied evenly distributes the distribution of wall charges held and fixed by the first reset pulse between the discharge cells.

Accordingly, even if another image is displayed on the screen after continuously displaying the image of a specific pattern for a predetermined time or more, the afterimage generated by the image of the previous specific pattern is not erased on the screen but remains. .

In this reset period, while the first reset pulse and the second reset pulse are supplied to the scan electrode Y, the second sustain bias is supplied to the sustain electrode Z in the address period after the reset period. The first sustain bias voltage Vz1 lower than the voltage Vz2 is supplied.

As such, the first sustain bias voltage Vz1 having the relatively low voltage level is supplied to the sustain electrode Z while the first reset pulse and the second reset pulse are supplied to the scan electrode Y. Is to provide a voltage difference between the scan electrode Y and the sustain electrode Z so that reset discharge effectively occurs between the scan electrode Y and the sustain electrode Z. FIG.

Here, it is assumed that such a first sustain bias voltage Vz1 is approximately equal to the voltage of the ground level GND.

The first reset pulse and the second reset pulse will be described in more detail later with reference to FIGS. 4 to 5.

In the address period after the reset period, the scan reference voltage Vsc and the voltage (-Vy) of the negative scan pulse Scan falling from the scan reference voltage Vsc may be supplied to the scan electrode Y. .

In addition, when the voltage (−Vy) of the negative scan pulse is supplied to the scan electrode Y, the voltage Vd of the data pulse may be supplied to the address electrode X correspondingly.

In addition, in order to prevent the occurrence of erroneous discharge due to interference of the sustain electrode Z in the address period, it is preferable that the sustain electrode Z is supplied with a second sustain bias voltage Vz2 higher than the first sustain bias voltage Vz1. Do.

In the address period, the voltage difference between the voltage of the negative scan pulse (-Vy) and the voltage of the data pulse (Vd) and the wall voltage due to the wall charges generated in the reset period are added to the voltage Vd of the data pulse. An address discharge is generated in the discharge cells supplied.

In such a discharge cell selected by the address discharge, wall charges are formed such that a discharge can occur when the sustain voltage Vs of the sustain pulse is supplied.

In this sustain period after the address period, the sustain pulse SUS may be supplied to the scan electrode Y and / or the sustain electrode Z. FIG.

Accordingly, the discharge cells selected by the address discharge have the scan voltage (Y) and the sustain electrode each time the sustain pulse (SUS) is applied while the wall voltage in the discharge cell and the sustain voltage (Vs) of the sustain pulse (SUS) are added. Sustain discharge, that is, display discharge, occurs between (Z). Accordingly, a predetermined image is implemented on the plasma display panel.

Here, the first reset pulse and the second reset pulse supplied to the scan electrode Y in the above-described reset period will be described in more detail as follows.

4 is a view for explaining the first reset pulse and the second reset pulse in more detail.

Referring to FIG. 4, after the voltage gradually rises with the first slope from the first voltage V1 to the second voltage V2, the first reset pulse returns from the second voltage V2 to the first voltage V1. Gradually descend to the second slope.

In addition, the second reset pulse is gradually increased from the third voltage V3 to the fourth voltage V4 by the third slope after the voltage rapidly increases from the first voltage V1 to the third voltage V3. To rise.

The second reset pulse is gradually lowered to the fourth voltage V4 and then lowered again to the first voltage V1, and then the voltage is gradually lowered to a predetermined slope.

Here, the first slope of the first reset pulse and the third slope of the second reset pulse are different from each other, and more preferably, the first slope has a larger value than the third slope.

As such, the reason for making the first slope larger than the third slope is to prevent the excessive intensity of the reset discharge from being excessively counted, to improve the afterimage improvement efficiency, and to prevent the length of the reset period from being excessively increased.

For example, when the first slope of the first reset pulse is smaller than the third slope of the second reset pulse, the discharge by the first reset pulse is excessively weakened so that the wall charge in the state held and fixed in the discharge cell is reduced. It is not possible to shake the distribution, and it is impossible to sufficiently prevent the occurrence of afterimages. Here, if the first slope of the first reset pulse is smaller than the third slope of the second reset pulse, when the magnitude of the voltage of the first reset pulse is increased to sufficiently prevent the occurrence of an afterimage, the first reset is performed. The length of the supply period of the pulse is excessively increased and the driving time is insufficient.

In addition, from the standpoint of the second reset pulse, when the first slope of the first reset pulse is smaller than the third slope of the second reset pulse, the intensity of the discharge caused by the second reset pulse is excessively increased, resulting in contrast. ) Characteristics are deteriorated.

Accordingly, the first slope is made larger than the third slope.

Here, it is preferable that the length of the supply period of the first reset pulse is 100 ms (microsecond) or more and 250 ms (microsecond) or less.

Thus, the reason why the length of the supply period of the first reset pulse is set to 100 ms (microsecond) or more and 250 ms (microsecond) or less is as follows.

For example, when the length of the supply period of the first reset pulse is less than 100 microseconds (microseconds), the width of the discharge is excessively narrowed, whereby the intensity of the discharge by the first reset pulse is excessively weakened to discharge the discharge. It is not possible to shake the distribution of the wall charge in the state held and fixed in the cell, and thus it is not possible to sufficiently prevent the occurrence of afterimages.

When the length of the supply period of the first reset pulse exceeds 250 microseconds (microseconds), the length of the supply period of the first reset pulse is excessively increased and the driving time is insufficient.

In addition, it is preferable that the second voltage V2 is greater than or substantially equal to the third voltage V3. The reason why the second voltage V2 is greater than or approximately equal to the third voltage V3 is to increase the efficiency of the primary initialization by the first reset pulse and to generate the arm generated by the second reset pulse. This is to prevent the magnitude of the discharge from becoming excessively large.

For example, when the magnitude of the second voltage V2 of the first reset pulse is smaller than the third voltage V3 of the second reset pulse, the magnitude of the dark discharge generated by the first reset pulse becomes excessively small and is discharged. It is impossible to accumulate enough wall charges in the cell. Alternatively, even before the voltage of the second reset pulse gradually rises, a strong discharge is generated by the second reset pulse, and the contrast characteristic is lowered. Therefore, the second voltage V2 is greater than or approximately equal to the third voltage V3.

Further, it is preferable that the fourth voltage V4 of the second reset pulse is more than one and three times less than the second voltage V2. In this way, the reason why the fourth voltage V4 is set to more than 1 times and 3 times less than the second voltage V2 is to uniformly accumulate a sufficient amount of wall charges in the discharge cells.

For example, when the fourth voltage V4 is less than one time of the second voltage V2, the intensity of the reset discharge is excessively weakened so that a sufficient amount of wall charges do not accumulate in each discharge cell or between discharge cells. If the difference in the amount of wall charges is intensified, on the other hand, if the fourth voltage V4 exceeds three times the second voltage V2, the intensity of the reset discharge is excessively increased and thus the contrast characteristic is increased. Because it gets worse.

On the other hand, after the first reset pulse gradually rises to the second voltage V2, it is preferable that the first reset pulse falls to the second slope when the second voltage V2 falls from the second voltage V2 to the first voltage V1 again. This will be described with reference to FIG. 5.

5 is a diagram for describing a falling slope of the first reset pulse.

Referring to FIG. 5, (a) shows a first reset pulse and a second reset pulse, and (b) shows scan electrodes Y and / or sustain electrodes Z in a sustain period for displaying an image. The sustain pulse that is supplied is shown.

Referring to (a), when the first reset pulse gradually rises to the second voltage V2 and then again falls from the second voltage V2 to the first voltage V1, the first reset pulse has a predetermined slope for the period d1. Descend. That is, it descends by a 2nd inclination.

This second slope is approximately equal to the slope of the voltage recovery period d2 of the sustain pulse supplied to the scan electrode Y and / or the sustain electrode Z in the sustain period after the reset period as in (b). .

As described above, the reason why the second slope of the first reset pulse is the same as the slope in the voltage recovery period d2 of the sustain pulse is the same as the slope of the energy recovery period d2 of the second slope and the sustain pulse. This is because it is generated by. This will become clearer from the description after FIG. 7A.

An example of implementing the driving unit of the plasma display apparatus of the present invention for supplying the first reset pulse and the second reset pulse described above will be described below.

6 is a view for explaining an example of implementing a driving unit of the plasma display device of the present invention.

Referring to FIG. 6, in the plasma display apparatus of the present invention, the driving unit includes a rising waveform generator 500, wherein the rising waveform generator 500 includes a rising waveform supply controller 501 and a first slope generator ( 502 and a third tilt generator 503.

Here, the rising waveform supply control unit 501 includes a rising waveform supply control switch unit S5, and the sustain voltage source and the scan electrode for supplying the sustain voltage Vs by using the rising waveform supply control switch unit S5. A preset switching operation is performed between Y).

The first slope generator 502 includes a first variable resistor VR1, and when a predetermined control signal is supplied to the terminal 1, the rising slope supply controller 502 uses the first waveform resistor VR1. Generate a first slope in voltage across 501.

The third inclination generator 503 includes the first 'variable resistance unit VR1' and is raised using the first 'variable resistance unit VR1' when a predetermined control signal is supplied to the terminal ②. A third slope different from the first slope is generated in the voltage passing through the waveform supply control unit 501.

The first inclination generator 502 and the third inclination generator 503 are connected to the gate terminal of the switch unit S5 for rising waveform supply control of the rising waveform supply control unit 501, respectively.

On the other hand, it is more preferable to form a driving unit by adding other driving circuits to the configuration as shown in FIG. 6, which will be described below with reference to FIGS. 7A to 7B.

7A to 7B are views for explaining an example of an expanded configuration of a driving unit of the plasma display device of the present invention.

First, referring to FIG. 7A, in addition to the rising waveform generator 630, the driving unit of the plasma display apparatus of the present invention includes a scan drive integrated circuit 670, a scan reference voltage supply controller 640, scan and The falling lamp common supply controller 650, the energy recovery circuit unit 600, the sustain voltage supply controller 610, and the base voltage supply controller 620 may be further included.

Here, the rising waveform generator of 630 is the same as the rising waveform generator of 500 of FIG. 5.

The scan drive integrated circuit unit 670 includes a scan top switch unit S9 and a scan bottom switch unit S10, and the scan top switch unit S9 and the scan bottom switch unit S10 are provided. The voltage supplied thereto is supplied to the scan electrode Y of the plasma display panel through a predetermined switching operation.

Here, the scan drive integrated circuit unit 670 is connected to the scan electrode Y between the scan top switch unit S9 and the scan bottom switch unit S10.

The scan reference voltage supply controller 640 controls the supply of the scan reference voltage Vsc to the scan drive integrated circuit unit 670.

The scan reference voltage supply controller 640 includes a resistor 641 and a reverse current preventer 642.

Here, the resistor unit 641 is provided to reduce noise generated in the scan reference voltage Vsc supplied to the scan drive integrated circuit unit 670.

The reverse current prevention unit 642 is disposed to prevent a reverse current flowing from the scan drive integrated circuit unit 670 to the scan reference voltage source that supplies the scan reference voltage Vsc.

The resistance unit 641 and the reverse current prevention unit 642 are preferably disposed in series between the scan drive integrated circuit unit 670 and the scan reference voltage source.

Here, more preferably, the reverse current preventing unit 642 includes a reverse current preventing diode unit D3, and the anode of the reverse current preventing diode unit D3 is in the direction of the scan reference voltage source, and the cathode ( Cathode) is disposed in the direction of the scan drive integrated circuit unit 670.

In addition, the scan reference voltage supply controller 640 may further include an anti-shake unit 644 and a current path unit 643 in addition to the reverse current prevention unit 642 and the resistor unit 641.

Here, the anti-shake unit 644 includes an anti-shake capacitor unit C2 and reduces the shake of the scan reference voltage Vsc supplied to the scan electrode Y by using the anti-shake capacitor unit C2. .

One end of the anti-shake capacitor portion C2 is commonly connected to the current pass diode portion D4 and the resistor portion 641 of the current pass portion 643, and the other end thereof is the scan bottom of the scan drive integrated circuit portion 670. The switch unit S10 is commonly connected to the scan and down ramp common supply control unit 650.

The current path unit 643 includes a current path diode unit D4 disposed in parallel with the resistor unit 641, and is prevented from shaking from the scan drive integrated circuit unit 670 using the current path diode unit D4. Passes the current flowing to the unit 644.

The cathode of the current path diode portion D4 is preferably in the direction of the anti-shake capacitor portion C2, and the anode is in the direction of the scan top switch S9 of the scan drive integrated circuit portion 670.

Here, the operation of the scan reference voltage supply controller 640 will be described in detail with reference to FIGS. 8A to 8B.

8A to 8B are diagrams for describing an operation of the scan reference voltage supply controller.

First, referring to FIG. 8A, when the scan reference voltage is supplied to the scan electrode Y of the plasma display panel, the scan reference voltage is converted from the scan reference voltage source to the reverse current prevention diode unit D3, the resistor unit 641, and the scan top switch. It is supplied to the scan electrode Y via the part S9.

In this case, since the cathode of the current pass diode portion D4 is disposed in the direction of the scan reference voltage source, the scan reference voltage Vsc cannot pass through the current pass diode D4.

Accordingly, the scan reference voltage Vsc with reduced noise is supplied to the scan electrode Y.

Next, referring to FIG. 8B, from the time when the supply of the scan reference voltage Vsc to the scan electrode Y is cut off, that is, the time when the scan top switch unit S9 is turned off to the time when the scan bottom switch unit S10 is turned on In the period of time, the voltage of the scan electrode Y is supplied to the anti-shake capacitor portion C2 via the scan top switch portion S9 and the current path diode portion D4 to charge the anti-shake capacitor portion C2. .

In this case, since the cathode of the reverse current preventing diode part D3 is disposed in the direction of the scan top switch part S9, the voltage coming out of the scan electrode Y does not flow in the scan reference voltage source direction.

As a result, the voltage escaping from the scan electrode Y is stably charged in the anti-shake capacitor portion C2 during the period from when the scan top switch portion S9 is turned off to when the scan bottom switch portion S10 is turned on. As a result, the operation of the scan driver of the plasma display device of the present invention can be stabilized and energy efficiency can be improved.

This description of FIGS. 8A to 8B will be finished, and the following will be described with reference to FIGS. 7A to 7B.

In FIG. 7A, the energy recovery circuit unit 600 supplies a pre-stored voltage to the scan electrode Y through an energy supply path, and recovers reactive energy of the scan electrode Y through an energy recovery path.

The energy recovery circuit unit 600 will be described in more detail as follows.

The energy recovery circuit unit 600 includes a voltage storage capacitor unit C1, an energy supply control switch unit S1, an energy recovery control switching unit S2, and first and second inductor units L1 and L2. The reverse current blocking first and second diode units D1 and D2 may further be included.

Here, the voltage to be supplied to the scan electrode (Y) is stored in the voltage storage capacitor portion (C1) in advance, and the stored voltage is the energy supply control switch portion (S1) when the energy supply control switch portion (S1) is turned on. ) Is supplied to the scan electrode (Y) via the first diode unit (D1) and the first inductor unit (L1). As such, the path via the energy supply control switch unit S1, the first diode unit D1, and the first inductor unit L1 is called an energy supply path.

In addition, when the energy recovery control switch unit S2 is turned on, the reactive energy of the scan electrode Y causes the second inductor unit L2, the second diode unit D2, and the energy recovery control switch unit S2 to be turned on. It recovers to the voltage storage capacitor part C1 via. In this way, a path through the second inductor part L2, the second diode part D2, and the energy recovery control switch part S2 is called an energy recovery path.

As such, the reason for disposing different inductor units in the energy supply path and the energy recovery path is to reduce the amount of heat generated in the energy recovery circuit unit 600.

In more detail, when the energy is supplied, the voltage stored in the voltage storage capacitor portion C1 is supplied to the scan electrode Y via the first inductor portion L1, and thus, the first inductor portion L1 is applied to the first inductor portion L1. It is biased and generates heat.

On the other hand, when the energy is recovered, the reactive voltage of the scan electrode Y is recovered to the voltage storage capacitor portion C1 via the second inductor portion L2, so that it is biased by the second inductor portion L2 and heats up. This happens.

As such, when heat is distributed between the energy supply and the energy recovery, the total heat generated is reduced as compared with the case of performing the energy recovery and energy supply process with one inductor part, thereby suppressing thermal damage of the energy recovery circuit part. Therefore, driving stability can be improved.

The scan and down ramp common supply control unit 650 controls the supply of the negative scan voltage (-Vy) and the down ramp (Ramp-Down) voltage to the scan drive integrated circuit unit 670.

The scan and down ramp common supply control unit 650 is a second switch connected to the gate terminal of the scan and down ramp common supply control switch unit S8 and the scan and down ramp common supply control switch unit S8. The variable resistance unit VR2 is included.

Preferably, the source terminal of the switch unit S8 for scan and down ramp common supply control is connected to the scan bottom switch S10 of the scan drive integrated circuit unit 670, and the drain terminal is a negative scan. And a negative scan voltage source for generating a voltage.

More preferably, the scan and down ramp common supply control unit 650 further includes a voltage stabilizing capacitor unit C3 in addition to the scan and down ramp common supply control switch unit S8.

One end of the voltage stabilizing capacitor portion C3 is commonly connected to a negative scan voltage source (-Vy) that supplies a scan and down ramp common supply control switch portion S8 and a negative scan voltage (-Vy). One end is commonly connected to the base voltage supply control unit 620, the sustain voltage supply control unit 610, the rising waveform generator 630, the blocking unit 660, and the energy recovery circuit unit 600.

The voltage stabilizing capacitor unit C3 stores the negative scan voltage (-Vy) supplied from the negative scan voltage source (-Vy), whereby the scan and falling lamp common supply control unit 650 stably lowers the falling ramp or the negative polarity. It is possible to supply the scan voltage (-Vy) to the scan electrode (Y).

The scan and down ramp common supply control unit 650 requires both a switching control signal for supplying a negative scan voltage (-Vy) and a switching control signal for supplying a voltage of a falling ramp pulse (Ramp-Down). Do.

As described above, the scan and falling ramp common supply control unit 650 of the switching control signal for supplying the negative scan voltage (-Vy) and the switching control signal for supplying the voltage of the falling ramp pulse (Ramp-Down) are considered. The configuration is shown in Figure 7b.

Referring to FIG. 7B, the scan and down ramp common supply control unit 650 may control the down ramp supply control signal input terminal ③ and the negative scan voltage (−Vy) to the gate terminal of the switch unit S8 for scan and down ramp common supply control. ) The supply control signal input terminal (4) is connected.

Here, the second variable resistor unit VR2 is disposed at the falling ramp supply control signal input terminal ③, and the variable resistor unit is not disposed at the control signal input terminal ④ for supplying the negative scan voltage (-Vy).

When the down ramp is supplied, the down ramp supply control signal is input to the down ramp supply control signal input terminal ③, and accordingly, the down ramp in which the voltage is gradually lowered by the second variable resistor VR2 is the scan electrode Y. ) Is supplied. More specifically, when the down ramp supply control switch S8 is turned on and the down ramp supply control signal is input to the down ramp supply control signal input terminal ③, the down ramp supply control switch S8 is used. As the channel width is adjusted by the second variable resistor unit VR2, a falling ramp in which the voltage gradually falls is generated, and the falling ramp is supplied to the scan electrode Y.

When the negative scan voltage (-Vy) is supplied, a negative scan voltage (-Vy) supply control signal is input to the control signal input terminal (4) for supplying the negative scan voltage (-Vy), and accordingly, the negative scan voltage (-Vy) is supplied to the scan electrode (Y).

On the other hand, the sustain voltage supply control unit 610 of FIG. 7A includes a sustain voltage supply control switch unit S3, and uses the sustain voltage supply control switch unit S3 to sustain voltage Vs to the scan electrode Y. ) To control the supply.

The base voltage supply control unit 620 includes a base voltage supply control switch unit S4, and controls the supply of the base voltage GND to the scan electrode Y by using the base voltage supply control switch unit S4. do.

Here, the blocking unit 660 may be further included between the base voltage supply controller 620 and the scan and down ramp common supply controller 650.

The blocking unit 660 includes a blocking switch unit S7, and is grounded through the base voltage supply control unit 620 from the scan and down ramp common supply control unit 650 using the blocking switch unit S7. To prevent reverse current from flowing.

Here, one end of the sustain voltage supply control unit 610 is connected in common with one end of the sustain voltage source and the rising waveform generator 630 for generating the sustain voltage Vs, and the other end and the other end of the rising waveform generator 630 are grounded. One end of the voltage supply control unit 620 and one end of the energy recovery circuit unit 600 are commonly connected. In addition, the other end of the energy recovery circuit unit 600 and the other end of the base voltage supply control unit 620 are grounded (GND).

In the above description, only the case in which the switching elements used in the driving unit of the plasma display device of the present invention are field effect transistors (FETs) is illustrated and described. However, insulated gate bipolar transistors (IGBTs) are used. Other transistors are also applicable.

The operation of the driving unit of the plasma display device according to the present invention described above will be described with reference to FIG. 9.

9 is a view for explaining an example of the operation of the drive unit of the plasma display device of the present invention.

Referring to FIG. 9, first, the base voltage supply control switch S4 of the base voltage supply control unit 620 of FIG. 7A, the blocking switch unit S7 of the blocking unit 660, and the scan drive integrated circuit unit 670 are scanned. When the bottom switch unit S10 is turned on, the base voltage is supplied to the scan electrode Y of the plasma display panel. Then, as before the period d1 in FIG. 9, the voltage of the scan electrode Y becomes the voltage of the ground level GND.

Thereafter, in the period d1, while the blocking switch S7 of the blocking unit 660 is turned on, a predetermined control signal is transmitted to the first variable resistor 502 of the first slope generator 502 through the terminal 1 (see FIG. 6). When supplied to the unit VR1, the rising waveform supply control switch S5 of the rising waveform supply control unit 501 included in the rising waveform generator 630 is turned on, and the channel of the rising waveform supply control switch S5 ( As the width of the channel is adjusted by the first variable resistor unit VR1, a rising waveform in which the voltage gradually rises with the first slope is generated, and the rising waveform is supplied to the scan electrode Y. Then, as in the period d1 of FIG. 9, the voltage of the scan electrode Y gradually increases with the first slope from the first voltage V1 to the second voltage V2.

Here, the maximum voltage in the period d1 is the sustain voltage Vs supplied by the sustain voltage source, and the maximum value of the voltage of the second voltage V2 is also the sustain voltage Vs.

Subsequently, in the d2 period, the rising waveform supply of the rising waveform supply control unit 510 is supplied while the blocking switch unit S7 of the blocking unit 660 and the scan bottom switch unit S10 of the scan drive integrated circuit unit 670 are turned on. The control switch section S5 is turned off. Then, the energy recovery control switching unit S2 of the energy recovery circuit unit 600 is turned on.

Then, the reactive voltage component of the scan electrode Y is determined by the scan bottom switch unit S10 of the scan drive integrated circuit unit 670, the blocking switch unit S7 of the blocking unit 660, the second inductor unit L2, and the second inductor unit L2. It is stored in the voltage storage capacitor unit C1 via the two diode unit D2 and the energy recovery control switching unit S2, and the voltage of the scan electrode Y is converted from the second voltage V2 to the first voltage V1. ) To the second slope.

The operation in the d2 period is substantially the same as the operation for supplying the sustain pulse to the scan electrode Y and / or the sustain electrode Z in the sustain period. More specifically, the operation in the d2 period is the same as the operation in the voltage recovery period d2 of the sustain pulse of FIG.

Accordingly, the second slope of the first reset pulse is approximately equal to the slope of the voltage recovery period d2 of the sustain pulse supplied to the scan electrode Y and / or the sustain electrode Z in the sustain period.

Through this process, the first reset pulse is supplied in the above-described periods d1 and d2.

Next, in the d3 period, the base voltage supply control unit 620 is turned on. Then, the voltage of the scan electrode Y is set to the ground voltage GND.

Next, in the d4 period, the blocking switch unit S7 of the blocking unit 660, the scan bottom switch unit S10 of the scan drive integrated circuit unit 670, and the energy recovery control switching unit S2 of the energy recovery circuit unit 600, The base voltage supply control unit 620 is turned off. Then, the scan top switch unit S9 of the scan drive integrated circuit unit 670 is turned on.

Then, the scan reference voltage Vsc supplied from the scan reference voltage source is supplied to the scan electrode Y through the scan reference voltage supply controller 640. As a result, the voltage of the scan electrode Y is rapidly increased to the scan reference voltage Vsc. Accordingly, the third voltage V3 of the second reset pulse is the same voltage as the scan reference voltage Vsc.

Thereafter, in the d4 period, while the blocking switch S7 of the blocking part 660 is turned on, a predetermined control signal is changed to the first 'variable of the third slope generating part 503 through the terminal (see FIG. 6). When supplied to the resistor unit VR1 ′, the rising waveform supply control switch unit S5 of the rising waveform supply control unit 501 included in the rising waveform generator 630 is turned on, and the rising waveform supply control switch S5 is turned on. As the channel width is adjusted by the first 'variable resistor VR1', a rising waveform in which the voltage gradually rises with a third slope is generated, and the rising waveform is supplied to the scan electrode Y. Then, as in the period d4 of FIG. 9, the voltage of the scan electrode Y gradually increases with the third slope from the third voltage V3 to the fourth voltage V4.

Here, the maximum voltage in the period d4 is the sum of the sustain voltage Vs supplied by the sustain voltage source and the scan reference voltage Vsc supplied by the scan reference voltage source.

Subsequently, in the d5 period, the scan top switch unit S9 of the scan drive integrated circuit unit 670, the blocking switch unit S7 of the blocking unit 660, and the rising waveform supply control switch unit S5 of the rising waveform supply control unit 501 (S5). ) And the bottom switch unit S10 of the scan drive integrated circuit unit 670 and the scan and down ramp common supply control switch unit S8 of the scan and down ramp common supply control unit 650 are turned on or on. do.

Then, the voltage gradually falls to the scan electrode Y of the plasma display panel.

Here, the d5 period is the falling ramp supply control signal input terminal (③) connected to the gate terminal of the scan and falling ramp common supply control switch unit S8 of the scan and falling ramp common supply control unit 650, as described above in FIG. 7B. This is the case when the down ramp supply control signal is input.

In the period d5, the voltage of the scan electrode Y may drop to the lowest negative scan voltage (−Vy).

The first reset pulse and the second reset pulse can be supplied to the scan electrode Y by the method described above.

Meanwhile, the first reset pulse and the second reset pulse described above are preferably supplied to the scan electrode Y in the reset period of all the subfields of the frame. Alternatively, only the predetermined subfields of the plurality of subfields of the frame are supplied. It is also possible to supply the first reset pulse and the second reset pulse in the reset period. This will be described with reference to FIG. 10.

10 is a view for explaining an example of a method of using the first reset pulse and the second reset pulse only in a predetermined subfield among a plurality of subfields of a frame.

Referring to FIG. 10, when one frame includes a total of 12 subfields, a scan is performed in a reset period in the first, second, third, fourth, fifth, sixth, seventh, eighth, and ninth subfields of the twelve subfields. The first reset pulse and the second reset pulse are supplied to the electrode Y, and only one third reset pulse is supplied to the scan electrode Y in the reset period in the 10th, 11th, and 12th subfields. Here, the third reset pulse is approximately the same waveform as the second reset pulse.

In other words, the first reset pulse and the second reset pulse are supplied to the scan electrode Y from the subfield having the lowest gray scale weight among the plurality of subfields of the frame to the predetermined subfield in order of increasing gray scale weight.

As described above, the reason why the first reset pulse and the second reset pulse are used in the subfield with relatively low gray scale weight is that the scan electrode Y and / or the sustain electrode in the sustain period in the subfield with relatively low gray scale weight ( Since the number of sustain pulses supplied to Z) is relatively small, the possibility that the discharge becomes unstable in the next subfield is relatively large compared to the subfield having a high gray weight.

In at least one or more of the subfields in which the first reset pulse and the second reset pulse are supplied to the scan electrode Y, a falling waveform in which the voltage gradually falls before the first reset pulse is supplied is scanned. It is preferable to supply.

This will be described with reference to FIG. 11.

FIG. 11 illustrates a falling waveform in which the voltage gradually falls before the first reset pulse is supplied in at least one or more subfields in which the first reset pulse and the second reset pulse are supplied to the scan electrode Y. FIG. It is a figure for demonstrating an example of the method supplied to ().

Referring to FIG. 11, at least one of the subfields in which the first reset pulse and the second reset pulse are supplied to the scan electrode Y, as in the region B, before the first reset pulse is supplied to the scan electrode ( Y) is supplied a falling waveform in which the voltage gradually falls.

While the falling waveform is supplied to the scan electrode Y, the sustain electrode Z has a third sustain bias voltage higher than the second sustain bias voltage Vz2 supplied to the sustain electrode Z in the address period after the reset period. Vz3) is supplied.

Accordingly, positive wall charges are accumulated on the scan electrode Y in the discharge cell, and negative wall charges are accumulated on the sustain electrode Z.

When the first reset pulse and the second reset pulse are supplied to the scan electrode Y in the distribution state of the wall charges, the reset discharge may be more easily generated, and thus the initialization may be more effectively performed.

In addition, in the distribution state of the wall charges, even when the voltages of the first reset pulse and the second reset pulse are further lowered, reset discharge may be generated to perform initialization.

Here, the third sustain bias voltage Vz3 is preferably approximately equal to the voltage Vs of the sustain pulse supplied to the scan electrode Y and / or the sustain electrode Z in the sustain period after the address period.

As such, the technical configuration of the present invention described above can be understood by those skilled in the art that the present invention can be implemented in other specific forms without changing the technical spirit or essential features of the present invention.

Therefore, the exemplary embodiments described above are to be understood as illustrative and not restrictive in all respects, and the scope of the present invention is indicated by the appended claims rather than the foregoing detailed description, and the meaning and scope of the claims are as follows. And all changes or modifications derived from the equivalent concept should be interpreted as being included in the scope of the present invention.

The display device of the present invention described in detail above, by supplying the first reset pulse and the second reset pulse to the scan electrode (Y), even if the image of the pattern is displayed on the same screen for a certain period of time to prevent the occurrence of an afterimage There is.

Claims (13)

A plasma display panel having scan electrodes and sustain electrodes parallel to each other; In the reset period for initializing at least one of the plurality of subfields of the frame, the first slope gradually increases from the first voltage to the second voltage and then the second slope from the second voltage to the first voltage. Scanning the first reset pulse and a second reset pulse that gradually rises with a third slope different from the first slope from the third voltage to the fourth voltage after a rapid rise from the first voltage to the third voltage. Driving part to supply to the electrode Plasma display device comprising a. The method of claim 1, The driving unit Supplying a first sustain bias voltage lower than a second sustain bias voltage supplied to the sustain electrode in an address period after the reset period while supplying a first reset pulse and a second reset pulse to the scan electrode. And a plasma display device. The method of claim 2, And said first sustain bias voltage is approximately equal to a voltage at ground level (GND). The method of claim 1, And wherein the first slope is greater than the third slope. The method of claim 1, And said second voltage is greater than or substantially equal to a third voltage. The method of claim 1, And the fourth voltage is more than one and three times less than the second voltage. The method of claim 1, The second slope is And approximately equal to the slope of the voltage recovery period of the sustain pulse supplied to the scan electrode and / or the sustain electrode in the sustain period after the reset period. The method of claim 1, Among the plurality of subfields of the frame, a subfield to which a first reset pulse and a second reset pulse are supplied, A plasma display device comprising: a subfield having the lowest gray scale weight to a predetermined subfield in the order of increasing gray scale weight. The method of claim 1, The driving unit In at least one subfield among the subfields supplying the first reset pulse and the second reset pulse. And a falling waveform in which a voltage gradually falls to the scan electrode before the first reset pulse is supplied. The method of claim 9, The driving unit And a third sustain bias voltage higher than the second sustain bias voltage supplied to the sustain electrode in the address period after the reset period while supplying the falling waveform to the scan electrode. The method of claim 10, The third sustain bias voltage is And a voltage (Vs) of a sustain pulse supplied to the scan electrode and / or the sustain electrode in the sustain period after the address period. The method of claim 1, And a length of the supply period of the first reset pulse is 100 ms (microsecond) or more and 250 ms (microsecond) or less. The method of claim 1, The driving unit A rising waveform supply controller for performing a preset switching operation between the sustain voltage source supplying the sustain voltage Vs and the scan electrode; A first slope generator for generating a first slope to a voltage passing through the rising waveform supply controller; And A third slope generator for generating a third slope different from a first slope in a voltage passing through the rising waveform supply controller; Plasma display device comprising a.

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