KR20070072184A - Method for fabricating liquid crystal dispaly device - Google Patents

Abstract

A manufacturing method of an LCD(Liquid Crystal Display) is provided to simultaneously form a gate electrode wire and a pixel electrode, thereby reducing the number of masks. An active layer(105) and a conduction layer are formed on a substrate. Thereafter, the conduction layer and active layer are etched so that source/drain regions are defined by means of a diffraction exposure process. The conduction layer is selectively patterned so that source/drain electrodes(107a,107b) are formed. A passivation layer(111) is formed on the substrate including the source/drain electrodes and has a contact hole for exposing the drain electrode. A transparent conduction layer and a metal layer are stacked on the protection layer including the contact hole. The metal layer and transparent layer are patterned so that a gate electrode and a pixel electrode(115a) are formed.

Description

Liquid crystal display device manufacturing method {METHOD FOR FABRICATING LIQUID CRYSTAL DISPALY DEVICE}

1 is a plan view showing a unit pixel structure of a general liquid crystal display device.

2A to 2G are cross-sectional views taken along the line II-II of FIG. 1, illustrating a process cross-sectional view of a method of manufacturing a liquid crystal display device using a top gate structure according to the prior art.

3A to 3L are cross-sectional views illustrating a method of manufacturing a liquid crystal display device according to the present invention.

********** Description of the symbols for the main parts of the drawings ************

101: first substrate 103: active layer protective film

105: active layer 107: conductive layer

107a: source electrode 107b: drain electrode

111: protective layer 113: contact hole

115: transparent conductive layer 115a: pixel electrode

117: metal layer 117a: gate electrode wiring

119: photosensitive film 120: diffraction mask

120a: light transmitting part 120d: light blocking part

120c: transflective part 131: second substrate

133: black matrix 135: color filter layer

137: common electrode 141: liquid crystal layer

The present invention relates to a method for manufacturing a liquid crystal display device, and more particularly, to a method for manufacturing a liquid crystal display device capable of reducing a mask process in manufacturing a liquid crystal display device.

In display devices, especially flat panel displays such as liquid crystal display devices, each pixel includes an active device such as a thin film transistor to drive the display device. The driving method is often called an active matrix driving method. In the active matrix method, the active elements are arranged in each pixel arranged in a matrix to drive the pixel.

The general active matrix liquid crystal display device will be described with reference to FIGS. 1 and 2 as follows.

1 is a plan view illustrating a unit pixel structure of a general liquid crystal display device.

Referring to FIG. 1, in a general liquid crystal display device, each pixel of a thin film transistor liquid crystal display device having N × M pixels arranged vertically and horizontally is provided with a gate line 11 to which scan signals are applied from an external driving circuit and an image signal. And a thin film transistor 10 formed at an intersection area of the data line 21.

The thin film transistor 10 includes a gate electrode 13 branched from a gate line 11, a source electrode 23 branched from a signal line, a drain electrode 25 connected to a pixel electrode 31, and the source electrode. The semiconductor layer 27 is formed between the 23 and the drain electrode 25.

In addition, when the voltage is applied to the gate electrode 13 through the gate line 11, the thin film transistor 10 receives the data voltage applied to the source electrode 25 through the data line 21. And serves as a drain electrode 25 through.

When the data voltage is applied to the drain electrode 25, the data voltage is applied to the pixel electrode 31 connected to the data electrode 25, and thus, between the pixel electrode 31 and the common electrode (not shown) of the pixel. Voltage difference occurs. Then, due to the voltage difference, the molecular arrangement of the liquid crystal (not shown) existing between the pixel electrode 31 and the common electrode (not shown) is changed. As the molecular arrangement of the liquid crystal is changed, the light transmittance of the pixel is changed. do.

In this way, a visual difference occurs between the pixel to which the data voltage is applied and the pixel to which the data voltage is not applied.

Accordingly, the liquid crystal display device serves as a display device by collecting pixels having such visual differences.

A method of manufacturing a thin film transistor having a top gate structure constituting the general liquid crystal display device described above will be described with reference to FIG. 2.

2A to 2G are cross-sectional views taken along the line II-II of FIG. 1 and illustrate a process cross-sectional view showing a method of manufacturing a liquid crystal display device using a top gate structure according to the prior art.

As shown in FIG. 2A, a thin film transistor having a top gate structure according to the related art is formed on an active layer 53 made of amorphous silicon on a first substrate 51 made of an insulating material, and then formed on the active layer 53. A first photosensitive film (not shown) is applied.

Subsequently, in a state in which a first mask (not shown) is positioned on the first photoresist film, light is irradiated, such as ultraviolet light, and then a development process is performed to partially remove the active layer 53. A blocking first photoresist layer pattern (not shown) is formed.

Subsequently, an etching process is performed using the first photoresist pattern as a mask to form an active layer pattern 53 on the first substrate 51.

After removing the first photoresist pattern, the gate insulating layer 55 and the conductive layer 57 for forming the gate electrode are sequentially stacked on the entire substrate 51 including the active layer pattern 53.

Subsequently, a second photoresist film (not shown) is coated on the conductive layer 57, and then a second mask (not shown) is irradiated with light such as ultraviolet rays while a second mask (not shown) is positioned on the second photoresist film. Subsequently, the development process is performed to form a second photoresist pattern (not shown) that blocks the gate formation region.

Next, as shown in FIG. 2B, the conductive layer 57 and the gate insulating layer 55 are sequentially etched using the second photoresist pattern (not shown) as a mask to sequentially form the gate electrode 57a and the gate insulating layer pattern. Form 55a.

Subsequently, as shown in FIG. 2C, after removing the second photoresist layer pattern, the active layer 53 on both sides of the gate electrode 57a is doped with an N-type or P-type impurity at a high concentration, so that the source electrode region 53a is formed. And drain electrode region 53b are formed at the same time.

Next, as shown in FIG. 2D, the protective layer 59 is deposited on the entirety of the first substrate 51 to a predetermined thickness or more, and then a third photosensitive film (not shown) is applied thereon.

Subsequently, in a state where a third mask (not shown) is positioned on the third photoresist layer, light such as ultraviolet rays is irradiated, and then a developing process is performed to form a fifth photoresist pattern (not shown).

Next, the protective layer 59 is selectively etched using the third photoresist pattern (not shown) to form a contact hole 61 exposing the source electrode region 53a and the drain electrode region 53b. .

Subsequently, as shown in FIG. 2E, after removing the third photoresist pattern, a transparent conductive layer 63 such as ITO is deposited on the protective layer 59 including the contact hole 61.

Subsequently, in a state where a fourth mask (not shown) is positioned on the transparent conductive layer 63 by a fourth mask process, light such as ultraviolet rays is irradiated, and then a developing process is performed, whereby a fourth photosensitive film pattern (not shown) is provided. To form.

Next, as shown in FIG. 2F, the source is electrically connected to the source electrode region 53a through the contact hole 61 by selectively etching the conductive layer 63 using the fourth photoresist pattern as a mask. A drain electrode 65b electrically connected to the electrode 65a and the drain electrode region 53b is formed, and then the fourth photoresist pattern is removed.

Thereafter, after the planarization film 67 is deposited on the first substrate 51, a portion of the drain electrode 65b is exposed by removing a predetermined region of the planarization film 67. In addition, a pixel electrode (not shown) electrically connected to the exposed drain electrode 65b is formed of the transparent conductive material.

Although not shown in the drawings, the black matrix and the color filter layer are formed on the second substrate, and then the first substrate 51 and the second substrate (not shown) are bonded to each other, followed by a liquid crystal layer (not shown). ) To form a top gate structure liquid crystal display device.

As described above, the manufacturing method of the liquid crystal display device having the top gate structure according to the prior art has the following problems.

According to the manufacturing method of the liquid crystal display device of the top gate structure according to the prior art, the first mask process for forming the active layer pattern, the second mask process for forming the gate electrode, the drain when manufacturing the thin film transistor of the top gate structure A third mask process for electrically connecting the pixel electrode to the electrode and a fourth mask process for forming the pixel electrode are required.

Therefore, since the mask process is required four times during the device manufacturing as described above, there is a problem that the manufacturing process is complicated, thereby increasing the manufacturing cost.

Accordingly, an object of the present invention is to provide a liquid crystal display device manufacturing method which can simplify the manufacturing process and reduce the manufacturing cost by reducing the number of mask processes during device manufacturing. have.

Liquid crystal display device manufacturing method according to the present invention for achieving the above object comprises the steps of forming an active layer and a conductive layer on a substrate; Etching the conductive layer and the active layer to define a source / drain electrode region; Selectively patterning the conductive layer to form a source / drain electrode; Forming a protective layer having a contact hole exposing the drain electrode on the substrate including the source / drain electrode; Stacking a transparent conductive layer and a metal layer on the protective layer including the contact hole; And patterning the metal layer and the transparent conductive layer to form a gate electrode and a pixel electrode.

In addition, the liquid crystal display device manufacturing method according to the present invention for achieving the above object comprises the steps of forming an active layer and a conductive layer on the first substrate; Etching the conductive layer and the active layer to define a source / drain electrode region; Selectively patterning the conductive layer to form a source / drain electrode; Forming a protective layer having a contact hole exposing the drain electrode on a first substrate including the source / drain electrode; Stacking a transparent conductive layer and a metal layer on the protective layer including the contact hole; Patterning the metal layer and the transparent conductive layer to form a gate electrode and a pixel electrode; Stacking a black matrix, a color filter layer, and a common electrode on a second substrate; Bonding the first substrate and the second substrate to each other; And forming a liquid crystal layer between the first substrate and the second substrate.

Hereinafter, a method of manufacturing a liquid crystal display device according to the present invention will be described in detail with reference to the accompanying drawings.

3A to 3L are cross-sectional views illustrating a method of manufacturing a liquid crystal display device according to the present invention.

As shown in FIG. 3A, the insulating layer 103, the active layer 105, and the source / drain electrode forming conductive layer 107 are formed to protect the active layer on the first substrate 101 including the TFT region and the pixel region. After stacking in order to apply a first photosensitive film 109 on the conductive layer 107.

Then, as shown in Figure 3b, by irradiating light, such as the ultraviolet light (Ultraviolet light) in a state in which a first mask (not shown) for diffraction exposure is placed on the first photosensitive film 109 by a first mask process The development process is performed to form a first photoresist pattern 109a that blocks the source / drain electrode regions. At this time, the film thickness of the portion of the first photoresist pattern 109a located in the channel region remains thinner than the film thickness located on the source / drain electrode forming portion. This is possible because part of the light is transmitted to the first photoresist film portion positioned on the channel region by using a diffraction mask, and light is not transmitted to the source / drain electrode region.

Next, as shown in FIG. 3C, the conductive layer 107, the active layer 105, and the active layer protective layer 103 are sequentially etched using the first photoresist pattern 109a as a mask to define a source / drain formation region. .

Then, as shown in FIG. 3D, the first photoresist pattern 109a is ashed to expose portions of the conductive layer 107 located in the channel region. At this time, a portion of the first photoresist pattern 109a positioned in the channel region is completely removed, while only a portion of both portions of the first photoresist pattern 109a are removed.

Subsequently, as illustrated in FIG. 3D, the portion of the conductive layer 107 positioned in the channel region exposed by the mask using the photoresist layer pattern 109b, which has been partially removed, may be selectively etched to form the source electrode 107a and the drain electrode ( 107b).

Subsequently, as shown in FIG. 3E, after removing the first photoresist layer pattern 109b, an insulating material such as nitride is deposited on the entire first substrate 101 to form a protective layer 111. do.

Next, as shown in FIG. 3F, after the second photoresist film (not shown) is applied to the entire first substrate 101, the second mask is positioned on the second photoresist film by a second mask process, and the ultraviolet rays ( Light, such as ultraviolet light, is irradiated and then developed to form a second photoresist pattern (not shown).

Subsequently, the protective layer 111 is selectively etched using the second photoresist pattern (not shown) as a mask to form a contact hole 113 exposing a portion of the drain electrode 107b.

Next, as shown in FIG. 3G, the second photoresist layer pattern (not shown) is removed, and again, such as ITO or IZO, by sputtering or deposition on the protective layer 111 including the contact hole 113. The transparent conductive material is stacked to sequentially deposit the conductive layer 115 and the gate wiring metal layer 117.

Subsequently, as shown in FIG. 3H, the third photosensitive film 119 is coated on the metal layer 117 and then the third photosensitive film 120 for diffraction exposure for the third mask process of the diffraction exposure method is applied. In the state positioned above (119), light such as ultraviolet (Ultraviolet light) is irradiated, and then a development process is performed to form third photoresist patterns 119a and 119b as shown in FIG. 3H. In this case, the third mask 120 for diffraction exposure includes a light transmitting part 120a for completely transmitting the light, a light blocking part 120b for completely blocking the light, and a semi-transmitting part 120c for transmitting some light. In addition, a portion of the third photoresist layer pattern 119b is formed to have a thickness thinner than that of the third photoresist layer pattern 119a, which is partially transmitted through the transflective portion 120c of the third mask 120. 119) is irradiated to leave a thin film thickness. The third photoresist pattern 119a is positioned on the channel region, and the third photoresist pattern 119b is positioned on the pixel electrode (not shown) including the drain electrode 107b.

Next, as shown in FIG. 3I, the metal layer 117 and the conductive layer 115 are sequentially etched using the third photoresist pattern 119a and 119b as a mask to partially protect the protective layer 111 on the channel region. To be exposed.

Subsequently, as illustrated in FIG. 3J, an ashing process is performed to remove a portion of the third photoresist pattern 119b on the metal layer 119b positioned on the pixel region.

Next, as shown in FIG. 3K, the exposed portion of the metal layer 117 is etched using the third photoresist pattern 119a as a mask to electrically connect the pixel electrode 115a to the drain electrode 107b. After that, the third photoresist pattern 119a is completely removed to form the gate electrode wiring 117a.

3L, a black matrix 133 and color filter layers 135 of R, G, and B are formed on the second substrate 131. Although not shown in the drawings, an overcoat layer or a protective layer for planarization may be formed on the color filter layer 135.

Subsequently, a transparent conductive material such as ITO or IZO is stacked on the color filter layer 135 to form a common electrode 137, and then the first substrate 101 and the second substrate 131 are bonded to each other by a sealing material. A liquid crystal layer 141 is formed between the first substrate 101 and the second substrate 131 to complete the liquid crystal display device.

As described above, the method of manufacturing the liquid crystal display device having the top gate structure according to the present invention has the following effects.

According to the method of manufacturing the liquid crystal display device having the top gate structure according to the present invention, the gate electrode wiring and the pixel electrode can be formed at the same time, so that the device can be manufactured with three masks using the existing process.

Therefore, when the present invention is applied, the mask reduction effect can be obtained, and the manufacturing process time can be shortened because the gate electrode wiring and the pixel electrode are simultaneously formed.

Therefore, the thin film transistor manufacturing method used in the present invention can be applied to the manufacturing of the liquid crystal display device of the TN mode, IPS mode and FFS mode.

Claims (22)

Forming an active layer and a conductive layer on the substrate; Etching the conductive layer and the active layer to define a source / drain electrode region; Selectively patterning the conductive layer to form a source / drain electrode; Forming a protective layer having a contact hole exposing the drain electrode on the substrate including the source / drain electrode; Stacking a transparent conductive layer and a metal layer on the protective layer including the contact hole; And And patterning the metal layer and the transparent conductive layer to form a gate electrode and a pixel electrode. The method of claim 1, wherein the etching of the conductive layer and the active layer to define a source / drain electrode region comprises: A liquid crystal display device manufacturing method comprising a diffraction exposure process using a diffraction exposure mask. The method of claim 2, wherein the diffraction exposure step, A method of manufacturing a liquid crystal display device comprising forming a photosensitive film pattern by coating a photosensitive film on a conductive layer and placing a diffraction exposure mask thereon, and performing an exposure and development process using the diffraction exposure mask. . 4. The method of claim 3, wherein the film thickness of the portion of the photoresist pattern located on the channel region is thinner than the film thickness on the source / drain electrode region. The method of claim 4, wherein the photoresist pattern is subjected to an ashing process to expose portions of the conductive layer on the channel region. The method of claim 1, wherein the forming of the gate electrode and the pixel electrode by patterning the metal layer and the transparent conductive layer is performed through a diffraction exposure process using a diffraction exposure mask. The method of claim 6, wherein the diffraction exposure step, Forming a photoresist pattern by applying a photoresist film on the metal layer and then placing a diffraction mask on the metal layer and performing an exposure and development process using the diffraction exposure mask. . 8. The method of claim 7, wherein the thickness of the drain electrode and the pixel region of the photoresist pattern is thinner than that of the channel region. 10. The method of claim 8, wherein the photoresist pattern is subjected to an ashing process to expose portions of the metal layer positioned in the drain electrode and the pixel region. 10. The liquid crystal display device of claim 9, wherein the remaining photoresist pattern is used to form a gate electrode wiring and a pixel electrode by removing the photoresist pattern after removing a portion of the metal layer positioned in the drain electrode and the pixel region. Way. The method of claim 1, further comprising forming an insulating layer under the active layer to protect the active layer. The method of claim 1, further comprising forming an ohmic layer on the active layer. Forming an active layer and a conductive layer on the first substrate; Etching the conductive layer and the active layer to define a source / drain electrode region; Selectively patterning the conductive layer to form a source / drain electrode; Forming a protective layer having a contact hole exposing the drain electrode on a first substrate including the source / drain electrode; Stacking a transparent conductive layer and a metal layer on the protective layer including the contact hole; And Patterning the metal layer and the transparent conductive layer to form a gate electrode and a pixel electrode; Stacking a black matrix, a color filter layer, and a common electrode on a second substrate; Bonding the first substrate and the second substrate to each other; And And forming a liquid crystal layer between the first substrate and the second substrate. 15. The method of claim 13, wherein the step of defining the source / drain electrode regions by etching the conductive layer and the active layer is performed by a diffraction exposure process using a diffraction exposure mask. The method of claim 14, wherein the diffraction exposure step, A method of manufacturing a liquid crystal display device, comprising: forming a photosensitive film pattern by applying a photosensitive film on a conductive layer and then placing a diffraction exposure mask thereon, and performing an exposure and development process using the diffraction exposure mask. The method of claim 15, wherein the thickness of the portion of the photoresist pattern located on the channel region is thinner than the thickness on the source / drain electrode region. 17. The method of claim 16, wherein the photoresist pattern is subjected to an ashing process to expose portions of the conductive layer on the channel region. The method of claim 13, wherein the forming of the gate electrode and the pixel electrode by patterning the metal layer and the transparent conductive layer is performed through a diffraction exposure process using a diffraction exposure mask. The method of claim 18, wherein the diffraction exposure step, Forming a photoresist pattern by applying a photoresist film on the metal layer and then placing a diffraction mask on the metal layer and performing an exposure and development process using the diffraction exposure mask. . 20. The method of claim 19, wherein the film thickness of the drain electrode and the pixel region of the photoresist pattern is thinner than that of the channel region. 21. The method of claim 20, wherein the photoresist pattern is subjected to an ashing process to expose a portion of the metal layer positioned in the drain region and the pixel region. 22. The liquid crystal display device of claim 21, wherein the remaining photoresist pattern is used to form a gate electrode wiring and a pixel electrode by removing the photoresist pattern after removing a portion of the metal layer positioned in the drain electrode and the pixel region. Way.

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