KR20070071291A - Liquid crystal display device and fabricating method - Google Patents

Abstract

An LCD(Liquid Crystal Display) and a method for manufacturing the same are provided to reduce the number of photo-masks used in manufacturing the LCD, by performing a preliminary process for separating a source electrode and a drain electrode from a source-drain conductive pattern on an interlayer insulating film when a contact hole for exposing the drain electrode is formed in the interlayer insulating film. A gate electrode is formed on a substrate. A gate insulating layer(207) is formed on the resultant substrate including the gate electrode. A semiconductor layer and a conductive layer are sequentially deposited on the gate insulating layer. A source-drain conductive pattern(212) and a semiconductor pattern(210) are formed by pattern-etching the conductive layer and the semiconductor layer. The source-drain conductive pattern includes a source electrode, a drain electrode, and a connection portion between the source electrode and the drain electrode, wherein the connection portion of the source-drain conductive pattern is positioned on a channel region of the semiconductor pattern. An interlayer insulating film(213) is formed on the resultant substrate including the source-drain conductive pattern. The interlayer insulating film is pattern-etched to form a contact hole(227a) for exposing the drain electrode of the source-drain conductive pattern and to expose the connection portion of the source-drain conductive pattern. A transparent conductive layer is formed on the interlayer insulating film. The transparent conductive layer is pattern-etched to form a pixel electrode. The exposed portion of the source-drain conductive pattern and a portion of an upper part of the semiconductor pattern are removed to form a source electrode and a drain electrode.

Description

Liquid crystal display device and its manufacturing method {LIQUID CRYSTAL DISPLAY DEVICE AND FABRICATING METHOD}

1 is a plan view showing a conventional liquid crystal display device

2 is a cross-sectional view showing a conventional liquid crystal display device

3A to 3E are cross-sectional views showing a method of manufacturing a liquid crystal display device of the prior art.

4 is a plan view showing a liquid crystal display device of the present invention.

5 is a cross-sectional view showing a liquid crystal display device of the present invention.

6A to 6D are cross-sectional views illustrating a method of manufacturing a liquid crystal display device of the present invention.

** Explanation of symbols for main parts of drawings **

203: gate electrode

205: storage electrode

211a and 211b: source electrode and drain electrode

215: pixel electrode

2217: gate pad

219: data pad

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device and a method for manufacturing the same. In particular, the source and drain electrodes are separated from each other in a process step of forming contact holes in an interlayer insulating layer, thereby reducing the number of photomasks used for manufacturing a thin film transistor array substrate. It relates to a liquid crystal display device and a manufacturing method thereof.

Recently, the importance of the display device as a visual information transmission medium has been further emphasized, and many kinds of competitive display devices have been developed. Among such various types of display devices, in order to occupy a major position in the future, it is necessary to satisfy requirements such as low power consumption, thinness, light weight, and high quality.

 Liquid crystal display (LCD), the flagship product of flat panel displays (FPDs), is not only capable of satisfying these conditions but also mass-produced. It is widely used in various applications and is positioned as a core display device that can replace the market dominated by a conventional cathode ray tube (CRT).

In general, a liquid crystal display device displays a desired image by individually supplying data signals according to image information to liquid crystal cells arranged in a matrix, thereby adjusting a light transmittance of the liquid crystal cells. to be.

To this end, the liquid crystal panel of the liquid crystal display device is composed of a color filter substrate which is a top plate, a thin film transistor array substrate which is a bottom plate, and a liquid crystal layer formed between the color filter substrate and the thin film transistor array substrate. .

Hereinafter, a structure of a general liquid crystal display device will be described in detail with reference to FIGS. 1 and 2.

1 is a plan view of a thin film transistor array substrate constituting a liquid crystal display device according to the prior art. As shown in FIG. 1, each unit pixel of a thin film transistor liquid crystal display device having N × M pixels arranged vertically and horizontally includes a gate wiring 121 to which a gate signal is applied from an external drive IC, and data to which a data signal is applied. And a thin film transistor formed at an intersection area of the gate line 121 and the data line 123.

In this case, the thin film transistor may include a gate electrode 103 connected to the gate wiring 121, a semiconductor pattern 109 formed on the gate electrode 103 and activated as a gate signal is applied to the gate electrode 103; The source electrode 111a and the drain electrode 111b are formed on the semiconductor pattern 109.

In addition, an image signal is applied to the display area of the pixel through the source electrode 111a and the drain electrode 111b as the semiconductor pattern 109 is activated by being connected to the source electrode 111a and the drain electrode 111b. The pixel electrode 115 for operating the liquid crystal (not shown) is formed. In addition, the storage electrode 125 formed by overlapping the pixel electrode with a predetermined region is connected to the storage wiring 125.

FIG. 2 is a cross-sectional view taken along line AA ′ of FIG. 1, and the cross-sectional structure of a liquid crystal display device according to the related art according to the related art will be described in detail with reference to the drawings.

As shown in FIG. 2, a gate electrode 123, a gate pad 117, and a storage electrode 105 made of a metal layer are formed on the substrate 101. A gate insulating layer 107 made of silicon oxide (SiO 2) or silicon nitride (SiNx) is formed on a substrate including the gate electrode 123, and a semiconductor pattern patterned in an island shape on the gate insulating layer 107. 109 is formed, and source and drain electrodes 111a and 111b overlapping the semiconductor pattern 109 in a predetermined shape are formed. At this time, an impurity doped semiconductor layer 109a is formed between the semiconductor pattern 119 and the source and drain electrodes 111a and 111b, which is the semiconductor pattern 109 and the source and drain electrodes 111a and 111b. This is to enable ohmic contact.

Subsequently, an interlayer insulating layer 113 is formed on the substrate including the source and drain electrodes 111a and 111b, and the drain electrode 111b is formed through the contact hole (127a in FIG. 1) formed in the interlayer insulating layer 113. The pixel electrode 115 is electrically connected to the interlayer insulating layer 113. In this case, since the pixel electrode 115 transmits light generated from the backlight to the liquid crystal layer, the pixel electrode 115 is formed of a transparent conductive layer such as indium tin oxide (ITO) or tin oxide (TO).

Although not shown on the cut line A-A 'of FIG. 1, the gate pad and the data pad formed at the outer portion of the liquid crystal panel are illustrated in FIG. 2. As shown in FIG. 2, a gate pad 117 and a data pad 119 connected to the gate line 121 and the data line 123 at the outer portion of the liquid crystal panel to receive various signals from an external drive IC. Is formed on the pads, and electrodes 117a and 119a made of the same material as that of the pixel electrode are connected through contact holes.

Although not shown in the drawing, the thin film transistor array substrate is bonded to a color filter substrate including a color filter pattern, a black mattress, and the like, and light transmitted from the backlight is transmitted between the thin film transistor array substrate and the color filter substrate. The panel portion of the liquid crystal display device is completed by filling up the liquid crystal layer for controlling.

Next, a method of manufacturing the liquid crystal display device will be described with reference to FIGS. 3A to 3E.

In the first step, as shown in FIG. 3A, a metal layer is formed on the substrate 101 and the gate electrode 103, the storage electrode 105, and the gate pad 117 are formed by using photolithography.

As shown in FIG. 3B, the gate insulating layer 107, the semiconductor pattern 109, and the lower material layer 120 of the data pad are formed on the substrate including the gate electrode 103. In this case, ohmic contact layers 110 and 120a formed of a semiconductor material doped with impurities for ohmic contact are formed on the semiconductor pattern 109 and the lower material layer 120 of the data pad. The process is performed by patterning the semiconductor layer and the ohmic contact layer 110 deposited on the gate insulating layer 107 using a photolithography technique. In this case, the ohmic contact layer 110 may serve to allow the source and drain electrodes (111a and 111b of FIG. 2) to be described later to make ohmic contact with the semiconductor pattern 109.

As a next step, as shown in FIG. 3C, source and drain electrodes 111a and 111b and a data pad 119 are formed on a substrate including the ohmic contact layer 110. The process is performed by forming a metal layer on the substrate including the ohmic contact layer 110 and patterning the metal layer to overlap a predetermined portion of the semiconductor pattern 119 by using photolithography. In this case, the ohmic contact layer 110 existing between the source and drain electrodes 111a and 111b is also etched and separated (that is, separated into 109a and 109b) and a channel region may be formed in the semiconductor pattern 109. Should be available.

Through this process, a thin film transistor including the gate electrode 103, the semiconductor pattern 109, the source and drain electrodes 111a and 111b is completed.

In the next step, an interlayer insulating layer 113 is formed on a substrate including the source and drain electrodes 111a and 111b as shown in FIG. 3D, and the photolithography technique is used to form the interlayer insulating layer 113. The contact hole 127a is formed to expose a portion. At this time, when the contact hole 127a is formed, the interlayer insulating layer 113 or the interlayer insulating layer 113 and the gate insulating layer 107 formed on the gate pad 117 and the data pad 119 are patterned to form a gate pad. Contact holes 127b and 127c are also formed on the 117 and the data pad 119.

As a final step, indium tin oxide (ITO) or tin oxide (ITO) is formed on the interlayer insulating layer 113 on which the contact holes (127a, 127b, and 127c of FIG. 3d) are formed, as shown in FIG. A transparent conductive layer, such as tin oxide (TO), is deposited, and the pixel electrode 115 is formed in the pixel region using a photolithography technique. The pixel electrode 115 is electrically connected to the drain electrode 111b through a contact hole (127a in FIG. 3D) formed on the interlayer insulating layer 113. The transparent conductive layers 117a and 117b are also patterned on the gate pad 117 and the data pad 119.

Meanwhile, although not shown in the drawings, a color filter layer, a common electrode, and the like are formed on the color filter substrate, and the thin film transistor array substrate is bonded to each other, and then the liquid crystal layer is filled therebetween to complete the liquid crystal panel of the liquid crystal display device.

As described above, in the manufacturing process of the liquid crystal display device according to the prior art, the photolithography technique is used in the gate electrode formation, the semiconductor layer formation, the source / drain electrode formation, the contact hole formation and the pixel electrode formation step, respectively.

However, the process using the photolithography technique is expensive, the process is complicated, the yield management is difficult, and excessive environmental harmful substances are emitted from the etching process during the manufacturing process.

Therefore, in the method of manufacturing a liquid crystal display device according to the prior art, five photomasks are used as described above, resulting in excessive manufacturing costs and difficulty in yield management.

The present invention has been made to solve the above problems, and an object thereof is to reduce the number of photomasks used in the manufacturing process of a thin film transistor array substrate of a liquid crystal display device.

The liquid crystal display according to the present invention has a structure in which a part of the active layer under the interlayer insulating layer is exposed to the outside.

In the manufacturing process for forming the structure of the liquid crystal display device, when forming a contact hole for electrically connecting the pixel electrode to the drain electrode, the metal layer to form the source and drain electrodes is separated into the source electrode and the drain electrode. .

An object of the present invention is to manufacture a thin film transistor array substrate using four photomasks through a manufacturing process including the above features.

The structure of the thin film transistor array substrate of the liquid crystal display device of the present invention for achieving the above object comprises a gate wiring and a data wiring disposed on the substrate to define a plurality of pixels; A gate electrode formed on the substrate; A gate insulating layer formed on the substrate including the gate electrode; A semiconductor pattern formed on the gate insulating layer; Source and drain electrodes formed on the semiconductor pattern; An interlayer insulating layer formed on the substrate including the source and drain electrodes, wherein a portion formed on the channel region of the semiconductor pattern is patterned; And a contact hole formed in the interlayer insulating layer, and a pixel electrode electrically connected to the drain electrode through the contact hole.

The structure of the thin film transistor array substrate according to the present invention will be described with reference to FIGS. 4 and 5 as follows.

4 is a plan view illustrating a unit pixel of a thin film transistor array substrate according to an exemplary embodiment of the present invention, and FIG. 5 is a cross-sectional view illustrating a cutting line AA ′ of FIG. 4.

First, referring to FIG. 4, the data line 223 and the gate line 221 are arranged in a vertical direction, and the storage line 225 is arranged in a direction parallel to the gate line 221.

A gate electrode 203 electrically connected to the gate wiring 221, a source electrode 211a electrically connected to the data wiring 223, and a drain electrode 211b corresponding to the source electrode are formed to form a thin film transistor. Is formed.

In addition, a pixel electrode 215 electrically connected to the drain electrode 211b and the contact hole 227a is widely formed in the display area, and the storage electrode 205 is formed to overlap the pixel electrode 215. It is connected to the wiring 225.

Subsequent to the planar structure, the cross-sectional structure thereof will be described in detail with reference to FIG. 5. A gate electrode 203 made of a metal layer is formed on a transparent insulating substrate such as a glass plate.

A gate insulating layer 207 made of silicon oxide (SiO 2) or silicon nitride (SiN x) is formed on the substrate including the gate electrode 203.

Subsequently, an amorphous silicon patterned in a predetermined shape is formed on the gate insulating layer 207 to form an active layer 209. In this case, an ohmic contact layer 209a formed of amorphous silicon doped with impurities is formed on the active layer, and the ohmic contact layer 209a includes the active layer 209 and the source and drain electrodes 211a and 211b to be described later. ohmic contact).

Source and drain electrodes 211a and 211b formed of a metal layer are formed on a predetermined portion of the ohmic contact layer 209a. As a result, a thin film transistor including the gate electrode 203, the active layer 209, the ohmic contact layer 209a, the source electrode 211a, and the drain electrode 211b is completed.

Next, the remaining components constituting the unit pixel of the thin film transistor array substrate will be described. An interlayer insulating layer 213 is formed on the substrate including the source and drain electrodes 211a and 211b and is formed on the interlayer insulating layer 213. Contact holes are formed.

Indium tin oxide (ITO) or tin oxide on the interlayer insulating layer 213 is electrically connected to the drain electrode 211b through the contact hole and patterned in a predetermined shape in the display area of a unit pixel. A pixel electrode 215 made of a transparent conductor such as (TO: Tin Oxide) is formed.

In this case, the interlayer insulating layer 213 is patterned in such a manner that the channel region of the active layer 209 is removed, which will be explained in the method of manufacturing the liquid crystal display of the present invention. Although not shown in the drawing, although the interlayer insulating layer 213 is not formed on the active layer 209, an oxide film having a thickness of about 300 to 500 Å is formed on the active layer 209.

Additionally, optional components of the present invention include storage wiring 225 and storage electrode 205. The storage wiring 225 and the storage electrode 205 exist on the same stacked structure as the gate electrode 203, and the storage signal supplied through an external drive IC is transferred to the storage electrode 205 through the storage wiring 225. Is authorized. The storage electrode 205 serves to provide storage capacitance necessary to keep the voltage variation of the pixel electrode 215 smaller than a predetermined value.

In addition, although the structure of the thin film transistor array substrate constituting the vertical field type liquid crystal display device has been described above, the present invention may be applied to a horizontal field type liquid crystal display device. In this case, the common electrode may be formed on the same stacked structure as the gate electrode or on the same stacked structure as the pixel electrode.

The thin film transistor array substrate formed as described above is bonded to a color filter substrate including a color filter pattern, a black matrix, and the like, and the liquid crystal is filled therebetween to complete the liquid crystal panel.

Following the description of the structure of the liquid crystal display device according to the present invention described above, the manufacturing method of the liquid crystal display device will be described in detail through a preferred embodiment as follows.

6A to 6D are cross-sectional views of process steps illustrating a method of manufacturing a liquid crystal display device according to the preferred embodiment.

In the first step, as shown in FIG. 6A, a gate electrode 203 and a storage electrode 205 made of a metal layer are formed on a substrate 201 made of a transparent insulating material such as glass. In this case, a gate pad 217 electrically connected to the gate electrode 203 is also formed at an outer portion of the substrate.

The process is performed through a patterning process using a photolithography technique by depositing a metal layer, such as an aluminum (Al) layer or molybdenum (Mo) or a double layer of aluminum (Al) and molybdenum (Mo) on the insulating substrate 201.

In the next step, as shown in FIG. 6B, a gate insulating layer 207 is formed on a substrate including the gate electrode 203 and the storage electrode 205, and the semiconductor layers 209 and 210 are formed thereon. A metal layer pattern 212 for forming source and drain electrodes is formed. In this case, a data pad 219 is connected to the data line 223 of FIG. 4 to supply an external signal.

The gate insulating layer 207 may be deposited by low pressure chemical vapor deposition (LPCVD) or plasma enhanced chemical vapor deposition (PECVD). The semiconductor layers 209 and 210 and the metal layer 212 are deposited on the gate insulating layer 207, and a predetermined pattern is formed through a patterning process using a photolithography technique. In this case, the semiconductor layers 209 and 210 may be formed of a double layer of a pure amorphous silicon layer and an amorphous silicon layer doped with impurities, and the pure amorphous silicon layer forms the active layer 209 after the patterning, and the impurities are doped The amorphous silicon layer thus formed forms an ohmic contact layer (209a in FIG. 5).

However, until the process illustrated in FIG. 6B, the source electrode and the drain electrode (211a and 211b of FIG. 5) are not yet separated from each other, and the two electrodes are separated when the pixel electrode (215 of FIG. 5) to be described later is formed. do.

In the next step, as shown in FIG. 6C, an interlayer insulating layer 213 is deposited on a substrate including a metal layer 212 on which the source and drain electrodes are to be formed, and the interlayer insulating layer 213 and the gate insulation are formed. Predetermined patterning, including contact holes 227a, 227b, and 227c, is made to layer 207.

The patterning process is performed by using a photolithography technique, and the contact hole 227a formed on the metal layer 212 to form the drain electrode of the interlayer insulating layer 213 may be a part of the drain electrode (211b of FIG. 5). The exposed pixel electrode 215 of FIG. 5 serves to electrically connect the drain electrode 211b of FIG. 5. In addition, the contact holes 227b and 227c formed on the gate pad 217 and the data pad 219 of the interlayer insulating layer 213, the gate insulating layer 207, and the pixel electrode (215 of FIG. 5) will be described later. This is to form the gate pad terminal (217a in FIG. 5) and the terminal (219b in FIG. 5) of the data pad in the forming step.

At this time, when the contact holes 227a, 227b, and 227c are formed using the photolithography technique, additional patterning is performed on the interlayer insulating layer 213. The additional patterning is to separate the source electrode and the drain electrode in a subsequent process, and is performed by removing the interlayer insulating layer 213 on the channel region of the active layer 209. As a result, after the process, a portion of the metal layer 212, the data pad 219, and the gate pad 217 to form the drain electrode through the contact holes 227a, 227b and 227c and the additional patterning are formed. Exposed to the outside.

In this case, the patterning process is performed by using a single photolithography technique. In order to expose the metal layer 212 and the data pad 219 to form the source and drain electrodes, only the interlayer insulating layer 213 may be removed. In addition to the interlayer insulating layer 213, the gate insulating layer 207 may also be removed to expose the pad 217. The process may be performed by using a selectivity ratio for the etch material in the etching process, but despite the selectivity, the metal layer 212 and the data pad 219 on the metal layer to form the source and drain electrodes are partially formed. Etching can occur.

As shown in FIG. 6D, the pixel electrode 215, the gate pad terminal 217a, and the data pad terminal 219a are formed on the interlayer insulating layer 213 on which the predetermined patterning is performed, as shown in FIG. 6D.

The process is performed by depositing a transparent conductive layer such as indium tin oxide (ITO) or tin oxide (TO: Tin Oxide) on the interlayer insulating layer 213 through a predetermined patterning process using a photolithography technique. After the patterning, the pixel electrode 215 is formed on a portion of the display area of the unit pixel, and the gate pad terminal 217a and the data pad terminal 219a are formed on the gate pad 217 and the data pad 219.

As a final step, as shown in FIG. 6E, the metal layer (212 of FIG. 6D) and the ohmic contact layer (210 of FIG. 6D) to form the source and drain electrodes are patterned to form the source and drain electrodes 211a and 211b. To form. Although not shown in the figure, the process is performed using a photoresist pattern for forming the pixel electrode 215 or the like. That is, the process is continuously performed before the step of removing the photoresist pattern used for forming the pixel electrode 215 and the like.

Subsequently, after the source and drain electrodes 211a and 211b are formed, an oxygen (O 2) plasma process is performed on the entire substrate. The oxygen plasma treatment process is to protect the active layer 209 exposed to the outside, and although not shown in the drawing, an oxide film having a thickness of about 300 to 500 Å is formed on the active layer 209.

In the above description, the manufacturing method of the horizontal field type liquid crystal display device has been described, but the present invention can be applied to the manufacture of the vertical field type liquid crystal display device. In this case, the common electrode or the pixel electrode may be formed in the step of forming the gate electrode. Forming a common electrode in the forming step.

The thin film transistor array substrate completed through the above process is bonded to a color filter substrate including a color filter pattern, a black matrix, and the like, and a liquid crystal panel is formed to fill the liquid crystal therebetween to form the liquid crystal display device of the present invention. Is completed.

The above-described method for manufacturing a thin film transistor array substrate includes a method of forming a gate electrode and a storage electrode, forming a metal layer to form a semiconductor layer, a source and a drain electrode, patterning an interlayer insulating layer, and forming a pixel electrode. Photolithography is applied. Therefore, the entire manufacturing process may be performed using four photomasks, thereby reducing the number of photomasks.

Many details are set forth in the foregoing description but should be construed as illustrative of preferred embodiments rather than to limit the scope of the invention. Therefore, the invention should not be defined by the described embodiments, but should be defined by the claims and their equivalents.

As described above, the thin film transistor array substrate of the liquid crystal display device according to the present invention has a structure in which a part of the active layer under the interlayer insulating layer is exposed to the outside.

In the method of manufacturing the thin film transistor array substrate according to the present invention, in the step of forming a contact hole in the interlayer insulating layer so as to electrically connect the pixel electrode with the drain electrode, the metal layer for forming the source and drain electrodes is simultaneously patterned.

According to the above features, the manufacturing method of the thin film transistor array substrate of the present invention can proceed the entire process using four photomasks, it is possible to reduce the manufacturing cost of the liquid crystal display device and to easily manage the production yield That has a beneficial effect.

Claims (11)

A gate wiring and a data wiring disposed on the substrate to define a plurality of pixels; A gate electrode formed on the substrate; A gate insulating layer formed on the substrate including the gate electrode; A semiconductor pattern formed on the gate insulating layer; Source and drain electrodes formed on the semiconductor pattern; An interlayer insulating layer formed on the substrate including the source and drain electrodes, wherein a portion formed on the channel region of the semiconductor pattern is patterned; And And a contact hole formed in the interlayer insulating layer, and a pixel electrode electrically connected to the drain electrode through the contact hole. The method of claim 1, And a storage wiring and a storage electrode formed on the same stacked structure as the gate electrode formed on the substrate. The method of claim 1, The semiconductor pattern, And a pure semiconductor layer and an impurity doped semiconductor layer are sequentially stacked, and wherein the impurity doped semiconductor layer is patterned on top of a channel region. The method of claim 3, wherein The pure semiconductor layer, A liquid crystal display device, characterized in that an oxide film is formed over the channel region. The method according to any one of claims 1 to 4, The liquid crystal display device includes a common electrode, and the common electrode is formed on a substrate including a pixel electrode. Forming a gate electrode on the substrate; Forming a gate insulating layer on the substrate including the gate electrode; Sequentially stacking a semiconductor layer and a conductive layer for forming a source and a drain electrode on the gate insulating layer; Patterning the semiconductor layer and the conductive layer which will constitute the source and drain electrodes together in a predetermined form; Forming an interlayer insulating layer on the substrate including the semiconductor layer and a conductive layer constituting the source and drain electrodes; Forming a contact hole to be connected to the drain electrode, the gate pad, and the data pad in the interlayer insulating layer, and removing and patterning the interlayer insulating layer formed on the channel region of the semiconductor layer; Forming a transparent conductive layer on the interlayer insulating layer and forming a pixel electrode, a gate pad terminal, and a data pad terminal through a predetermined patterning process; And And forming a source and a drain electrode by removing a portion of the conductive layer and the semiconductor layer, which will constitute the source and drain electrodes, formed on the channel region of the semiconductor layer. The method of claim 6, In the manufacture of the liquid crystal display device, the method comprising the step of forming an oxide film on the semiconductor layer of the channel region by treating the substrate on which the source and drain electrodes are formed with oxygen (O2) plasma. Way. The method of claim 6, The semiconductor layer includes a pure semiconductor layer and a semiconductor layer doped with impurities, and a process of forming a source and a drain electrode by removing a portion of the semiconductor layer removes the semiconductor layer doped with impurities. Method of manufacturing the device. The method of claim 6, And forming a storage electrode simultaneously with forming the gate electrode. The method according to any one of claims 6 to 9, In the step of forming a gate electrode on the substrate, A method of manufacturing a liquid crystal display device, comprising forming a common electrode together. The method according to any one of claims 6 to 9, In the step of forming a transparent conductive layer on the interlayer insulating layer, and forming a pixel electrode, a gate pad terminal and a data pad terminal through a predetermined patterning process, A method of manufacturing a liquid crystal display device, comprising forming a common electrode together.

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