KR20070063376A - Liquid crystal display - Google Patents

Abstract

An LCD(Liquid Crystal Display) is provided to maximize aperture ratio and transmittance, and prevent texture defect from being generated between pixel electrodes, thereby improving the display quality. An LCD comprises a substrate, gate lines(121) formed above the substrate, data lines(171) crossing the gate lines, and a plurality of pixel electrodes(191). Each of the pixel electrodes includes a plurality of electrode elements, wherein each of the electrode elements has at least one oblique side forming an oblique angle with respect to the adjacent gate line. Respective electrode elements of neighboring pixel electrodes are arranged alternately with each other in a column direction.

Description

Liquid crystal display {LIQUID CRYSTAL DISPLAY}

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

2 is an equivalent circuit diagram of one pixel of a liquid crystal display according to an exemplary embodiment of the present invention.

3 is a layout view of a liquid crystal panel assembly according to an exemplary embodiment of the present invention.

4 and 5 are cross-sectional views of the liquid crystal panel assembly of FIG. 3 taken along lines IV-IV and V-V, respectively.

6 is a plan view illustrating a pixel electrode of a liquid crystal panel assembly according to an exemplary embodiment of the present invention.

7 is a layout view of a liquid crystal panel assembly according to another exemplary embodiment of the present invention.

<Description of Drawing>

81, 82: contact auxiliary members 91a-91e, 92a-92e: pixel electrode cutouts

100: transistor display panel 110, 210: substrate

121: gate line 124: gate electrode

140: gate insulating film 154: semiconductor

163 and 165: ohmic contact 171: data line

173: source electrode 175: drain electrode

180: protective film 185: contact hole

191R, 191G, 191B: pixel electrode

200: color filter display plate 220: light blocking member

230: color filter 270: common electrode

300: liquid crystal panel assembly 400: gate driver

500: data driver 600: signal controller

800: gray voltage generator

The present invention relates to a liquid crystal display device.

The liquid crystal display is one of the most widely used flat panel display devices, and includes two display panels on which an electric field generating electrode such as a pixel electrode and a common electrode are formed, and a liquid crystal layer interposed therebetween. The liquid crystal display generates an electric field in the liquid crystal layer by applying a voltage to the field generating electrode, thereby determining an orientation of liquid crystal molecules in the liquid crystal layer and controlling the polarization of incident light to display an image.

The liquid crystal display also includes a switching element connected to each pixel electrode and a plurality of signal lines such as a gate line and a data line for controlling the switching element and applying a voltage to the pixel electrode.

Among such liquid crystal display devices, a liquid crystal display device having a vertically aligned mode in which the long axis of the liquid crystal molecules is arranged perpendicular to the upper and lower display panels without an electric field applied to the liquid crystal display device is attracting attention due to its large contrast ratio and wide reference viewing angle. . Here, the reference viewing angle refers to a viewing angle having a contrast ratio of 1:10 or a luminance inversion limit angle between gray levels.

Specific methods for implementing a wide reference viewing angle in a vertical alignment liquid crystal display include a method of forming an incision in the field generating electrode and a method of forming protrusions on or under the field generating electrode. Since the cutout and the protrusion determine the tilt direction of the liquid crystal molecules, the reference viewing angle can be widened by appropriately arranging them to disperse the inclined directions of the liquid crystal molecules in various directions.

By the way, the incision or the projection lowers the aperture ratio. In order to increase the aperture ratio, an ultra-high opening ratio structure is proposed in which the pixel electrode is formed as wide as possible, but in this case, the distance between the pixel electrodes is close, so that a strong lateral field is formed between the pixel electrodes. This lateral electric field disturbs the orientation of the liquid crystal molecules, resulting in texture or light leakage.

In addition, the liquid crystal display of the vertical alignment mode is less lateral visibility than the front visibility. For example, in the case of a patterned vertically aligned (PVA) -type liquid crystal display having an incision, the image becomes brighter toward the side, and in severe cases, the luminance difference between the high grays disappears and the picture may appear clumped. .

Accordingly, the technical problem to be achieved by the present invention is to provide an electrode arrangement that improves the aperture ratio and transmittance by reducing the loss caused by texture.

A liquid crystal display according to an exemplary embodiment of the present invention includes a plurality of electrode pieces each having a substrate, a gate line formed on the substrate, a data line crossing the gate line, and at least one hypotenuse that forms an oblique angle with the gate line. A plurality of pixel electrodes are included, and electrode pieces of neighboring pixel electrodes among the plurality of pixel electrodes are alternately arranged in a column direction.

An electrode piece of the pixel electrode may include at least one side parallel to the data line.

At least one electrode piece of the plurality of electrode pieces may include a side parallel to the gate line.

The pixel electrode may have left and right inverted symmetry around the data line.

Two adjacent pixel electrodes of the plurality of pixel electrodes may be inverted vertically.

At least one of the plurality of pixel electrodes may include a first portion including two pairs of sides parallel to the gate line and the data line and including an inclination direction determining member.

The inclination direction determining member may include an incision formed at an angle of 90 ° with the hypotenuse.

The first portion may be formed on the right or left side of the data line.

The hypotenuse angle formed by the hypotenuse with the gate line may be 45 °.

The display device may further include a thin film transistor connected to the pixel electrode, the gate line, and the data line.

The display device may further include an organic layer formed between the pixel electrode and the data line.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like parts are designated by like reference numerals throughout the specification. When a part of a layer, film, region, plate, etc. is said to be "on" another part, this includes not only the other part being "right over" but also another part in the middle. On the contrary, when a part is "just above" another part, there is no other part in the middle.

First, a liquid crystal display according to an exemplary embodiment of the present invention will be described in detail with reference to FIGS. 1 and 2.

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 2 is an equivalent circuit diagram of one pixel of the liquid crystal display according to an exemplary embodiment of the present invention.

As shown in FIG. 1, a liquid crystal display according to an exemplary embodiment of the present invention includes a liquid crystal panel assembly 300, a gate driver 400, a data driver 500, and a data driver 500 connected thereto. The gray voltage generator 800 connected to the signal generator 500 and a signal controller 600 for controlling the gray voltage generator 800 are included.

The liquid crystal panel assembly 300 includes a plurality of signal lines (not shown) and a plurality of pixels PX connected to the plurality of signal lines (not shown) and arranged in a substantially matrix form when viewed in an equivalent circuit. On the other hand, in the structure shown in FIG. 2, the liquid crystal panel assembly 300 includes lower and upper panels 100 and 200 facing each other and a liquid crystal layer 3 interposed therebetween.

The signal line includes a plurality of gate lines for transmitting a gate signal (also called a "scan signal") and a plurality of data lines for transmitting a data signal. The gate lines extend substantially in the row direction and are substantially parallel to each other, and the data lines extend substantially in the column direction and are substantially parallel to each other.

Each pixel PX, for example, a pixel connected to an i-th (i = 1, 2, ..., n) gate line GL and a j-th (j = 1, 2, ..., m) data line DL ( PX includes a switching element Q connected to the signal lines GL and DL, a liquid crystal capacitor Clc, and a storage capacitor Cst connected thereto. Holding capacitor Cst can be omitted as needed.

The switching element Q is a three-terminal element of a thin film transistor or the like provided in the lower panel 100. The control terminal is connected to the gate line GL, and the input terminal is connected to the data line DL. The output terminal is connected to the liquid crystal capacitor Clc and the storage capacitor Cst.

The liquid crystal capacitor Clc has two terminals, the pixel electrode 191 of the lower panel 100 and the common electrode 270 of the upper panel 200, and the liquid crystal layer 3 between the two electrodes 191 and 270 is a dielectric material. Function as. The pixel electrode 191 is connected to the switching element Q, and the common electrode 270 is formed on the front surface of the upper panel 200 and receives the common voltage Vcom. Unlike in FIG. 2, the common electrode 270 may be provided in the lower panel 100. In this case, at least one of the two electrodes 191 and 270 may be formed in a linear or bar shape.

The storage capacitor Cst, which serves as an auxiliary part of the liquid crystal capacitor Clc, is formed by overlapping a separate signal line (not shown) and the pixel electrode 191 provided on the lower panel 100 with an insulator interposed therebetween. A predetermined voltage such as the common voltage Vcom is applied to the separate signal line. However, the storage capacitor Cst may be formed such that the pixel electrode 191 overlaps the front gate line directly above the insulator.

On the other hand, in order to implement color display, each pixel PX uniquely displays one of the primary colors (spatial division) or each pixel PX alternately displays the primary colors over time (time division). The desired color is recognized by the spatial and temporal sum of these primary colors. Examples of the primary colors include three primary colors such as red, green, and blue. 2 illustrates that each pixel PX includes a color filter 230 representing one of the primary colors in an area of the upper panel 200 corresponding to the pixel electrode 191 as an example of spatial division. . Unlike FIG. 2, the color filter 230 may be formed above or below the pixel electrode 191 of the lower panel 100.

At least one polarizer (not shown) for polarizing light is attached to an outer surface of the liquid crystal panel assembly 300.

Referring back to FIG. 1, the gray voltage generator 800 generates two sets of gray voltage sets (or reference gray voltage sets) related to the transmittance of the pixel PX. One of the two sets has a positive value for the common voltage Vcom and the other set has a negative value.

The gate driver 400 is connected to the gate line GL of the liquid crystal panel assembly 300 to apply a gate signal formed of a combination of the gate on voltage Von and the gate off voltage Voff to the gate line GL.

The data driver 500 is connected to the data line DL of the liquid crystal panel assembly 300, selects a gray voltage from the gray voltage generator 800, and applies the gray voltage to the data line DL as a data signal. However, when the gray voltage generator 800 provides only a predetermined number of reference gray voltages instead of providing all of the voltages for all grays, the data driver 500 divides the reference gray voltages to divide the gray voltages for all grays. Generate and select the data signal from it.

The signal controller 600 controls the gate driver 400, the data driver 500, and the like.

Each of the driving devices 400, 500, 600, and 800 may be mounted directly on the liquid crystal panel assembly 300 in the form of at least one integrated circuit chip, or may be a flexible printed circuit film (not shown). It may be mounted on the liquid crystal panel assembly 300 in the form of a tape carrier package (TCP) or mounted on a separate printed circuit board (not shown). Alternatively, these driving devices 400, 500, 600, and 800 may be integrated in the liquid crystal panel assembly 300 together with the signal lines G ₁ -G _n , D ₁ -D _m and the thin film transistor switching element Q. It may be. In addition, the driving devices 400, 500, 600, and 800 may be integrated into a single chip, in which case at least one of them or at least one circuit element constituting them may be outside the single chip.

An example of such a liquid crystal panel assembly will now be described in detail with reference to FIGS. 3 to 6 and FIGS. 1 and 2.

3 is a layout view of a liquid crystal panel assembly according to an exemplary embodiment of the present invention. FIGS. 4 and 5 are cross-sectional views of the liquid crystal panel assembly of FIG. 3 taken along lines IV-IV and V-V, respectively. Is a plan view showing a pixel electrode according to an embodiment of the present invention.

3 to 5, a liquid crystal display according to an exemplary embodiment of the present invention includes a thin film transistor array panel 100 and a common electrode panel 200 facing each other and between the two display panels 100 and 200. The liquid crystal layer 3 is included.

First, the lower panel 100 will be described.

A plurality of gate lines 121 are formed on an insulating substrate 110 made of transparent glass or plastic.

The gate line 121 transmits a gate signal and mainly extends in a horizontal direction. Each gate line 121 includes a plurality of gate electrodes 124 protruding upwards and a wide end portion 129 for connection with another layer or an external driving circuit. When the gate driving circuit 400 is integrated on the substrate 110, the gate line 121 may extend to be directly connected to the gate driving circuit 400.

The gate line 121 may be formed of aluminum-based metal such as aluminum (Al) or aluminum alloy, silver-based metal such as silver (Ag) or silver alloy, copper-based metal such as copper (Cu) or copper alloy, molybdenum (Mo) or molybdenum alloy, etc. It may be made of molybdenum-based metal, chromium (Cr), tantalum (Ta) and titanium (Ti). However, they may have a multilayer structure including two conductive films (not shown) having different physical properties. One of the conductive films is made of a metal having low resistivity, such as aluminum-based metal, silver-based metal, or copper-based metal, so as to reduce signal delay or voltage drop. In contrast, other conductive films are made of other materials, particularly materials having excellent physical, chemical, and electrical contact properties with indium tin oxide (ITO) and indium zinc oxide (IZO), such as molybdenum-based metals, chromium, tantalum, and titanium. Good examples of such a combination include a chromium bottom film, an aluminum (alloy) top film, and an aluminum (alloy) bottom film and a molybdenum (alloy) top film. However, the gate line 121 may be made of various other metals or conductors.

The side surface of the gate line 121 is inclined with respect to the surface of the substrate 110, and the inclination angle is preferably about 30 ° to about 80 °.

A gate insulating layer 140 made of silicon nitride (SiNx) or silicon oxide (SiOx) is formed on the gate line 121.

On the gate insulating layer 140, a plurality of island semiconductors 154 made of hydrogenated amorphous silicon (amorphous silicon is abbreviated as a-Si), polycrystalline silicon, or the like are formed. The island semiconductor 154 is positioned over the gate electrode 124.

A pair of island-like ohmic contacts 163 and 165 are formed on the semiconductor 154. The ohmic contacts 163 and 165 may be made of a material such as n + hydrogenated amorphous silicon in which n-type impurities such as phosphorus are heavily doped, or may be made of silicide.

Side surfaces of the semiconductor 154 and the ohmic contacts 163 and 165 are also inclined with respect to the surface of the substrate 110, and the inclination angle is about 30 ° to 80 °.

A data conductor including a plurality of data lines 171 and a plurality of drain electrodes 175 is formed on the ohmic contacts 163 and 165 and the gate insulating layer 140.

The data line 171 transmits a data signal and mainly extends in the vertical direction to cross the gate line 121. Each data line 171 has a wide end portion 179 for connection between a plurality of pairs of source electrodes 173 extending toward the gate electrode 124 and another layer or data driver 500. It includes. When the data driver 500 is integrated on the substrate 110, the data line 171 may extend to be directly connected to the data driver 500.

The drain electrode 175 is separated from the data line 171 and faces the source electrode 173 around the gate electrode 124.

One gate electrode 124, one source electrode 173, and one drain electrode 175 together with the semiconductor 154 form one thin film transistor (TFT), and a channel of the thin film transistor. ) Is formed in the semiconductor 154 between the source electrode 173 and the drain electrode 175.

The data conductors 171 and 175 are preferably made of a refractory metal such as molybdenum, chromium, tantalum and titanium, or an alloy thereof, and a refractory metal film (not shown) and a low resistance conductive film (not shown). It may have a multi-layer structure including). Examples of the multilayer structure include a double layer of chromium or molybdenum (alloy) lower layer and an aluminum (alloy) upper layer, and a triple layer of molybdenum (alloy) lower layer and aluminum (alloy) interlayer and molybdenum (alloy) upper layer. However, the data conductors 171 and 175 may be made of various other metals or conductors.

In addition, the data conductors 171 and 175 may be inclined at an inclination angle of about 30 ° to about 80 ° with respect to the surface of the substrate 110.

The ohmic contacts 163 and 165 exist only between the semiconductor 154 below and the data conductors 171 and 175 thereon, and lower the contact resistance therebetween. The semiconductor 154 may be exposed between the source electrode 173 and the drain electrode 175 without being blocked by the data conductors 171 and 175.

A passivation layer 180 is formed on the data conductors 171 and 175 and the exposed portion of the semiconductor 154. The passivation layer 180 may be made of an inorganic insulator or an organic insulator, and may have a flat surface. The organic insulator preferably has a dielectric constant of 4.0 or less, and may have photosensitivity. However, the passivation layer 180 may have a double layer structure of the lower inorganic layer and the upper organic layer so as not to damage the exposed portion of the semiconductor 154 while maintaining excellent insulating properties of the organic layer.

The passivation layer 180 is provided with a plurality of contact holes 182 and 185 respectively exposing the end portion 179 of the data line 171 and the end portions of the first and second drain electrodes 175. In the passivation layer 180 and the gate insulating layer 140, a plurality of contact holes 181 exposing the end portions 129 of the gate line 121 are formed.

A plurality of pixel electrodes 191 and a plurality of contact assistants 81 and 82 are formed on the passivation layer 180. They may be made of a transparent conductive material such as ITO or IZO or a reflective metal such as aluminum, silver, chromium or an alloy thereof.

The pixel electrode 191 is formed on the lower panel 100 and faces the color filter CF representing one of three primary colors, for example, a primary color, for example, red (R), green (G), and blue (B). . Accordingly, the pixel electrode 191 may include the first pixel electrode 191R facing the red color filter, the second pixel electrode 191G facing the green color filter, and the third pixel electrode 191B facing the blue color filter. Include.

Next, the shape of each pixel electrode 191 according to the present exemplary embodiment will be described with reference to FIG. 6.

Referring to FIG. 6, the pixel electrode 191 has left-right reverse symmetry based on the vertical center line. Referring to one portion of the pixel electrode 191 based on the vertical center line, first, second and third electrode pieces 196a, 197a, and 198a having different shapes are formed.

Each electrode piece 196a, 197a, 198a includes at least one hypotenuse. That is, the first and second electrode pieces 196a and 197a have a pair of parallel hypotenuses, and the third electrode piece 198a has one hypotenuse. Each hypotenuse is parallel to each other, and forms an oblique angle of about 45 ° with the gate line 121.

The three electrode pieces 196a, 197a, and 198a form left-right inverted symmetry with the other three electrode pieces 196b, 197b, and 198b facing each other with respect to the longitudinal center line, thereby forming an overall "V" shape. The angle formed by each hypotenuse of each pair of electrode pieces 196a, 196b / 197a, 197b / 198a, and 198b facing each other is approximately 90 degrees.

The first electrode piece 196a has a horizontal side parallel to the gate line 121 and a vertical side parallel to the data line 171, and the second electrode piece 197a has a vertical side parallel to the data line 171. The third electrode piece 198a has a horizontal side parallel to the gate line 121 and a vertical side parallel to the data line 171.

By taking such a configuration, the horizontal length of one electrode piece can be lengthened. In addition, since the lateral field induced by the hypotenuse of the electrode piece can be used, the length between two hypotenuses in one electrode piece can be further increased. Therefore, the aperture ratio can be increased.

The first to third electrode pieces 196a, 197a, and 198a are connected to each other, and the first and second electrode pieces 196a and 197a respectively face the electrode pieces 196b and 197b and the connection legs 193a and 193b. ) Is connected. That is, all six electrode pieces 196a, 196b, 197a, 197b, 198a, and 198b are connected.

Referring back to FIG. 3, neighboring pixel electrodes 191R, 191G / 191G, and 191B are vertically inverted from each other, and electrode pieces of each pixel electrode are alternately arranged in a column direction. That is, the right portion of the first pixel electrode 191R, the second pixel electrode 191G, and the left portion of the third pixel electrode 191B together form a rectangle.

On the other hand, the data line 171 extends across the vertical center line of each pixel electrode 191 to bisect each pixel electrode.

The pixel electrode 191 is physically and electrically connected to the drain electrode 175 through the contact hole 185 and receives a data voltage from the drain electrode 175. The pixel electrode 191 to which the data voltage is applied is formed between the two electrodes 191 and 270 by generating an electric field together with the common electrode 270 of the common electrode display panel 200 to which the common voltage is applied. The direction of the liquid crystal molecules 31 of the liquid crystal layer 3 is determined. The polarization of light passing through the liquid crystal layer 3 varies according to the direction of the liquid crystal molecules 31 determined as described above. The pixel electrode 191 and the common electrode 270 form a capacitor (hereinafter, referred to as a "liquid crystal capacitor") to maintain an applied voltage even after the thin film transistor is turned off.

The contact auxiliary members 81 and 82 are connected to the end portion 129 of the gate line 121 and the end portion 179 of the data line 171 through the contact holes 181 and 182, respectively. The contact auxiliary members 81 and 82 compensate for and protect the adhesion between the end portion 129 of the gate line 121 and the end portion 179 of the data line 171 and the external device.

Next, the upper panel 200 will be described.

A light blocking member 220 is formed on an insulating substrate 210 made of transparent glass, plastic, or the like. The light blocking member 220 may include a bent portion (not shown) corresponding to the curved side of the pixel electrode 191 and a rectangular portion (not shown) corresponding to the thin film transistor, and include light leakage between the pixel electrodes 191. And an opening region facing the pixel electrode 191 is defined.

A plurality of color filters 230 is also formed on the substrate 210 and the light blocking member 220. The color filter 230 is mostly present in an area surrounded by the light blocking member 220, and may extend long along the column of pixel electrodes 191. Each color filter 230 may display one of primary colors such as three primary colors of red, green, and blue.

An overcoat 250 is formed on the color filter 230 and the light blocking member 220. The overcoat 250 may be made of an organic insulator, and may prevent the color filter 230 from being exposed and provide a flat surface. The overcoat 250 may be omitted.

The common electrode 270 is formed on the overcoat 250. The common electrode 270 is made of a transparent conductor such as ITO or IZO, and may have a plurality of cutouts (not shown).

Alignment layers 11 and 21 are formed on inner surfaces of the display panels 100 and 200, and they may be vertical alignment layers.

Polarizers 12 and 22 are provided on the outer surfaces of the display panels 100 and 200, and the polarization axes of the two polarizers are orthogonal to each other, and the angles of the polarities of the pixel electrodes 191 are approximately 45 °. . In the case of a reflective liquid crystal display, one of two polarizers may be omitted.

The liquid crystal display may include a polarizer 12 and 22, a phase retardation film, display panels 100 and 200, and a backlight unit (not shown) for supplying light to the liquid crystal layer 3.

The liquid crystal layer 3 has negative dielectric anisotropy, and the liquid crystal molecules of the liquid crystal layer 3 are aligned such that their major axes are perpendicular to the surfaces of the two display panels in the absence of an electric field.

On the other hand, in the above description, one pixel electrode 191 per pixel is described, and one data line 171, one gate line 121, and one thin film transistor are formed in the pixel electrode. It is not limited to this. That is, the pixel electrode 191 per pixel may include two subpixel electrodes, and the two subpixel electrodes may be connected to different thin film transistors. In this case, two data lines and one gate line may be included, or one data line and two gate lines may be included. In addition, only one subpixel electrode of the two subpixel electrodes may be connected to the thin film transistor, and the other subpixel electrode may be capacitively coupled to each other with the subpixel electrode to which the thin film transistor is connected.

Now, the operation of the liquid crystal display shown in Figs. 1 to 7 will be described in detail.

The signal controller 600 receives input image signals R, G, and B and an input control signal for controlling the display thereof from an external graphic controller (not shown). The input image signals R, G, and B contain luminance information of each pixel PX, and the luminance is a predetermined number, for example, 1024 (= 2 ¹⁰ ), 256 (= 2 ⁸ ), or 64 (= 2 ⁶ ) It has gray. Examples of the input control signal include a vertical sync signal Vsync, a horizontal sync signal Hsync, a main clock MCLK, and a data enable signal DE.

The signal controller 600 applies the input image signals R, G, and B to the operating conditions of the liquid crystal panel assembly 300 and the data driver 500 based on the input image signals R, G, and B and the input control signal. After appropriately processing and generating the gate control signal CONT1 and the data control signal CONT2, the gate control signal CONT1 is sent to the gate driver 400, and the data control signal CONT2 and the processed image signal DAT are processed. ) Is output to the data driver 500. The output video signal DAT has a predetermined number (or gradation) as a digital signal.

The gate control signal CONT1 includes a scan start signal STV indicating a scan start and at least one clock signal controlling an output period of the gate-on voltage Von. The gate control signal CONT1 may also further include an output enable signal OE that defines the duration of the gate-on voltage Von.

The data control signal CONT2 is a horizontal synchronization start signal STH indicating the start of image data transmission for a group of pixels PX and a load signal LOAD for applying the data signal Vd to the liquid crystal panel assembly 300. ) And a data clock signal HCLK. The data control signal CONT2 also inverts the voltage polarity of the data signal Vd relative to the common voltage Vcom (hereinafter referred to as " polarity of the data signal " by reducing the " voltage polarity of the data signal relative to the common voltage "). It may further include an inversion signal RVS.

According to the data control signal CONT2 from the signal controller 600, the data driver 500 receives the digital image signal DAT for a group of pixels, and the gray voltage corresponding to each digital image signal DAT. By converting the digital image signal DAT to an analog data signal Vd, it is applied to the corresponding data line 171.

The gate driver 400 applies a gate-on voltage Von to the gate line 121 according to the gate control signal CONT1 from the signal controller 600 to turn on the switching element connected to the gate line 121. Then, the data signal Vd applied to the data line 171 is applied to the pixel PX through the turned-on switching element.

When the potential difference occurs at both ends of the liquid crystal capacitor Clc, a primary electric field substantially perpendicular to the surfaces of the display panels 100 and 200 is generated in the liquid crystal layer 3. [Hereinafter, the pixel electrode 191 and the common electrode 270 will be referred to as a "field generating electrode." Then, the liquid crystal molecules of the liquid crystal layer 3 respond to the electric field, and its long axis is in the direction of the electric field. The angle of inclination is perpendicular, and the degree of change in polarization of incident light in the liquid crystal layer 3 varies according to the degree of inclination of the liquid crystal molecules. This change in polarization is represented by a change in transmittance by the polarizer, through which the liquid crystal display displays an image.

The direction in which the liquid crystal molecules are inclined is primarily determined by the horizontal component in which the side of the pixel electrode 191 distorts the main electric field. The horizontal component of this main electric field is almost perpendicular to the side of the pixel electrode 191. The pixel electrode 191 has a peripheral edge defined by each hypotenuse. Since the liquid crystal molecules on the pixel electrode 191 are mostly inclined in a direction perpendicular to the periphery thereof, the inclination direction is approximately four directions. As described above, when the liquid crystal molecules are inclined in various directions, the reference viewing angle of the liquid crystal display is increased.

This process is repeated in units of one horizontal period (also referred to as "1H" and equal to one period of the horizontal sync signal Hsync and the data enable signal DE), thereby allocating data signals to all the pixels PX. Is applied to display an image of one frame.

When one frame ends, the state of the inversion signal RVS applied to the data driver 500 is controlled so that the next frame starts and the polarity of the data signal applied to each pixel PX is opposite to the polarity of the previous frame. "Invert frame"). In this case, the polarities of the data signals flowing through one data line are changed (eg, row inversion and point inversion) according to the characteristics of the inversion signal RVS within one frame, or the polarities of the data signals applied to a group of pixels are also different from each other. Can be different (eg invert columns, invert points).

Referring back to FIG. 3, polarities of neighboring pixel electrodes are inverted from each other. That is, when the first pixel electrode 191R shows positive polarity (+), the second pixel electrode 191G shows negative polarity (−), and the third pixel electrode 191B shows positive polarity (+) again. . In this case, a rectangular pixel electrode set including a right half of the first pixel electrode 191R, a second pixel electrode 191B, and a left half of the third pixel electrode 191B may be adjacent to each other in a column direction with a hypotenuse boundary. The polarities of the plurality of electrode pieces appear alternately with negative polarity (-) and positive polarity (+). In addition, the electrode pieces adjacent to the left and right adjacent to one data line 171 are not the same as the electrode pieces of the same pixel electrode 191, but also the electrode pieces of the other pixel electrodes 191. One of the polarities (-) shows the same polarity. Therefore, the display characteristic can be improved by preventing the texture caused by the contact of the electrodes having different polarities in the portion where the lateral electric field is generated.

Next, a liquid crystal panel assembly according to another exemplary embodiment of the present invention will be described in detail with reference to FIG. 7.

7 is a layout view of a liquid crystal panel assembly according to another exemplary embodiment of the present invention.

Referring to FIG. 7, the liquid crystal panel assembly according to the present exemplary embodiment includes a lower panel (not shown), an upper panel (not shown), and a liquid crystal layer (not shown) therebetween.

The layered structure of the liquid crystal panel assembly according to the present embodiment is usually the same as the layered structure of the liquid crystal panel assembly shown in Figs.

Referring to the lower panel, a plurality of gate lines 121 are formed on an insulating substrate (not shown). The gate line 121 includes a gate electrode 124 and an end portion 129. A gate insulating film (not shown) is formed on the gate line 121. A plurality of semiconductors 154 are formed on the gate insulating film, and a plurality of ohmic contacts (not shown) are formed thereon. A data conductor including a plurality of data lines 171 and a plurality of drain electrodes 175 is formed on the ohmic contact member. The data line 171 includes a plurality of source electrodes 173 and end portions 179. A passivation layer (not shown) is formed on the data conductors 171 and 175 and the exposed portion of the semiconductor 154, and a plurality of contact holes 181, 182, and 185 are formed in the passivation layer and the gate insulating layer. A plurality of pixel electrodes 191 and a plurality of contact auxiliary members 81 and 82 are formed on the passivation layer. An alignment layer (not shown) is formed on the pixel electrode 191, the contact auxiliary members 81 and 82, and the passivation layer.

Referring to the upper panel, a light blocking member, a color filter, a common electrode, and an alignment layer are formed on an insulating substrate.

However, the liquid crystal panel assembly according to the present exemplary embodiment differs from the liquid crystal panel assembly illustrated in FIGS. 3 to 6 in the shape of some pixel electrodes 191R and 191B.

The first pixel electrode 191R of FIG. 7 includes a first portion 191Ra on the right side of the data line 171 and a second portion 191Rb on the left side of the data line 171. The first portion 191Ra has the same shape as the pixel electrode 191 of the liquid crystal panel assembly illustrated in FIG. 3, but the second portion 191Rb has a different shape.

The second portion 191Rb has a rectangular shape including two pairs of horizontal sides parallel to the gate line 121 and two pairs of vertical sides parallel to the data line 171. The horizontal length of the second portion 191Rb of the first pixel electrode 191R is about half of the horizontal length of the first portion 191Ra. Therefore, the horizontal length of the second portion 191Rb of the first pixel electrode 191R has substantially the same area as the first portion 191Ra.

In addition, a plurality of cutouts 91a, 91b, 91c, 91d, and 91e are formed in the second portion 191Rb of the pixel electrode 191R. The cutouts 91a-91e are diagonal lines from left to right, and the cutouts 91a-91e are parallel to each other. The cutouts 91a-91e form an oblique angle with the gate line 121, and the oblique angle is about 45 °. Therefore, the angle formed by the hypotenuse of the cutouts 91a-91e and the electrode pieces formed in the first portion 191Ba of the pixel electrode 191R is approximately 90 °.

Meanwhile, the third pixel electrode 191B has a form in which the first pixel electrode 191R is inverted left and right. That is, it includes a first portion 191Ba having a plurality of electrode pieces and a second portion 191Bb having a rectangular shape with respect to the data line 171.

In the pixel electrode 191 of the present embodiment, similarly to the pixel electrode 191 of FIG. 3, for example, the first and third pixel electrodes 191R and 191B are partially disposed between the electrode pieces of the second pixel electrode 191G. The electrode pieces are inserted to alternately form electrode pieces having different polarities in the column direction. Accordingly, since a part of the pixel electrode 191 facing the data line 171 across the plurality of pixel electrodes 191 has the same polarity, it is possible to prevent the generation of a texture.

Many features of the liquid crystal panel assembly illustrated in FIGS. 3 to 5 may also be applied to the liquid crystal panel assembly illustrated in FIG. 7.

As described above, according to the present invention, the aperture ratio and transmittance of the display device can be maximized, and the display quality can be improved by preventing the generation of textures generated between neighboring pixel electrodes.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

Claims (11)

Board, A gate line formed on the substrate, A data line intersecting the gate line A plurality of pixel electrodes including a plurality of electrode pieces each having at least one hypotenuse which forms a hypotenuse angle with the gate line. Including; An electrode piece of adjacent pixel electrodes among the plurality of pixel electrodes is alternately arranged in a column direction. In claim 1, And an electrode piece of the pixel electrode includes at least one side parallel to the data line. In claim 1, At least one electrode piece of the plurality of electrode pieces includes a side parallel to the gate line. In claim 1, The pixel electrode is inverted left and right symmetry around the data line. In claim 1, Two adjacent pixel electrodes of the plurality of pixel electrodes are vertically inverted from each other. In claim 1, At least one of the plurality of pixel electrodes, And a first portion including two pairs of sides parallel to the gate line and the data line and including an inclination direction determining member. In claim 6, And the inclination direction determining member includes a cutout forming an angle of 90 ° with the hypotenuse. In claim 6, And the first portion is formed on the right side or the left side of the data line. In claim 1, And an oblique angle formed by the hypotenuse with the gate line is 45 °. In claim 1, And a thin film transistor connected to the pixel electrode, the gate line, and the data line. In claim 1, And an organic layer formed between the pixel electrode and the data line.

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