KR20070053829A - Semiconductor device and method of manufacturing the same - Google Patents

Abstract

A semiconductor device and a method of manufacturing the same are disclosed. The semiconductor device includes a semiconductor chip having a bonding pad, a substrate having a first surface having terminals electrically connected to the bonding pads of the semiconductor chip, and a second surface formed with a conductive pad facing the first surface and having a recessed portion formed therein; Provided is a semiconductor device including a photo solder resist film disposed on two surfaces and opening a conductive pad, a conductive barrier pattern disposed on a surface of a recess to suppress melting of the conductive pad, and a conductive ball disposed on the conductive barrier pattern. . Thereby, the reliability of the conductive pad formed in the board | substrate and the conductive ball attached to the conductive pad can be improved more.

Description

Semiconductor device and manufacturing method therefor {SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME}

1 is a cross-sectional view showing a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is an enlarged view illustrating a portion A ′ of FIG. 1.

3 is a cross-sectional view illustrating a semiconductor device in accordance with a second embodiment of the present invention.

4 is a cross-sectional view illustrating a method of manufacturing a semiconductor device in accordance with a third embodiment of the present invention.

FIG. 5 is a cross-sectional view illustrating a substrate on which the semiconductor chip illustrated in FIG. 4 is mounted.

FIG. 6 is a cross-sectional view illustrating a photo solder resist pattern formed on a second surface of the substrate illustrated in FIG. 5.

FIG. 7 is a cross-sectional view illustrating the formation of a recess by patterning the conductive pads illustrated in FIG. 6.

8 is an enlarged cross-sectional view of a portion B ′ of FIG. 7.

FIG. 9 is a cross-sectional view illustrating a conductive barrier pattern and an oxidation suppression pattern formed on a surface of the recess illustrated in FIG. 7.

FIG. 10 is an enlarged view of a portion C ′ of FIG. 9.

11 is a cross-sectional view showing a method of manufacturing a substrate according to another embodiment of the present invention.

12 is a cross-sectional view illustrating an assembly of a semiconductor chip and a substrate manufactured through FIGS. 4 to 11.

The present invention relates to a semiconductor device and a manufacturing method thereof. More specifically, the present invention relates to a semiconductor device having improved reliability between a conductive ball such as a solder ball and a conductive pad of a substrate to which the conductive ball is attached, and a manufacturing method thereof.

In general, a semiconductor device is a semiconductor chip manufacturing process for manufacturing a semiconductor chip having an integrated circuit on a silicon substrate, and electrically inspects and sorts the semiconductor chip. It is manufactured by an electrically die sorting (EDS) process for sorting) and a packaging process for protecting a semiconductor chip.

Recently, chip scale packages (CSPs), stacked packages, and the like have been developed to further improve the degree of integration of semiconductor products.

A ball grid array package (BGA), which is one of chip scale packages, is a conductive member such as a solder ball that electrically connects a semiconductor chip, a substrate on which the semiconductor chip is mounted, and pads and patterns of the semiconductor chip. ).

In the case of a chip scale package, since the reliability between the pads of the semiconductor chip and the solder balls attached to the pads of the semiconductor chip has a great influence on the yield, studies on the connection structure between the pads and the solder balls of the semiconductor chip have been conducted.

Embodiments of the present invention provide a semiconductor device having improved reliability between a solder ball and a conductive pad of a substrate to which the solder ball is attached.

Embodiments of the present invention provide a manufacturing process of a semiconductor device for manufacturing the semiconductor device.

In order to realize one object of the present invention, a semiconductor device according to the present invention is a semiconductor chip having a bonding pad, a first surface having terminals electrically connected to a bonding pad of the semiconductor chip, and facing the first surface. A conductive pad having a recess formed therein, the substrate having a second surface formed thereon, a photo solder resist film disposed on the second surface opening the conductive pad, a conductive barrier pattern disposed on the surface of the recessed portion to suppress melting of the conductive pad; Provided is a semiconductor device including a conductive ball disposed on a conductive barrier pattern.

In addition, in order to implement another object of the present invention, a method of manufacturing a semiconductor device according to the present invention comprises the steps of manufacturing a semiconductor chip having a bonding pad, a first surface having terminals electrically connected to the bonding pad of the semiconductor chip and Manufacturing a substrate having a second surface formed by a conductive pad facing the first surface; forming a photo solder resist film on the second surface that opens the conductive pad; using the photo solder resist film as an etching mask Isotropically etching to form a recess in the conductive pad, forming a conductive barrier pattern on the surface of the recess to suppress melting of the conductive pad, and attaching the conductive ball on the conductive barrier pattern. Provided are methods of manufacturing the device.

Hereinafter, a semiconductor device and a method of manufacturing the same according to exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings, but the present invention is not limited to the following embodiments. Persons having the present invention may implement the present invention in various other forms without departing from the spirit of the present invention. In the accompanying drawings, for example, the dimensions of the substrates, layers (films), regions, pads, patterns, or structures are shown to be larger than actual for clarity of the invention. In the present invention, for example, each layer (film), region, pad, pattern or structures may be "on", "top" or "bottom" of the substrate, each layer (film), region, pad or patterns. When referred to as being formed in, for example, that each layer (film), region, pad, pattern or structure is formed directly over or below the substrate, each layer (film), region, pad or patterns Alternatively, other layers (films), other regions, different pads, different patterns or other structures may be additionally formed on the substrate. In addition, where each layer (film), region, pad, electrode, pattern or structure is referred to as "first", "second", "third" and / or "fourth", It is not merely to distinguish each layer (film), region, pad, pattern or structure. Thus, "first", "second", "third" and / or "fourth" may be used selectively or interchangeably for each layer (film), region, electrode, pad, pattern or structure, respectively. Can be.

Semiconductor devices

Example 1

1 is a cross-sectional view showing a semiconductor device according to a first embodiment of the present invention.

Referring to FIG. 1, the semiconductor device 100 includes a semiconductor chip 110, a substrate 120, a photo solder resist layer 130, a conductive barrier pattern 140, and a conductive ball 150. In addition, the semiconductor device 110 may further include a molding member 160 covering and protecting the semiconductor chip 110. In the present embodiment, the molding member 160 may further include an epoxy resin.

A plurality of semiconductor chips 110 may be formed on a silicon substrate such as a silicon wafer through a semiconductor manufacturing process, and may be manufactured separately from the silicon substrate. The semiconductor chip 110 includes a plurality of bonding pads 115 for receiving an input signal from the outside or outputting a processed data signal from the semiconductor chip 110.

The substrate 120 serves to support the semiconductor chip 110 and to transfer the external signal to the semiconductor chip 110 or the data signal processed by the semiconductor chip 110 to the outside. In the present embodiment, the substrate 120 may include a plurality of conductive signal patterns.

The substrate 120 may have a plate shape having a thin thickness, and thus, the substrate 120 may face the first surface 121 and the first surface 121 facing the rear surface of the semiconductor chip 110 and will be described later. The conductive ball 150 has a second surface 122 to which it is attached.

Terminals 123 electrically connected to the bonding pads 115 of the semiconductor chip 110 are disposed on the first surface 121 of the substrate 120. In this embodiment, the terminals 123 and the bonding pads 115 of the semiconductor chip 110 are electrically connected by the conductive wires 124. In this embodiment, the conductive wires 124 may be performed by a wire bonding process.

Meanwhile, a plurality of conductive pads 125 are disposed on the second surfaces 122 of the substrate 120. The conductive pads 125 may be formed by, for example, patterning a conductive thin film through a photolithography process. Examples of the metal thin film used for the conductive pad 125 include a copper thin film, an aluminum thin film, an aluminum alloy thin film, and the like. In the present embodiment, the conductive pad 125 preferably includes a thin copper film.

A recess portion 125a is formed in the conductive pad 125 including copper. In the present embodiment, the recess 125a may be formed through a wet etching process that is isotropic etching. Preferably, the depth of the recess 125a may be about half of the total thickness of the conductive pad 125.

The conductive barrier pattern 140 is disposed on the top surface of the conductive pad 125 corresponding to the recess 125a. In the present exemplary embodiment, the conductive barrier pattern 140 may prevent the conductive pad 125 from melting, and may preferably include nickel (Ni). Alternatively, the conductive barrier pattern 140 may use a nickel alloy.

Meanwhile, a photo solder resist layer 130 having an opening for attaching the conductive ball 150 to be described later on the conductive pad 125 may be disposed on the second surface 122 of the substrate 120. In the present embodiment, the photo solder resist layer 130 has excellent insulating properties and has a high chemical resistance against an etchant for etching the conductive pad 125.

The conductive ball 150 is disposed on the upper surface of the conductive barrier pattern 140 formed in the recess 125a exposed by the photo solder resist 130. After the conductive balls 150, such as solder balls, are temporarily attached to the upper surface of the conductive barrier pattern 140, the conductive balls 150 are electrically on the conductive pads 125 by an infrared reflow process or the like. Connected.

FIG. 2 is an enlarged view illustrating a portion A ′ of FIG. 1.

Referring to FIG. 2, an oxidation suppression pattern 145 may be further disposed on an upper surface of the conductive barrier pattern 140. The oxidation suppression pattern 145 suppresses oxidation of the conductive pad 125 and / or the conductive barrier pattern 140 and greatly improves adhesion of the conductive pad 125 and the conductive ball to be described later. The oxidation suppression pattern 145 is melted and absorbed into the conductive balls when the conductive balls 150 are attached to the conductive pads 125. In the present embodiment, the oxidation suppression pattern 145 may preferably use a gold or silver mono- or binary alloy.

Example 2

3 is a cross-sectional view illustrating a semiconductor device in accordance with a second embodiment of the present invention. The semiconductor device according to the second embodiment of the present invention is substantially the same as the first embodiment described above with reference to FIGS. 1 and 2 except for the tin layer. Therefore, duplicate descriptions of the same parts will be omitted, and the same reference numerals and the same names will be given to the same parts.

Referring to FIG. 3, the semiconductor device 100 includes a semiconductor chip 110, a substrate 120, a photo solder resist film 130, a conductive barrier pattern 140, an oxidation suppression pattern 142, and a tin layer 143. And conductive balls 150.

The conductive barrier pattern 140 formed on the recess 125a of the conductive pad 125 formed on the second surface 122 of the substrate 120 prevents the conductive pad 125 from melting, preferably nickel. (Ni). Alternatively, the conductive barrier 182 may use a nickel alloy.

The tin layer 143 is disposed on the top surface of the conductive barrier pattern 40. In the present embodiment, the tin layer 143 may include binary or ternary alloys such as tin or tin-silver and tin-copper. The tin layer 143 suppresses generation of undercuts and suppresses generation of voids during solder ball attach.

An oxidation inhibiting pattern 142 may be disposed on the top surface of the tin layer 143. The oxidation suppression pattern 142 suppresses oxidation of the conductive pad 125 and greatly improves adhesion of the conductive pad 125 and the conductive ball 150. The oxidation suppression pattern 142 may be melted and absorbed into the conductive ball 150 when the conductive ball 150 is attached to the conductive pad 125. In the present embodiment, the oxidation suppression pattern 143 may preferably use a gold or silver mono- or binary alloy.

Manufacturing Method of Semiconductor Device

Example 3

4 is a cross-sectional view illustrating a method of manufacturing a semiconductor device in accordance with a third embodiment of the present invention.

Referring to FIG. 4, a semiconductor chip 110 is first manufactured to manufacture a semiconductor device.

The semiconductor chip 110 may externally input a data storage unit (not shown) for storing data, a data processor (not shown) for processing data stored in the data storage unit, and data processed by the data processor to a data processor. Bonding pads 115 are provided for inputting signals, and the data storage, the data processor, and the bonding pads 115 are manufactured by various semiconductor manufacturing processes for manufacturing the semiconductor chip 210.

FIG. 5 is a cross-sectional view illustrating a substrate on which the semiconductor chip illustrated in FIG. 4 is mounted.

Referring to FIG. 5, the substrate 120 for mounting the semiconductor chip 110 is, for example, a printed circuit board, and is formed on the first surface 121 of the substrate 120 facing the semiconductor chip 110. Terminals 123 electrically connected to the bonding pads 115 of the semiconductor chip 110 are formed, and the second surface 122 opposite to the first surface 121 is electrically connected to the conductive balls 150 to be described later. Conductive pads 125 are arranged to be connected to each other. In the present embodiment, the conductive pads 125 may be formed by, for example, patterning a copper thin film.

FIG. 6 is a cross-sectional view illustrating a photo solder resist pattern formed on a second surface of the substrate illustrated in FIG. 5.

Referring to FIG. 6, first, a photo solder resist thin film is formed on the second surface 122 of the substrate 120 over the entire surface of the second surface 122.

The photo solder resist thin film formed over the entire surface of the second surface 122 may be a photoresist film coating process and a photo process for patterning the photoresist film to form a photoresist pattern, and using the photoresist pattern as an etching mask. The thin film is patterned to form openings for exposing the conductive pads 125.

FIG. 7 is a cross-sectional view illustrating the formation of a recess by patterning the conductive pads illustrated in FIG. 6. 8 is an enlarged cross-sectional view of a portion B ′ of FIG. 7.

Referring to FIG. 7, the conductive pads 125 formed on the second surface 122 of the substrate 120 may be etched using, for example, the photo solder resist pattern 130 as an etching mask to form each conductive pad 125. ) Is formed with a recess 125a. In the present embodiment, the recess 125a may be isotropically etched by, for example, a wet etching process using an etchant.

FIG. 9 is a cross-sectional view illustrating a conductive barrier pattern and an oxidation suppression pattern formed on a surface of the recess illustrated in FIG. 7. FIG. 10 is an enlarged view of a portion C ′ of FIG. 9.

Referring to FIG. 9, a conductive barrier pattern 140 including nickel may be formed on an upper surface of the recess 125a. In the present exemplary embodiment, the conductive barrier pattern 140 may prevent melting of the conductive pad 125, and may include nickel to implement the conductive pad pattern 125. Alternatively, the conductive barrier pattern 140 may include not only nickel but also a nickel alloy, and may be formed on the top surface of the conductive pad 125 corresponding to the recessed portion 125a in an electrolytic or electroless plating manner.

Meanwhile, after the conductive barrier pattern 140 is formed on the conductive pad 125, the oxidation suppression pattern 142 may be further formed on the top surface of the conductive barrier pattern 140. In the present embodiment, the oxidation suppression pattern 142 suppresses oxidation of the conductive pad 125 and greatly improves the adhesion of the conductive pad 125 and the conductive ball 150 to be described later. In the present embodiment, the oxidation suppression pattern 142 may be preferably formed on the conductive barrier pattern 140 by electrolytic or electroless plating of gold or silver mono- or binary alloys.

11 is a cross-sectional view showing a method of manufacturing a substrate according to another embodiment of the present invention.

Referring to FIG. 11, after the conductive barrier pattern 140 is formed on the conductive pad 125, the tin layer 143 may be further disposed on the upper surface of the conductive barrier pattern 140 by an electrolytic or electroless plating method. Can be. The tin layer 143 suppresses generation of undercuts and suppresses void generation during solder ball attach, and the tin layer 143 may include binary or ternary alloys such as tin or tin-silver and tin-copper.

After the tin layer 143 is formed, the above-described oxidation suppression pattern 142 may be formed on the top surface of the tin layer 143. The oxidation suppression pattern 142 suppresses oxidation of the conductive pad 125 and greatly improves adhesion of the conductive pad 125 and the conductive ball 150 to be described later. In the present embodiment, the oxidation suppression pattern 142 may be preferably formed on the conductive barrier pattern 140 by electrolytic or electroless plating of gold or silver mono- or binary alloys.

After the conductive barrier pattern 140, the oxidation inhibiting pattern 250, or the tin layer 143 is formed in the recess 125a, the conductive ball 150 such as solder balls is formed in the recess 125a of the conductive pad 125. ) Is disposed, and the conductive balls 150 are electrically connected to the conductive pads 125 by, for example, an infrared reflow method or the like.

12 is a cross-sectional view illustrating an assembly of a semiconductor chip and a substrate manufactured through FIGS. 4 to 11.

Referring to FIG. 12, after the semiconductor chip 110 and the substrate 120 are manufactured, the semiconductor chip 110 may be formed on the first surface 121 of the substrate 120 by, for example, the adhesive member 112. Is attached by mediation. After the semiconductor chip 110 is attached to the first surface 121 of the substrate 120, the semiconductor chip 110 is formed on the bonding pads 115 of the semiconductor chip 110 and the first surface 121 of the substrate 120. The terminals 123 are wire bonded by, for example, conductive wires 124.

Subsequently, a conductive ball 150 such as a solder ball is attached to the recess 125a of the conductive pad 125 formed on the second surface 122 of the substrate 120. Subsequently, the semiconductor device is manufactured by encapsulating the first surface 121 of the substrate 120 on which the semiconductor chip 110 is exposed by a synthetic resin such as an epoxy resin.

As described in detail above, the electrical reliability of the conductive pads formed on the substrate on which the semiconductor chip included in the semiconductor device is mounted and the conductive balls electrically attached to the conductive pads can be further improved.

In the detailed description of the present invention described above with reference to a preferred embodiment of the present invention, those skilled in the art or those skilled in the art having ordinary knowledge in the scope of the invention described in the claims to be described later It will be understood that various modifications and variations can be made in the present invention without departing from the scope of the present invention.

Claims (11)

A semiconductor chip having a bonding pad; A substrate having a first surface having terminals electrically connected to a bonding pad of the semiconductor chip, and a second surface having a conductive pad facing the first surface and having a recess formed therein; A photo solder resist layer disposed on the second surface and opening the conductive pad; A conductive barrier pattern disposed on a surface of the recess to suppress melting of the conductive pad; And And a conductive ball disposed on the conductive barrier pattern. The semiconductor device of claim 1, further comprising an oxidation suppression pattern between the conductive ball and the conductive barrier pattern to suppress oxidation of the pad and increase adhesion to the conductive ball. The semiconductor device of claim 2, wherein the conductive barrier pattern comprises nickel, and the oxidation inhibiting pattern comprises a gold or silver mono- or binary system. The semiconductor device according to claim 2, further comprising a tin layer containing tin between the conductive barrier pattern and the oxidation suppression pattern to suppress the generation of undercuts and to suppress the generation of voids. The semiconductor device according to claim 4, wherein the tin layer comprises at least one selected from the group consisting of tin and tin-based alloys such as tin or tin-silver and tin-copper. Manufacturing a semiconductor chip having a bonding pad; Manufacturing a substrate having a first surface having terminals electrically connected to bonding pads of the semiconductor chip and a second surface having conductive pads facing the first surface; Forming a photo solder resist film on the second surface that opens the conductive pad; Forming a recess in the conductive pad by isotropically etching the conductive pad using the photo solder resist layer as an etching mask; Forming a conductive barrier pattern on a surface of the recess to suppress melting of the conductive pad; And And attaching a conductive ball on the conductive barrier pattern. The method of claim 6, wherein the forming of the recess is performed by an isotropic etching process. The method of claim 6, further comprising: forming an oxidation suppression pattern for inhibiting oxidation of the conductive pad and increasing adhesion to the conductive ball between attaching the conductive ball and forming the conductive barrier pattern. The method of manufacturing a semiconductor device further comprising. The method of claim 8, wherein the conductive barrier pattern comprises nickel, and the oxidation suppression pattern comprises a gold or silver mono- or binary system. 10. The method of claim 8, wherein forming a tin layer including tin to suppress the generation of undercuts and to suppress the generation of voids during solder ball attaching between the formation of the oxidation suppression pattern and the formation of the conductive barrier pattern. The method of manufacturing a semiconductor device, further comprising the step. The method of manufacturing a semiconductor device according to claim 10, wherein the tin layer comprises at least one selected from the group consisting of tin and tin-based alloys such as tin or tin-silver and tin-copper.

Images