KR20070022729A - Adhesive sheet for both dicing and die bonding and semiconductor device manufacturing method using the adhesive sheet - Google Patents

Abstract

In the so-called "stacked semiconductor device", the present invention reduces the damage of the bonding wires generated during stacking, and at the same time, the semiconductor device height is uneven due to poor accuracy in the thickness of the adhesive layer that bonds the semiconductor chips together. The purpose is to eliminate the unevenness of the height from the substrate to the surface of the uppermost semiconductor chip, the inclination of the uppermost semiconductor chip, and the like. The dicing die-bonding combined adhesive sheet of this invention which achieves such an objective becomes a base material and the adhesive agent layer laminated so that peeling is possible on the said base material, The said adhesive agent layer is normal temperature pressure-sensitive adhesiveness, It has thermosetting property, the elasticity modulus of the adhesive agent layer before thermosetting is 1.0 * 10 <^3> -1.0 * 10 <^4> Pa, the melt viscosity at 120 degreeC of the adhesive agent layer before thermosetting is 100-200 Pa.sec, and thermosetting When the temperature of the previous adhesive agent layer is fixed at 120 ° C, the time until the melt viscosity reaches the minimum value is 60 seconds or less.

Dicing, Die Bonding, Adhesive Sheet, Stacked Semiconductor Devices

Description

Adhesive sheet for both dicing and die bonding and semiconductor device manufacturing method using the adhesive sheet}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an adhesive sheet for both dicing and die bonding and a method for manufacturing a stacked type semiconductor device using the same.

In order to speed up and downsize a semiconductor device, mounting two or more semiconductor chips (henceforth simply a chip | tip) is carried out two-dimensionally in a single substrate. Although such a semiconductor device is called a multi-chip module, there is a structure in which miniaturization is further advanced, and chips are stacked three-dimensionally. Thus, a package in which chips are three-dimensionally stacked is also called a "stack type semiconductor device."

As such a device, a device in which a small chip is stacked on a large chip (see Japanese Patent Application Laid-Open No. 57-34466 and Japanese Patent Application Laid-open No. Hei 7-38053), and the position of the chip is slightly shifted. Stacked devices (see Japanese Patent Application Laid-Open No. 57-34466), and devices in which chips having a step are formed on peripheral portions thereof (Japanese Patent Publication No. 6-244360) A device in which two chips are bonded back-to-back fashion, one chip is directly bonded to the substrate, and the other chip is bonded to the substrate by a bonding wire. 7-273275).

However, the apparatus of the said structure has the fault shown below, respectively.

In a configuration in which a small chip is stacked on a large chip, it is natural that a chip of the same size cannot be stacked, and in the case where the position of the chip is shifted a little, an electrode pad is provided around the entire chip. It has a structural flaw that it does not exist. Usually, the chip | tip distributed is often provided with pads around the whole. If the chip position is limited, a problem arises in that these chips cannot be used.

In addition, in the configuration of stacking chips having a stepped portion in the peripheral edge portion, space is formed in the electrode pad portion due to the stepped step. Thus, even if chips of the same size are stacked, the bonding wire is not damaged, Processing is required, and therefore, there is a drawback that the yield of chips is lowered. Moreover, since the chip peripheral edge part is thin in plate thickness, mechanical strength fell, and mechanical damage may arise at the time of wire bonding.

In addition, in a configuration using chips bonded to each other with back bonding, up to two chips can be stacked, and bumps must be formed on electrode pads in order to bond the chips directly to the substrate. The method of contacting with each other differs in two chips, and there is an inconvenience in that two types of bonders, a die bonder for flip-chip and a wire bonder, are required.

In order to solve such a problem, Patent Literature 1 discloses a semiconductor device in which a plurality of semiconductor chips are stacked on a substrate, wherein electrode pads are formed at peripheral edges of the semiconductor chips, and the electrode pads and the substrate are bonded wires. Disclosed is a semiconductor device characterized in that an adhesive layer having a thickness of 25 µm or more and 300 µm or less is interposed between semiconductor chips.

According to the invention of Patent Document 1, there is an advantage that chips of the same size can be stacked three-dimensionally without particular limitations on the chips, or without particular limitations on the size of the chips, the arrangement of the electrode pads, or the like.

However, since the adhesive bond layer in patent document 1 is formed by apply | coating and hardening a liquid adhesive, it is difficult to adjust the thickness and area | region of an adhesive bond layer. This causes problems such as contamination of the substrate and the semiconductor chip due to bleeding or the like of the adhesive constituting the adhesive layer, or inclination of the stacked semiconductor chips.

In particular, when the semiconductor chip is multilayered, variations in the height of the semiconductor device, unevenness in height from the substrate to the surface of the semiconductor chip of the uppermost layer, and inclination of the semiconductor chip in the uppermost layer become large. It causes a problem that stable production becomes difficult, such as the position recognition for wire bonding cannot be performed on the upper surface of the semiconductor chip. That is, in the case of two stacked layers, even if the nonuniformity and the inclination are not a big problem, the unevenness and the inclination of the height become larger as the number of stacked semiconductor chips increases to three or four. This results in a problem that stable production of the conductor device becomes difficult.

Further, Patent Document 2 discloses a semiconductor device in which a plurality of semiconductor chips are stacked on a substrate, and electrode terminals provided on each of the semiconductor chips are electrically connected to the substrate by bonding wires. A semiconductor device is disclosed, wherein an insulating layer is formed between a bonding wire and a semiconductor chip stacked on the bonding wire side of a semiconductor chip to which the bonding wire is connected. As described in claim 11 of Patent Literature 2, the semiconductor device includes, "a sheet formed of an insulating layer and an adhesive layer in a wafer before the semiconductor chip is divided, and an insulating layer of the sheet in the wafer. A sheet attaching step of attaching to abutting, a dividing step of dividing the wafer on which the sheet is attached into a semiconductor chip by dicing, and the adhesive layer attaching the adhesive layer. A manufacturing method of a semiconductor device, comprising an adhering step of adhering the formed semiconductor chip to a semiconductor chip electrically connected to the substrate by a bonding wire. &Quot; "The insulating layer sticking process which affixes the insulating layer sheet used as an insulating layer to the wafer before a semiconductor chip is divided | segmented, and becomes an adhesive layer after the said insulating layer sticking process An adhesive layer attaching step of attaching the adhesive layer sheet to the surface on which the insulating layer sheet is affixed; a dividing step of dividing the wafer having the insulating layer sheet and the adhesive layer sheet into semiconductor chips by dicing; By a bonding process for bonding the semiconductor chip affixed with the adhesive layer to the semiconductor chip electrically connected to the substrate by a bonding wire.

As an insulating layer, the gist which is excellent in heat resistance and low in plastic deformation in 100 degreeC-200 degreeC, especially a polyimide-type resin is described (refer Paragraph 0060).

Since an insulating layer made of such a resin is generally low in pressure sensitive adhering properties at room temperature, it is considered to be affixed to the wafer by thermocompression using a roller or the like. Therefore, in the method of Claim 11 of patent document 2, when affixing an insulating layer and the sheet | seat which becomes an adhesive layer to a wafer, since an excessive pressure is loaded on an adhesive layer, the thickness accuracy of an adhesive layer may be impaired. In this manner, when the thickness accuracy of the adhesive layer is impaired, as in the case of the liquid adhesive in Patent Document 1, the nonuniformity of the height of the semiconductor device, the nonuniformity of the height from the substrate to the surface of the topmost semiconductor chip, and the topmost semiconductor chip Since inclination etc. become large, it causes the problem that stable production becomes difficult.

In addition, in the method of Claim 12 of patent document 2, although the contact bonding layer is affixed after affixing an insulating layer, since the contact bonding layer of patent document 2 becomes a thermosetting resin and does not have pressure-sensitive adhesiveness, thermocompression bonding at the time of sticking is carried out. It is thought that it is done. Therefore, at the time of sticking of an adhesive layer, since the excessive pressure is applied to an adhesive layer similarly to the manufacturing method of Claim 11, the thickness precision of an adhesive layer may be impaired, and there exist a possibility that the same problem as the above may arise.

In Patent Document 2 (0063 Paragraph), "As the adhesive layer 6, a thermosetting resin which is cured after melting from a solid to a liquid for heating is preferable, and in particular, an epoxy resin is particularly preferred." The preferable melting and curing characteristics required for the adhesive layer are not particularly described.

If the adhesive layer is hard, it will crush and damage the bonding wire, and if it is simply soft, the chip will be inclined due to the nonuniformity of the pressure during bonding, or the adhesive will leak from the edge. (bleed out), there is a possibility of contaminating the bonding pad of the upper chip. If the bonding pads are contaminated with an adhesive, wire bonding becomes impossible or breaking of wires are likely to occur.

Patent Document 1: Japanese Patent Application Laid-Open No. 10-027880

Patent Document 2: Japanese Patent Application Laid-Open No. 2002-222913

Disclosure of the Invention

Problems to be Solved by the Invention

In the so-called "stack type semiconductor device" described above, the present invention reduces the damage of bonding wires generated at the time of stacking and at the same time reduces the height of the semiconductor device due to poor accuracy of the thickness of the adhesive layer bonding the semiconductor chips. It aims at eliminating the nonuniformity, the nonuniformity of the height from the board | substrate to the surface of the uppermost semiconductor chip, the inclination of the uppermost semiconductor chip, etc.

Means to solve the problem

The dicing die-bonding combined adhesive sheet of this invention,

It becomes a base material and the adhesive agent layer (adhesive layer) laminated | stacked so that peeling is possible on the said base material,

The said adhesive layer has normal temperature pressure-sensitive adhesiveness and thermosetting, the elasticity modulus of the adhesive agent layer before thermosetting is 1.0 * 10 <^3> -1.0 * 10 <^4> Pa, and the melting point at 120 degreeC of the adhesive agent layer before thermosetting Melt viscosity is 100-200 Pa.sec, and when the adhesive agent layer before thermosetting is made temperature constant at 120 degreeC, the time until melt viscosity reaches minimum value is 60 second or less, It is characterized by the above-mentioned. have.

In this invention, it is preferable that the said adhesive agent layer has energy beam curability, and the physical property of Claim 1 is a physical property before thermosetting after energy-beam hardening.

The dicing die-bonding combined adhesive sheet of this invention is used suitably for the adhesive fixation between the semiconductor chips of a stacked semiconductor device.

That is, the manufacturing method of the stacked semiconductor device of the present invention,

The said dicing die-bonding adhesive sheet is stuck to the rear surface of the semiconductor chip in which the semiconductor chip which comprises the upper layer rather than the 2nd layer of a stacked semiconductor device was affixed,

Each semiconductor chip is subjected to full-cut dicing with an adhesive agent layer for each semiconductor chip,

Picking up the semiconductor chip which has an adhesive agent layer on the back surface from a board | substrate,

Separately, a substrate on which a semiconductor chip constituting the first layer in which wires are connected is mounted is prepared, and the substrate is heated.

After the adhesive agent layer of the said semiconductor chip is buried in the wire formation surface of the said board | substrate, and the adhesive agent layer surface contacts the surface of the semiconductor chip which comprises a 1st layer,

It is characterized by thermosetting an adhesive agent layer.

In the above, when an adhesive agent layer has energy ray curability, an energy ray irradiation is performed to an adhesive agent layer before or after full cut dicing.

In the manufacturing method of such a stack type semiconductor device of the present invention, it is preferable to use a dicing die bonding / adhesive adhesive sheet having a thickness of 5 to 50 µm thicker than the wire height.

Effects of the Invention

According to the present invention as described above, in the so-called stacked semiconductor device, the damage of the bonding wire generated at the time of stacking is reduced, and the height of the semiconductor device caused by the poor precision of the thickness of the adhesive layer which bonds the semiconductor chips together is uneven. The height unevenness from the substrate to the surface of the uppermost semiconductor chip and the inclination of the uppermost semiconductor chip can be eliminated, contributing to the improvement of the quality and productivity of the semiconductor device.

Brief description of the drawings

1 shows the dicing die-bonding combined adhesive sheet of the present invention.

2 shows one step of the production method of the present invention.

3 shows one step of the production method of the present invention.

4 shows one step of the production method of the present invention.

5 shows an example of a stacked semiconductor device obtained by the present invention.

Explanation of the sign

One… Dicing & Bonding Adhesive Sheet

2… Base material

3... Adhesive layer

4… Ring frame

5... Semiconductor wafer

6... Semiconductor Chip (Stack Chip (2nd Layer))

10... Board

11, 13... wire

12... Semiconductor chip (bottom chip (first layer))

To practice the invention  Best form for

EMBODIMENT OF THE INVENTION Hereinafter, this invention is demonstrated further more concretely, referring drawings.

As shown in FIG. 1, the dicing die-bonding adhesive agent sheet 1 of this invention becomes the adhesive agent layer 3 laminated on the base material 2 and the said base material so that exfoliation is possible. . The adhesive sheet 1 can take all shapes, such as tape shape and a label shape.

Hereinafter, the base material 2 and the adhesive agent layer 3 are demonstrated, respectively.

`` Materials (2) ''

As the base material 2 of the adhesive sheet 1, for example, a polyethylene film, a polypropylene film, a polybutene film, a polybutadiene film, a polymethylpentene film, a polyvinyl chloride film, a vinyl chloride copolymer film, a polyethylene tere Phthalate film, polyethylene naphthalate film, polybutylene terephthalate film, polyurethane film, ethylene-vinyl acetate film, ionomer resin film, ethylene (meth) acrylic acid copolymer film , Ethylene (meth) acrylic acid ester copolymer film, polystyrene film, polycarbonate film, polyimide film, fluoro resin film and the like are used. Also crosslinked films thereof are used. Furthermore, these may be laminated films. Furthermore, these films may be transparent films, colored films, or opaque films. When the adhesive agent layer 3 mentioned later is photocurable, a transparent film or a colored transparent film is selected.

In the method of manufacturing a semiconductor device of the present invention, as described later, the adhesive layer 3 is fixed on the back surface of the chip and is picked up from the substrate 2, so that the substrate 2 and the adhesive agent layer are picked up. (3) is laminated so that peeling is possible. For this reason, the surface tension of the surface which contacts the adhesive agent layer 3 of the base material 2 becomes like this. Preferably it is 40 mN / m or less, More preferably, it is 37 mN / m or less, Especially preferably, it is 35 mN / m or less It is preferable. A substrate having such a low surface tension can be obtained by appropriately selecting a material, and a release agent such as a silicone resin or an alkyd resin is applied to the surface of the substrate to perform a releasing treatment. It is also possible to obtain by performing.

The film thickness of such a base material 2 is 10-500 micrometers normally, Preferably it is 15-300 micrometers, Especially preferably, it is about 20-250 micrometers.

"Adhesive layer 3"

The adhesive agent layer 3 is normal temperature pressure-sensitive adhesiveness, and has thermosetting property, Preferably it has further energy ray curability.

In such an adhesive sheet 1 of the present invention, the adhesive layer 3 is used for fixing the wafer at the time of wafer dicing and finally used for fixing the semiconductor chips. In particular, in the manufacturing method of the stacked semiconductor device of the present invention described later, after dicing the wafer while fixing the semiconductor wafer with the adhesive sheet 1, the semiconductor chip having the adhesive layer on the back surface is picked up from the substrate. The adhesive agent layer surface of the said semiconductor chip is gradually buried in the wire formation surface of a board | substrate, and the adhesive agent layer 3 surface is made to contact the semiconductor chip surface which comprises a 1st layer. At this time, the wire forming surface is heated to a temperature slightly higher than the melting temperature of the adhesive agent layer and below the curing temperature. For this reason, when an adhesive agent layer softens too much, there exists a possibility that the thickness precision of an adhesive agent layer may fall.

Therefore, in the present invention, the elastic modulus before thermal curing of the adhesive agent layer 3 is 1.0 × 10 ³ to 1.0 × 10 ⁴ GPa, preferably 1.0 × 10 ³ to 5.0 × 10 ³ GPa. . In addition, the elasticity modulus of the adhesive agent layer 3 is measured by the dynamic viscoelasticity measuring apparatus at the measurement frequency of 1 Hz at 100 degreeC. When the elasticity modulus before thermosetting of the adhesive agent layer 3 exists in such a range, deformation of an adhesive agent layer at the time of manufacture of a stack type | mold semiconductor device hardly arises, and the thickness precision of an adhesive agent layer is maintained.

In addition, in the case of pressing for adhering of a semiconductor chip, if the adhesive agent layer 3 is too hard, there exists a possibility that a wire may be crushed or broken. On the other hand, if the adhesive layer 3 is too soft, the adhesive will fluidize and various problems will arise due to poor thickness precision of the adhesive layer. Therefore, the adhesive agent layer 3 at the time of pressure bonding of a semiconductor chip, ie, the adhesive agent layer 3 before thermosetting, is required to have a suitable melt physical property.

For this reason, the melt viscosity at 120 degreeC of the adhesive agent layer 3 before thermosetting is 100-200 Pa. Second, Preferably it is 110-190 Pa. Second. In addition, the melt viscosity at 120 degreeC of the adhesive agent layer 3 before thermosetting is measured by the dynamic-viscoelasticity measuring apparatus at the measuring frequency of 1 Hz.

Moreover, when the adhesive agent layer before thermosetting is made temperature constant at 120 degreeC, time until melt viscosity reaches the minimum value is 60 second or less, Preferably it is 50 second or less, More preferably, 40 second or less to be. Even if it becomes high temperature, the adhesive agent containing a polymer in a composition takes time until the whole shows uniform viscosity. Therefore, when an adhesive agent is made into fixed temperature after temperature rising, a viscosity will fall gradually. However, since an adhesive agent has thermosetting, the viscosity raises by thermosetting with time. In addition, the time when the melt viscosity in 120 degreeC of the adhesive agent layer 3 reaches the minimum value is measured by the dynamic-viscoelasticity measuring apparatus at the measuring frequency of 1 Hz.

When the adhesive layer surface comes into contact with the heated wire, the adhesive layer is locally heated, and only the adhesive layer in the vicinity of the wire reduces the viscosity locally. For this reason, a wire is quickly buried in an adhesive layer, and damage to a wire is reduced. However, the viscosity-sensitive adhesive agent far from the heated wire or the chip main body does not substantially decrease the viscosity until the thermal conductivity reaches the semiconductor chip main body. Thereby, without damaging a wire, the deformation | transformation of the whole adhesive agent can be suppressed to the minimum. Therefore, the bleed out of an adhesive agent hardly arises, and the thickness precision of an adhesive agent layer can be maintained.

In addition, in this invention, the adhesive agent layer 3 may be thermosetting and may have energy ray curability. In this case, the said various physical properties show the characteristic before thermosetting after energy-beam hardening.

The said adhesive layer 3 basically has an adhesive component (A) and a thermosetting component (B) as an essential component, Preferably it contains an energy-beam curable component (C), If necessary, Other additives ( D) is blended.

Hereinafter, the said component (A)-(D) is demonstrated.

`` Adhesive Ingredient (A) ''

As an adhesive component (A), an acryl-type polymer is normally used preferably. As a repeating unit of an acryl-type polymer, the repeating unit derived from a (meth) acrylic acid ester monomer and a (meth) acrylic acid derivative is mentioned. As the (meth) acrylic acid ester monomer, a (meth) acrylic acid cycloalkyl ester, a (meth) acrylic acid benzyl ester, or a (meth) acrylic acid alkyl ester having 1 to 18 carbon atoms of an alkyl group is used. Among these, (meth) acrylic acid alkyl esters having 1 to 18 carbon atoms of the alkyl group are particularly preferable, for example, methyl acrylate, methyl methacrylate, ethyl acrylate, ethyl methacrylate, propyl acrylate, propyl methacrylate, and acrylic acid. Butyl, butyl methacrylate, and the like are used. Moreover, (meth) acrylic acid glycidyl etc. are mentioned as a (meth) acrylic-acid derivative, for example.

It is preferable that especially (meth) acrylic-acid glycidyl unit and at least 1 type of (meth) acrylic-acid alkylester unit are included. In this case, the content rate of the component unit derived from the glycidyl (meth) acrylate in a copolymer is 0-80 mass% normally, Preferably it is 5-50 mass%. By introducing a glycidyl group, the compatibility with the epoxy resin as the thermosetting component described later is improved, the Tg after curing is increased, and the heat resistance is also improved. Moreover, as (meth) acrylic-acid alkylester, it is preferable to use methyl (meth) acrylate, ethyl (meth) acrylate, butyl (meth) acrylate, etc. In addition, by introducing a hydroxyl group-containing monomer such as hydroxyethyl acrylate, the adhesion to the adherend and the adhesive property can be easily adjusted.

The weight average molecular weight of the acrylic polymer is preferably 100,000 or more, and more preferably 150,000 to 1 million.

`` Thermosetting component (B) ''

Although the thermosetting component (B) is not hardened by an energy ray, it is a three-dimensional network when heated, and has a property which adhere | attaches an adherend firmly. Such thermosetting components (B) are generally thermosetting resins such as epoxy, phenol, resorcinol, urea, melamine, furan, unsaturated polyester, silicone, and suitable hardening accelerator. It is formed from. There are many kinds of such thermosetting components, and the present invention is not particularly limited, and various kinds of thermosetting components known in the art can be used. As an example of such a thermosetting component, the adhesive component which consists of (B-1) epoxy resin and (B-2) heat activated latent curing agent for epoxy resin is mentioned.

As epoxy resin (B-1), although the conventionally well-known various types of epoxy resin are used, the thing of about 300-2000 weight average molecular weight is preferable normally, Especially 300-500, Preferably the state of 330-400 (ordinary state) It is preferable to use it in the form which blended the liquid epoxy resin and the epoxy resin of the state solid of the weight average molecular weight 400-2000, Preferably 500-1500. In addition, the epoxy equivalent of the epoxy resin used preferably in this invention is 50-5000 g / eq normally. Specific examples of such epoxy resins include glycidyl ethers of phenols such as bisphenol A, bisphenol F, resorcinol, phenyl novolac and cresol novolac; Glycidyl ethers of alcohols such as butanediol, polyethylene glycol, and polypropylene glycol; Glycidyl ethers of carboxylic acids such as phthalic acid, isophthalic acid and tetrahydrophthalic acid; Glycidyl or alkyl glycidyl epoxy resins in which active hydrogens bonded to nitrogen atoms such as aniline isocyanurate are substituted with glycidyl groups; Vinylcyclohexane diepoxide, 3,4-epoxycyclohexylmethyl-3,4-dicyclohexanecarboxylate, 2- (3,4-epoxy) cyclohexyl-5,5-spiro (3,4-epoxy A so-called alicyclic epoxide in which epoxy is introduced by, for example, oxidizing a carbon-carbon double bond in a molecule, such as cyclohexane-m-dioxane, may be mentioned. Moreover, you may use the dicyclopentadiene skeleton containing epoxy resin which has a dicyclopentadiene skeleton and a reactive epoxy group in a molecule | numerator.

Among these, in this invention, a bisphenol-type glycidyl-type epoxy resin, O-cresol novolak-type epoxy resin, and a phenol novolak-type epoxy resin are used preferably.

These epoxy resins can be used individually by 1 type or in combination of 2 or more types.

A thermally active latent epoxy resin hardening | curing agent (B-2) is a hardening | curing agent of the type which does not react with an epoxy resin at room temperature, but is activated by heating more than a certain temperature, and reacts with an epoxy resin.

The activation method of the thermally active latent epoxy resin curing agent (B-2) includes a method of generating active species (anions, cations) in a chemical reaction by heating; A method of stably dispersing in the epoxy resin (B-1) at room temperature, being compatible with and dissolved in the epoxy resin at a high temperature to initiate a curing reaction; A method of initiating a curing reaction by eluting at high temperature with a molecular sieve encapsulation type curing agent included in molecular sieves; Microcapsule and the like.

These thermally active latent epoxy resin hardeners can be used individually by 1 type or in combination of 2 or more types. Especially among the above, dicyandiamide, an imidazole compound, or a mixture thereof is preferable.

The thermally active latent epoxy resin curing agent (B-2) as described above is usually 0.1 to 20 parts by mass, preferably 0.5 to 15 parts by mass, particularly preferably 100 parts by mass of the epoxy resin (B-1). It is used in the ratio of 1-10 mass parts.

"Energy-ray curable component (C)"

Preferably, an energy-beam curable component (C) is mix | blended with an adhesive agent layer. By hardening an energy-beam curable component (C), since the adhesive force of an adhesive agent layer can be reduced, interlayer seperation of a base material and an adhesive agent layer can be performed easily.

The energy ray curable component (C) is a compound that is polymerized and cured when irradiated with energy rays such as ultraviolet rays and electron beams. Specific examples of the energy ray-polymerizable compound include trimethylolpropane triacrylate, tetramethylolmethane tetraacrylate, pentaerythritol triacrylate, dipentaerythritol monohydroxy pentaacrylate, and dipentaerythritol hexa. Acrylate or 1,4-butylene glycol diacrylate, 1,6-hexanediol diacrylate, polyethylene glycol diacrylate, oligoester acrylate, urethane acrylate oligomer, epoxy modified acrylate, polyether An acrylate type compound, such as an acrylate and an itaconic acid oligomer, is used. Such a compound has at least 1 polymeric double bond in a molecule | numerator, Usually, a weight average molecular weight is 100-30000, Preferably it is about 300-10000.

Moreover, as another example of an energy-beam polymerizable compound, the compound etc. which have a dicyclopentadiene frame | skeleton can also be used.

Energy-beam curable component (C) is 0-50 mass parts with respect to a total of 100 mass parts of the said component (A) and (B), Preferably it is 1-30 mass parts, Especially preferably, it is 2-20 mass parts Used in proportions.

The adhesive agent composition containing the energy beam curable component (C) as described above is cured by energy ray irradiation. As an energy ray, an ultraviolet-ray, an electron beam, etc. are used specifically ,.

When ultraviolet rays are used as energy rays, the polymerization curing time and the light irradiation amount can be reduced by incorporating a photopolymerization initiator.

Specific examples of such photopolymerization initiators include benzophenone, acetophenone, benzoin, benzoin methyl ether, benzoin ethyl ether, benzoin isopropyl ether, benzoin isobutyl ether, benzoin benzoic acid, Benzoin methyl benzoate, benzoin dimethyl ketal, 2,4-diethylthioxanthone, α-hydroxycyclohexyl phenyl ketone, benzyl diphenyl sulfide, tetramethylthiuram Monosulfide, azobisisobutyronitrile, benzyl, dibenzyl, diacetyl, β-chloroanthraquinone or 2,4,6-trimethylbenzoyldiphenylphosphine oxide and the like.

It is preferable to use a photoinitiator in 0.01-20 mass parts with respect to 100 mass parts of said energy ray curable components (C), Preferably it is a ratio of about 0.1-15 mass parts.

`` Other components (D) ''

You may mix | blend a coupling agent (coupling agent) (D1) with an adhesive agent layer. It is preferable that a coupling agent (D1) has group which reacts with the functional group which the said (A)-(C) component, Preferably a component (B) has.

The coupling agent (D1) is considered to react with the thermosetting component (B) (especially epoxy resin) when the organic functional group in the coupling agent reacts at the time of the curing reaction, and does not impair the heat resistance of the cured product, and thus the adhesiveness and adhesiveness. In addition, water resistance (wet heat resistance) is also improved.

As the coupling agent (D1), a silane system (silane coupling agent) is preferable from the versatility, cost-benefit, and the like. Moreover, said coupling agent (D1) is 0.1-20 mass parts normally with respect to 100 mass parts of said thermosetting components (B), Preferably it is 0.3-15 mass parts, Especially preferably, it is the ratio of 0.5-10 mass parts. Used.

In order to adjust initial adhesive force and cohesion force, it is also possible to add the cross-linking agent (D2), such as an organic polyisocyanate compound and an organic polyvalent imine compound, to the said adhesive agent.

Examples of the organic polyisocyanate compound include aromatic polyhydric isocyanate compounds, aliphatic polyhydric isocyanate compounds, alicyclic polyhydric isocyanate compounds, trimers of polyhydric isocyanate compounds thereof, and polyhydric isocyanate compounds and polyol compounds. The terminal isocyanate urethane prepolymer etc. which are obtained by making it react are mentioned. More specific examples of the organic polyvalent isocyanate compound include, for example, 2,4-tolylene diisocyanate, 2,6-tolylene diisocyanate, 1,3-xylylene diisocyanate (1, 3-xylylene diisocyanate), 1,4-xylene diisocyanate, diphenylmethane-4,4'-diisocyanate, diphenylmethane-2,4'-diisocyanate, 3-methyldiphenylmethane diisocyanate, hexamethylene di Isocyanate, isophorone diisocyanate, dicyclohexyl methane-4,4'- diisocyanate, dicyclohexyl methane-2,4'- diisocyanate, lysine isocyanate, etc. are mentioned.

Specific examples of the organic polyvalent imine compound include N, N'-diphenylmethane-4,4'-bis (1-aziridinecarboxyamide), trimethylolpropane-tri-β-aziridinylpropionate, tetramethyl Olmethane-tri-β-aziridinylpropionate, N, N'-toluene-2,4-bis (1-aziridinecarboxyamide) triethylenemelamine and the like. Said crosslinking agent (D2) is 0.1-20 mass parts normally with respect to 100 mass parts of adhesive components (A), Preferably it mix | blends in the ratio of 0.2-10 mass parts.

In addition, a filler such as asbestos, silica, glass, mica, chromium oxide, titanium oxide, or pigment may be added to the adhesive agent layer. These fillers may be mix | blended in the ratio of about 0-400 mass parts with respect to a total of 100 mass parts of the component (excluding a filler) which comprises an adhesive agent layer.

Moreover, in order to control the thermal response (melting property) of an adhesive agent layer, you may mix | blend the thermoplastic resin which has a glass transition point at 60-150 degreeC. As the thermoplastic resin, for example, polyester resin, polyvinyl alcohol resin, polyvinyl butyral, polyvinyl chloride, polystyrene, polyamide resin, cellulose, polyethylene, polyisobutylene, polyvinyl ether, polyimide resin, phenoxy Resin, polymethyl methacrylate, styrene-isoprene-styrene block copolymer, styrene-butadiene-styrene block copolymer, and the like. Among these, a phenoxy resin is especially preferable from the thing excellent in the compatibility with the other component of an adhesive agent layer.

The blending ratio of the thermoplastic resin in the adhesive layer is preferably 1 to 50 parts by mass, more preferably 2 to 40 parts by mass, in particular per 100 parts by mass in total of the adhesive component (A) and the thermosetting component (B). Preferably it is used in the ratio of 3-30 mass parts. Moreover, when an acrylic polymer is used as an adhesive component (A), it is preferable that the weight ratio (acrylic polymer / thermoplastic resin) of an acrylic polymer and a thermoplastic resin is 9/1-3/7.

`` Adhesive ''

The adhesive agent layer of this invention has the above-mentioned peculiar melt property.

As a 1st factor which determines the melt property of an adhesive agent layer, the ratio of the adhesive component (A) and a thermosetting component in the said compound is mentioned. Since the adhesive component (A) is a high molecular weight body, as the addition amount increases, fluidity at the time of heating is inhibited, and when the addition amount is small, fluidity is expressed. On the other hand, the thermosetting component (B) has a low molecular weight and expresses fluidity without being changed by energy ray irradiation. Therefore, in order to show appropriate fluidity and also have a fluidity which does not bleed, the compounding quantity of the adhesion component (A) with respect to a thermosetting component (B) is important. The blending ratio of the thermosetting component (B) is preferably in the range of 10 to 99 parts by mass, more preferably in 100 parts by mass of the total amount of the adhesive component (A) and the thermosetting component (B) ((A) + (B)). 50-97 mass parts, Especially preferably, it is 83-95 mass parts.

In addition, when an adhesive agent contains an energy ray curable component (C), since an adhesive agent layer is die-bonded after hardening an energy ray curable component, when many energy ray curable components are included, a crosslinking density will become high and an adhesive agent layer will be high. Since this becomes hard, fluidity | liquidity falls and die-bonding property worsens.

Moreover, when a large amount of thermoplastic resin is included, fluidity may become excessive, and the target elastic modulus and melt viscosity may not be obtained.

Therefore, when mix | blending an energy-beam curable component (C) and a thermoplastic component, these compounding ratios are suitably selected in the said range so that the target elastic modulus and melt viscosity may be matched.

The thickness of the adhesive agent layer having the above components is higher than the wire height (the distance between the top of the wire and the upper surface of the semiconductor chip to which the wire is connected, "A" shown in FIG. 4). Thick thickness of about 10-50 micrometers is preferable. Although the wire height varies depending on the type of semiconductor device and the manufacturing method, the thickness of the adhesive layer is preferably 30 to 130 μm, and generally 40 to 100 μm in consideration of coating workability. It is preferable. When the thickness of the adhesive agent layer is thin, there is a fear that the semiconductor chips stacked on the upper surface are in contact with the wires, causing a short circuit or disconnection due to the bonding pressure.

The adhesive agent comprising each component as described above has a pressure sensitive adhering property and a thermal curability, and when dicing, adheres to the substrate to contribute to fixing the wafer, and when mounting It can be used as an adhesive for bonding the chip and the wire forming surface. In particular, since the adhesive agent layer 3 of the present invention exhibits the unique melt property as described above, even if it is pressed against the heated wire forming surface, the wire is not damaged and the fluidization of the adhesive is also minimized. The thickness accuracy of the adhesive agent layer is not impaired. In addition, through heat curing, it is possible to give a hardened product with high impact resistance and also excellent balance of shear strength and peeling strength, so as to achieve severe heat and humidity conditions. Sufficient adhesive property can be maintained even under the following.

`` Dicing die bonding combined adhesive sheet (1) ''

The dicing die-bonding adhesive sheet 1 is a structure in which the adhesive agent layer 3 is laminated on the base material 2 so that peeling is possible, and in order to protect the adhesive agent layer 3, You may laminate | stack a peeling film on the upper surface. As a peeling film, the general purpose peeling film which performed the peeling process with peeling agents, such as a silicone resin, to films, such as polyethylene terephthalate, can be used.

The manufacturing method of such a dicing die-bonding adhesive agent sheet 1 is not specifically limited, You may manufacture by apply | coating and drying the composition which comprises the adhesive agent layer 3 on the base material 2, and You may manufacture by providing an adhesive agent layer on a peeling film and transferring this to the said base material.

Moreover, the adhesive sheet for ring frame fixing for fixing a ring frame may be provided in the peripheral portion on the surface of the adhesive agent layer 3.

`` Manufacturing Method of Stack Type Semiconductor Device ''

Next, the manufacturing method of the stacked semiconductor device of this invention using the said dicing die bonding combined adhesive sheet 1 is demonstrated.

In the manufacturing method of this invention, first, the said dicing die-bonding combined adhesive sheet is stuck on the back surface of the semiconductor wafer in which the semiconductor chip which comprises the upper layer rather than the 2nd layer of a stack type semiconductor device was affixed,

Full-cut dicing of the said semiconductor wafer with an adhesive agent layer is carried out for every semiconductor chip, the semiconductor chip which has an adhesive agent layer on the back surface is picked up from a base material, and the semiconductor chip which has an adhesive agent layer on a back surface is obtained.

Specifically, first, as shown in FIG. 2, the dicing die bonding combined adhesive sheet 1 is fixed on the dicing apparatus by the ring frame 4, and a silicon wafer 5 is used. The one side of) is placed on the adhesive layer 3 of the dicing die-bonding adhesive sheet 1, and it is lightly pushed to fix the wafer 5.

Next, when the adhesive agent layer 3 has energy ray curability, an energy ray is irradiated from the base material 2 side, the cohesion force of the adhesive agent layer 3 is raised, and the adhesive agent layer 3 and the base material ( 2) Reduce the adhesive force between. In addition, energy ray irradiation may be performed after dicing, and may be performed after the following expanding step.

Subsequently, as shown in FIG. 3, the said silicon wafer 5 is cut | disconnected for every circuit using cutting means, such as a dicing saw, and a semiconductor chip is obtained. The depth of cut at this time is the depth of the sum of the thickness of the silicon wafer and the thickness of the adhesive agent layer and the wear content of the dicing saw, and the adhesive agent layer is also cut together with the wafer 5.

Subsequently, if the dicing / bonding adhesive bonding sheet 1 for both uses is expanded, the semiconductor chip spacing is extended and the pickup of the semiconductor chip can be performed more easily. At this time, a gap occurs between the adhesive agent layer and the base material, the adhesive force between the adhesive agent layer and the base material decreases, and the pick-up property of the chip is improved.

When the semiconductor chip is picked up in this manner, the cut adhesive layer 3 can be stuck to the back surface of the semiconductor chip 6 to be peeled off from the substrate.

On the other hand, separately from the above, as shown in FIG. 4, the board | substrate 10 in which the semiconductor chip 12 which comprises the 1st layer which the wire 11 is connected is mounted is prepared. The wire 11 electrically connects an electrode terminal on the semiconductor chip 12 and an outer lead on the base 10, and is usually made of a gold wire or the like. The board | substrate 10 on which the semiconductor chip 12 of such a structure is mounted can be obtained by well-known various types of methods. The substrate 10 and the semiconductor chip 12 are adhered to each other via a thermosetting adhesive such as an epoxy adhesive or an adhesive layer of a general purpose dicing die bonding / adhesive adhesive sheet. You may adhere | attach through the adhesive agent layer 3 of the dicing die-bonding adhesive agent sheet 1 of this invention.

The semiconductor chip is laminated by pressing the adhesive agent layer 3 of the semiconductor chip 6 to the wire formation surface side of the semiconductor chip 12. At this time, the wire 11 and the semiconductor chip 12 are heated above the melting temperature of the adhesive agent layer 3 by heating the lower substrate 10. Since the adhesive agent layer 3 has the unique melt property as mentioned above, when the adhesive agent layer 3 contacts the wire 11, the adhesive agent layer will melt-soften quickly at the contact part, and At the same time, since the adhesive agent at a position away from the wire has little heat conducted from the wire and from the lower chip main body, the melt softening is delayed. For this reason, although the wire is buried in the adhesive agent layer 3 without damaging the wire 11, the deformation by melt softening is suppressed small in the position away from the wire. Next, the adhesive agent layer 3 adheres to the surface of the semiconductor chip 12, and the adhesive agent layer 3 is given the predetermined pressure by a bonding apparatus. At this time, since most of the adhesive agent layer is not yet sufficiently heated, high viscosity is maintained, and the chip is inclined due to the bleed out and the unevenness of the bonding pressure from which the adhesive agent leaks from the end of the semiconductor chip. This does not happen. Subsequently, heat is sufficiently transferred from the lower chip main body to the adhesive agent layer 3, but since the pressurization by the bonding apparatus is completed and the curing of the adhesive agent layer 3 also proceeds, the adhesive agent layer 3 is applied. The deformation of is suppressed.

Instead of the adhesive agent layer 3 of this invention, when the adhesive agent with a melt viscosity in 120 degreeC is lower than 100 Pa.sec is used, although the damage to the wire 11 is small, it is an adhesive agent at the time of the pressurization by bonding. Since the overall viscosity is also lowered, bleed out and chipping are likely to occur. In addition, when the adhesive used for longer than 60 seconds until the melt viscosity reaches the minimum value, since the viscosity hardly decreases locally, it is necessary to sufficiently preheat the adhesive in order not to damage the wire. However, when the whole adhesive is preheated, the adhesive is deformed and bleed out or chipping is likely to occur. If preheating is not performed, the wire 11 is crushed and damaged.

In this way, the semiconductor chip 6 is laminated on the semiconductor chip 12 as the second layer, and the electrode chip of the semiconductor chip 6 and the outer lead of the substrate 10 are connected by the wires 13. The stacked semiconductor device of the two-layer structure shown in 5 is obtained. On the surface of the semiconductor chip 6 of the second layer in the same manner as described above, the third semiconductor chip may be further laminated, wire bonded, or further multilayered into four and five layers.

In the stacked semiconductor device thus obtained, since an adhesive layer having an unusual melt property is used, wires are not crushed or broken, and various problems are caused due to poor accuracy of the thickness of the adhesive layer. Resolved.

The obtained stacked semiconductor device may be subjected to various kinds of known finishing treatments in the manufacture of semiconductor devices, such as resin sealing, if necessary.

EXAMPLES Hereinafter, although an Example demonstrates this invention, this invention is not limited to these Examples.

In the following examples and comparative examples, the "elastic modulus", "melt viscosity", "time to reach the minimum melt viscosity", "adhesion area to the bottom chip", "damage to the wire", "bleeding" And "package reliability" were evaluated as follows.

"Elastic modulus", "melt viscosity", "time for melting viscosity to reach minimum value"

The adhesive agent layer of an Example and a comparative example was laminated | stacked so that it might be set to thickness 3mm, and the elasticity modulus and melt viscosity in 100 degreeC of the sample which irradiated the ultraviolet-ray from both surfaces were made into the frequency using the dynamic-viscoelasticity measuring apparatus (RDA II by the product of Rheometrics) Measured at 1 Hz. Further, using the same apparatus and frequency, the adhesive was heated up at a temperature increase rate of 1.0 ° C./sec from room temperature, and the temperature was fixed at 120 ° C. constantly to obtain the next time-viscosity profile, from which the melt viscosity was minimum. The time to reach was found.

`` Adhesion Area for Bottom Chip ''

The lamination interface of the semiconductor chip of the 1st layer and the semiconductor chip of the 2nd layer of the semiconductor device manufactured by the Example and the comparative example was observed with the ultrasonic flaw detector, and the adhesive area was evaluated.

`` Damage in wire ''

About the semiconductor device manufactured by the Example and the comparative example, the continuity test of the wire wired to the semiconductor chip of 1st layer was done, and the presence or absence of the wire damage was evaluated.

`` Bleeding ''

In the Example and the comparative example, after bonding the semiconductor chip of the 2nd layer to the upper surface of the semiconductor chip of the 1st layer, the state of the chip | tip edge surface was observed with the optical microscope before carrying out resin sealing.

It was observed that the adhesive agent returned to the upper surface beyond the cross section of the second layer chip, and the bleeding "is present" and the one not observed were regarded as "bleeding".

`` Package Reliability ''

The package of the semiconductor device manufactured in Example and Comparative Example was allowed to stand for 120 hours under 30 ° C. and 70% RH conditions, absorbed moisture, and then subjected to IR reflow twice at a maximum temperature of 240 ° C. In the case of floating, peeling and peeling of the joint and the occurrence of package cracking were evaluated by a scanning ultrasonic flaw detector and cross-sectional observation.

`` Adhesive layer ''

The composition of the adhesive agent layer is shown below. These are common to the examples and the comparative examples.

(A) Adhesion component: 55 mass parts of butyl acrylate, 10 mass parts of methacrylic acid, 20 mass parts of glycidyl methacrylate, and 15 mass parts of 2-hydroxyethyl acrylate copolymerize the weight average molecular weight about 800,000, glass transition Copolymer of temperature -28 ° C

(B) Thermosetting component: The mixture of the following components was used.

Acrylic rubber fine particle dispersion bisphenol A liquid epoxy resin (Nippon Shokubai company make, BPA328, epoxy equivalent 230): 30 mass parts

Bisphenol A solid epoxy resin (made by Nippon Shokubai Corporation, 1055, epoxy equivalent 875-975): 40 mass parts

o-cresol novolac-type epoxy resin (manufactured by Nippon Kayaku Co., EOCN, epoxy equivalent 213 to 223): 10 parts by mass

Dicyandiamide curing agent (made by Asahi Denka Corporation, Adeka Hardner 3636AS): 1 part by mass

Imidazole hardening accelerator (manufactured by Shikoku Kasei Kogyo Co., Cursol 2PHZ): 1 part by mass

(C) energy ray curable components:

C1: dipentaerythritol hexaacrylate (manufactured by Nippon Kayaku Co., Ltd., Gayarard DPHA)

C2: photoinitiator (2,4,6-trimethylbenzoyldiphenylphosphine oxide)

(D) other ingredients:

D1: Silane coupling agent (made by Mitsubishi Chemical Corporation, MKC silicate MSEP2)

D2: polyisocyanate crosslinking agent (adduct of trimethylolpropane and toluylene diisocyanate)

(Example 1)

(1) Production of dicing die bonding combined adhesive sheet

Roll knife coater (roll) so that dry film thickness may be set to 50 micrometers on the surface which peeled-processed the adhesive agent composition of the compound of Table 1 with the silicone resin of the peeling film (38 micrometers of thickness made by Lintec, SP-PET3811). Using a knife coater, the coating was dried, and laminated on a substrate having a thickness of 100 µm (ethylene methacrylate methyl copolymer film, surface tension of 35 mN / m) to obtain an adhesive sheet.

As a pressure-sensitive adhesive sheet for fixing a ring frame, a pressure-sensitive adhesive sheet (a shape in which a circular diameter of an inner diameter of 165 mm was cut off) was formed on a polyvinyl chloride film (80 μm) with a re-peelable acrylic pressure-sensitive adhesive (10 μm). The adhesive sheet of the adhesive sheet prepared above and the polyvinyl chloride film surface are laminated, cut into a donut shape of concentric circles having an outer diameter of 207 mm, and an adhesive sheet for fixing a ring frame to the outer periphery. The dicing die-bonding combined adhesive sheet which has the obtained was obtained.

(2) Production of Semiconductor Chip with Adhesive Adhesive Layer

A dummy circuit (aluminum wiring) having a bonding pad portion on a mirror surface of a 100 mm diameter silicon wafer was formed by sputtering. The back surface of this silicon wafer was ground to 200 micrometers in thickness by the wafer grinding apparatus.

Subsequently, the dicing die-bonding combined adhesive sheet obtained in (1) was stuck to the back surface of the silicon wafer, and was fixed to the ring frame for dicing (2-6-1 made from Disco Corporation). Subsequently, ultraviolet rays were irradiated from the substrate surface using an ultraviolet irradiation device (Adwill RAD2000, manufactured by Lintec Corporation). Subsequently, the silicon wafer was diced into the chip size of 5.0x5.0 mm using the dicing apparatus (AWD-4000B by the Tokyo Seimitsu company). At this time, the substrate was further cut beyond the adhesive layer to a depth of 10 μm.

(3) Fabrication of two-stage stack type semiconductor device

As a simulated substrate for the IC package, a glass epoxy substrate (90 μm) coated with a solder resist was prepared. In addition, the solder resist on one side of the simulated substrate is patterned for copper bonding, nickel plating, and gold plating in the portion without coating in order. It was made as a terminal, and it connected by the via-hole and the area | region for solder ball mounting provided in the opposite surface of the simulation board | substrate.

The semiconductor chip with the adhesive agent layer created in said (2) (it is still fixed to the dicing die-bonding adhesive sheet) is picked up by the die-bonding apparatus (NEC Machinery Co., CPS-100), and simulation is performed. It crimp | bonded on the die pad part of a board | substrate on 120 degreeC, 150 Mpa, and 1 second conditions, Then, the adhesive agent layer was hardened on the conditions of 160 degreeC and 60 minutes, and the chip mounting of the 1st layer semiconductor chip was performed. Subsequently, wire bonding was performed by the wire bonding apparatus (the UTC-400 by Shinkawa Co., Ltd.) and the die pad part of the semiconductor chip of a 1st layer, and the die pad part of a board | substrate. At this time, the wire height was about 40 micrometers.

Further, the die bonding step and the wire bonding step of the semiconductor chip of the second layer were performed on the upper surface of the semiconductor chip of the first layer under the same apparatus and the same conditions as those of the semiconductor chip of the first layer.

Subsequently, the side where the chip | tip of the board | substrate was mounted with the molding resin (containing biphenyl type epoxy resin and phenol novolak resin) was shape | molded to predetermined shape, and it hardened resin at about 175 degreeC and 6 hours. Encapsulated. Subsequently, a solder ball having a diameter of 0.45 mu m was mounted on the side of the unsealed substrate by a predetermined method to complete a two-stage stack type IC package having a ball grid allay (BGA) type.

(Comparative Examples 1 and 2)

It carried out similarly to Example 1 except having used the combination of the comparative examples 1 and 2 of Table 1. The results are shown in Table 1.

According to the present invention, in the so-called stacked semiconductor device, the damage of the bonding wire generated during stacking is reduced, and the height of the semiconductor device caused by poor accuracy in the thickness of the adhesive layer bonding the semiconductor chips to each other, the substrate The nonuniformity of the height from the surface of the uppermost semiconductor chip to the surface of the uppermost semiconductor chip and the inclination of the uppermost semiconductor chip can be eliminated, thereby contributing to the improvement of the quality and productivity of the semiconductor device.

Claims (6)

It becomes a base material and the adhesive agent layer laminated | stacked so that peeling is possible on the said base material, The adhesive layer has room temperature pressure-sensitive adhesiveness and thermosetting property, and the elastic modulus of the adhesive layer before thermal curing is 1.0 × 10 ³ to 1.0 × 10 ⁴ GPa, and the melt viscosity at 120 ° C. of the adhesive layer before thermosetting Is 100-200 Pa.sec., And the time until melt viscosity reaches minimum value when the adhesive agent layer before thermosetting is made constant at 120 degreeC is dicing die bonding characterized by the above-mentioned. Combined adhesive sheet. The said adhesive agent layer has energy-beam hardenability, and the physical property of Claim 1 is a physical property before thermosetting after energy-beam hardening, The dicing and die-bonding adhesive bond sheet of Claim 1 characterized by the above-mentioned. The adhesive bonding sheet for dicing and die bonding according to claim 1 or 2, which is used for adhesive fixing between semiconductor chips of a stacked semiconductor device. The dicing die-bonding adhesive sheet of Claim 1 is stuck to the back surface of the semiconductor wafer in which the semiconductor chip which comprises the upper layer rather than the 2nd layer of a stacked semiconductor device is stuck, Full-cut dicing of the said semiconductor wafer with an adhesive agent layer for every semiconductor chip, The semiconductor chip which has an adhesive agent layer on the back surface is picked up from a base material, Separately, a substrate on which a semiconductor chip constituting the first layer to which wires are connected is prepared is prepared, and the substrate is heated, After the adhesive agent layer surface of the said semiconductor chip is buried in the wire formation surface of the said board | substrate, and the adhesive agent layer surface contacts the surface of the semiconductor chip which comprises a 1st layer, A method of manufacturing a stacked semiconductor device, wherein the adhesive layer is thermally cured. The dicing die-bonding combined adhesive sheet of Claim 2 is stuck to the back surface of the semiconductor wafer in which the semiconductor chip which comprises the upper layer rather than the 2nd layer of a stacked semiconductor device is stuck, The semiconductor wafer is subjected to full cut dicing with the adhesive layer for each semiconductor chip, energy ray irradiation is performed before or after the full cut dicing, and the semiconductor chip having the adhesive layer on the back surface is picked up from the substrate. So, Separately, the board | substrate with which the semiconductor chip which comprises the 1st layer which the wire is connected is prepared is prepared, the said board | substrate is heated, After the adhesive agent layer surface of the said semiconductor chip is buried in the wire formation surface of the said board | substrate, and the adhesive agent layer surface makes contact with the surface of the semiconductor chip which comprises a 1st layer, A method of manufacturing a stacked semiconductor device, wherein the adhesive layer is thermally cured. 6. The method for manufacturing a stacked semiconductor device according to claim 4 or 5, wherein a dicing die-bonding adhesive sheet having a thickness of 5 to 50 µm thicker than the wire height is used.

Images