KR20070002665A - Flux capacitor of semiconductor devices - Google Patents

Abstract

A flux capacitor of a semiconductor device is provided to improve the integration degree and to enhance the capacitance by using a VPP(Vertical Parallel Plate). A flux capacitor of a semiconductor device is provided with a vertical parallel plate structure. A first port portion and a second port portion are provided with a planar structure of comb shape, so that the surface area of the flux capacitor is increased. The VPP structure is provided with at least two-layer of metal line and a via hole.

Description

Flux capacitor of semiconductor devices

1 is a graph comparing a measurement result of a parallel wires flux capacitor with a MIM capacitor according to a line width of a metal wiring.

2A to 2C are perspective views showing a conventional flux capacitor.

3 is a conceptual diagram illustrating an operation principle of a flux capacitor.

4 and 5 are a plan view and a cross-sectional view showing a flux capacitor according to an embodiment of the present invention.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flux capacitor of a semiconductor device, and more particularly to a technique for simultaneously improving high capacitance density and high frequency characteristics.

In general, capacitors are essential for integrated circuits such as sample and hold, analog / digital (A / D) and digital / analog (D / A) converters, switched capacitors, and continuous-time filters, as well as radio frequency (RF) blocks. Element.

In many of these applications, capacitors consume a large portion of the chip area. Thus, capacitor area efficiency is very important.

In analog applications, other desired properties for capacitors are the approximate matching, linearity of adjacent capacitors, and the accuracy (ie tolerance) of parasitic capacitors and absolute values between small bottom-plates and substrates.

In RF applications, the capacitor requires a large quality factor Q at the frequency of interest, and also a fairly large self resonant frequency. And good linearity and large breakdown voltage are the other two characteristics desired for good RF capacitors.

FIG. 1 is a graph comparing a measurement result of a parallel wires flux capacitor with a MIM capacitor according to a wire width of a metal wire, and a Q-value and a capacitance value of a parallel wire flux capacitor are measured using a MIM capacitor. It is compared with that of.

Referring to FIG. 1, it can be seen that the flux capacitor has better Q-value characteristics than the MIM capacitor at approximately 4 GHz and above.

In addition, the narrower the line width of the Pararell wire flux capacitors with different metal line widths, the smaller the parasitic capacitors with the substrate, thus benefiting from Q-performance.

The graph is a measurement result of a parallel wire type flux capacitor, which can be extended to the use of a VPP type flux capacitor for the present invention. For reference, since the minimum design rule is applied to the space of the metal wiring, the effect of the horizontal electric field is greater than the effect of the vertical electric field, and the above results can be applied to the flux capacitor of the VPP type using only the horizontal electric field.

In general, several methods have been adopted to improve the area efficiency of capacitors.

First, in applications in which the linearity of the capacitor and the quality factor Q are not important, nonlinear capacitors having high capacitance densities such as junction or gate oxide capacitors have been used for a long time. However, these capacitors have the disadvantage of requiring dc bias and being highly dependent on process and temperature. In addition, in a high precision circuit such as a data converter, it is limited to a bypass of a bypass, coupling capacitor or RF circuit.

On the other hand, metal-metal and metal-poly capacitors have very good linearity and quality factor Q. However, they have the disadvantage of low capacitance density. The low capacitance density mainly comes from the large metal-metal / metal-poly vertical spacing that determines the capacitance in the Horizontal Parallel Plate (HPP) structure shown in FIG. 2A.

Since the large vertical spacing does not shrink as fast as lateral separation to avoid excessive crosstalk between the digital metal lines of the other layers, parallel plate capacitors consume a larger partial die area.

In addition, although additional processing steps, including depositing a thin layer of insulator between two metal or poly layers, may alleviate the vertical spacing problem to some extent, it cannot be used in many standard silicon-based technologies. Although this particular capacitor layer is used, the parallel plate structure does not necessarily produce the best capacitance density possible. The capacitance density can be improved by a structure utilizing lateral and vertical electric field components.

A well known example of a structure utilizing the transverse and vertical electric field components is an interdigitated parallel wire structure as shown in FIG. 2B.

Recently, several new structures have been proposed as a method of obtaining higher capacitance per unit area.

These structures include quasi-fractal structures, woven structures connected using vias, and second woven structures without via interconnects.

The new structure exhibits the same linearity as the HPP structure including both metal-metal / poly capacitors. At this point, the only difference between the new structure and the HPP structure is the higher capacitance density. Since more field lines end on adjacent metal lines as opposed to the substrate, these structures also provide lower bottom plate capacitance.

Despite these advantages, quasi-fractal structures and fabric structures have not been widely used in the signal paths of analog circuits.

The reason is that predicting their absolute capacitor values is complicated and time consuming.

In addition, it cannot be concluded that the quasi-fractal and woven structures are always advantageous for more regular structures, such as interdigitated parallel wire structures.

Therefore, there is a need for a new high efficiency capacitor structure that compares the standard HPP structure, quasi-fractal structure, and woven structure to exhibit high capacitance density and good matching properties.

Formed for this purpose is a capacitor structure of a vertical parallel plate (VPP) shown in Figure 2c.

In this case, the VPP structure is formed of a plurality of vertical plates formed of multiple conductive strips 11 contacted with upper and lower portions by vias 13. Each of the vertical plates is parallel to each other and is located at a predetermined lateral distance from adjacent vertical plates.

The conductive strip 11 may be a metal conductive strip or a polysilicon strip. In addition, the vias 13 may be slotted vias, interleaved vias or discrete vias.

The VPP structure maximizes the use of lateral flux using a vertical plate formed of conductive strips 11, wherein the conductive strips 11 are connected using vias 13 that maximize the lateral area of the vertical plate. The via 13 interconnect increases the effective lateral area of the vertical plate and lowers the series electrical resistance by the introduction of an alternating current path while generating a high quality factor Q for a given capacitor value. In addition, the inductance inherent is reduced by the current flowing in the opposite direction of the vertical plate 302, and the VPP structure achieves higher capacitance density, resulting in smaller physical dimensions for a given capacitor value resulting in a shorter average signal path. . Thus, it has a higher self resonant frequency.

As described above, the flux capacitor of the semiconductor device according to the related art can be formed to have a smaller size than the MIM capacitor, but there is a problem in that a capacitance sufficient for high integration of the semiconductor device cannot be secured.

In order to solve the above problems of the prior art, an object of the present invention is to provide a flux capacitor of a semiconductor device to ensure a sufficient capacitance for high integration of the semiconductor device.

In order to achieve the above object, the flux capacitor of the semiconductor device according to the present invention,

In a flux capacitor of a semiconductor device,

It is provided with a vertical parallel plate (VPP) structure, the first port portion and the second port portion is provided with a comb-shaped planar structure to increase the surface area,

The vertical flat plate structure is provided with at least two layers of metal wiring and via holes,

The metal wiring is characterized in that provided based on aluminum or copper.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

3 is a cross-sectional view showing a flux capacitor of a semiconductor device, which simplifies the function of the device by displaying an electric field between metal wirings.

Referring to FIG. 3, when the metal wires arranged in the horizontal and vertical directions have different electrodes, electric fields between the wires are formed as shown in the figure.

As a result, the plug capacitor is a device using an IMD material between the metallization layers as a dielectric material, and as the process technology advances, the capacitance value that can be realized by the increase of the wiring layer and the reduction of the wire width is increased, and the area efficiency can be increased.

Table 1 compares the three types of capacitance densities, areas, self resonant frequencies, and fidelity (Q-factor) measured at 1 GHz with similar capacitance values around 1 pF. will be.

It can be seen from the comparison table that the flux capacitor having the VPP structure shows the best characteristics when comparing the device area, capacitance density and high frequency characteristics.

4 and 5 illustrate a flux capacitor of a semiconductor device according to an embodiment of the present invention.

4 is a plan view of a metal wiring based flux capacitor based on the characteristics of Table 1, and FIG. 5 is a cross-sectional view taken along the line VIII-VIII of FIG.

4 and 5, the flux capacitor is laminated through the via hole of the metal wiring to apply the VPP structure using only the electric field in the horizontal direction.

The flux capacitor is a comb-shaped planar structure of the first port and the second port using a minimum line width allowed for fixing technology to improve the device performance and fidelity of the flux capacitor shown in FIGS. 2A to 2C. Four layers of metal wiring formed to cross each other are stacked.

That is, it is formed by connecting as many via holes as possible to increase the cross-sectional area and to reduce the resistance of the metal wiring to increase the electric field generated in the horizontal direction.

At this time, the width W and the spacing S of the flux capacitor are formed to the minimum size allowed by the process technology.

The vertical flat plate (VPP) structure includes at least two layers of metal wires and via holes, and the metal wires are provided on the basis of aluminum or copper.

As described above, the flux capacitor of the semiconductor device according to the present invention has an effect of providing a plug capacitor with a comb-shaped planar structure having a VPP structure to provide sufficient capacitance for high integration of the semiconductor device. to provide.

In addition, a preferred embodiment of the present invention is for the purpose of illustration, those skilled in the art will be able to various modifications, changes, substitutions and additions through the spirit and scope of the appended claims, such modifications and changes are the following claims It should be seen as being in scope.

Claims (3)

In a flux capacitor of a semiconductor device, A vertical parallel plate (VPP) structure, the first port portion and the second port portion of the semiconductor device flux capacitor, characterized in that the surface area is increased by the comb (comb) planar structure is increased. The method of claim 1, The vertical flat plate structure is a flux capacitor of a semiconductor device, characterized in that provided with at least two layers of metal wiring and via holes. The method of claim 1, The metal wiring is a flux capacitor of the semiconductor device, characterized in that provided on the basis of aluminum or copper.

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