KR20060130470A - Method of transparency and flexible silicon and silicon wafer fabricated by the same - Google Patents

Abstract

A method for manufacturing a transparent and flexible silicon substrate and a silicon wafer fabricated by the same are provided to control a thickness through a relatively simple manufacturing process. A method for manufacturing a transparent and flexible silicon substrate includes the steps of: preparing a transparent and flexible single crystal substrate; preparing an organic EL emission device by forming an EL layer and electrodes on the single crystal substrate; and forming a protection layer to seal the organic EL emission device.

Description

A method of manufacturing a transparent and curved silicon substrate and a silicon wafer manufactured according thereto {Method of Transparency and Flexible Silicon and Silicon Wafer Fabricated by the same}

1 to 2 are diagrams showing a schematic configuration of a general organic EL display.

3 is a process flowchart showing a process step of manufacturing a conventional SOI wafer.

Figure 4 is a process flow diagram showing the process step of manufacturing a nano SON wafer according to an embodiment of the present invention.

5 is a process flowchart showing a process step of manufacturing a transparent and bent silicon substrate using a nano SON wafer according to an embodiment of the present invention.

6 to 10 are process cross-sectional views illustrating each process step of manufacturing a nano SON wafer according to an embodiment of the present invention.

11 to 15 are process cross-sectional views illustrating respective process steps of manufacturing a transparent and curved silicon substrate using a nano SON wafer according to an embodiment of the present invention.

16 to 17 are transparent and curved silicon wafers produced according to each process step of manufacturing a transparent and curved silicon substrate using a nano SON wafer according to one embodiment of the present invention.

<Description of Symbols for Major Parts of Drawings>

10; Bonded wafer

11, 31; Nitride film

12, 32; Oxide film

14; Hydrogen ion injection part

20; Reference wafer

The present invention relates to a manufacturing method of a SON wafer and a transparent and bent silicon substrate manufacturing technology using the SON wafer manufactured accordingly, and more particularly to a silicon substrate manufacturing technology having a nano-class thickness to be used as an anode of an organic light emitting diode. It is a tube.

    Using thinning technology of single crystal silicon substrate, the active layer of the device is fabricated on the single crystal silicon substrate by applying design rules of general semiconductor process to obtain the desired device characteristics and to reduce the size of the device. The high-resolution flexible organic EL display is manufactured by giving a flexible and light transmitting function to a board | substrate.

    The organic EL display has various advantages, such as low power consumption and high-speed response, which can meet the needs of portability and moving image display, compared to the liquid crystal display which is the mainstream of flat panel display. It is attracting attention as a flat panel display that can replace.

1 and 2 are diagrams showing a schematic configuration of a general organic EL display. This organic electroluminescent display is equipped with the transparent glass substrate, and the anode layer 3 (Anode) is formed of this transparent substrate by transparent conductive materials, such as ITO. A hole injection layer 4 and a hole transport layer 5 for supplying holes by applying a voltage are formed on the anode layer, and on the organic light emitting layer including a small amount of organic dye as a dopant ( 6, an Emitting layer is formed, an electron injection layer (7, Electron transport layer) for supplying electrons is formed thereon, and a cathode layer (8, Cathode) of the conductive material to be the uppermost layer is formed thereon It is. In addition, after the organic EL device is manufactured by forming the cathode layer, a protective layer sealing the organic EL device from the outside encapsulates the organic EL device in order to protect the organic EL device which is very susceptible to oxidation.

    In the organic EL display as described above, when a voltage is applied between the anode layer and the cathode layer by a power source, holes are injected into the organic light emitting layer from the hole injection layer and the hole transport layer stacked on the anode layer to which the voltage is applied. Electrons are injected into the organic light emitting layer from the electron injection layer below the applied cathode layer. In the organic light emitting layer in which the holes from the hole transport layer and the electrons from the electron injection layer are respectively injected, the holes and the electrons are combined, and the energy generated by the recombination is absorbed by the organic dye included in the organic light emitting layer and emits light. The light generated in the organic light emitting layer sequentially passes through the hole transport layer, the hole injection layer, the anode layer, and the glass substrate, and exits from the back side of the glass substrate (bottom injection). Such an organic EL display may be manufactured by a method of emitting light in the upward direction of the organic EL display by manufacturing the protective layer as a transparent material in addition to the structure of emitting light to the back surface of the substrate.

    In addition, the organic EL display may adopt a driving scheme for driving an active matrix (which is advantageous for color displays) that is driven by using a thin film transistor, etc., in addition to the driving scheme for performing a passive matrix driving.

    The active matrix drive type organic EL display using the above TFT as a driving element is manufactured by forming TFTs on a glass substrate or a polycrystalline silicon layer, but such a TFT cannot use a conventional semiconductor process as it is, and therefore high density integration is impossible. In addition, there is a limitation in TFT device performance, so that a high performance TFT cannot be manufactured on a substrate, and it is difficult to integrate complex system circuits or reduce the size of the pixel device.

    On the other hand, the technique of manufacturing an active matrix type organic EL display using insulated gate field effect transistors formed on a single crystal semiconductor substrate is the same as that of the semiconductor process technology used in the field of large scale integrated circuits compared to the case of using the organic substrate. It is advantageous in that it is applicable and can be formed by integrating high-performance transistors capable of driving low voltage at high speed on a substrate at high density. However, on the other hand, when manufacturing an organic EL element on a single crystal semiconductor substrate, the organic EL display has a problem of being limited to the top injection method because the substrate does not pass visible light.

    Conventional OLED fabrication techniques are being made using transparent electrodes or amorphous, polycrystalline silicon using glass substrates. Conventional fabrication methods are less flexible in glass substrates than in single crystal silicon using nano ultra-thin film process and less mobile than monocrystalline silicon in amorphous and polycrystalline silicon. When using existing OLED, there are many limitations in manufacturing high resolution display through high integration. In order to overcome these shortcomings, OLED manufacturing technology using nano ultra-thin process in this study secures low cost and high integration technology to cope with the future multimedia era, and saves cost such as energy saving, light weight and thinning by developing low power consumption technology. This technology is suitable for securing productivity improvement technology.

    However, despite many studies, the development of OLED process technology for depositing organic materials on the nano silicon substrate newly proposed in this study is a new technology OLED process technology that has not been carried out by existing display companies. In addition, the team hopes to develop OLED device technology in which a light emitting device is formed on very thin flexible single crystal silicon, which has a much higher response speed than conventional OLEDs. This not only lowers the cost of the process by replacing the ITO layer, but also enables the application of fine technology in the semiconductor process by using a silicon wafer as a substrate, thereby realizing a high resolution display. In addition, by adjusting the doping concentration of the silicon substrate used in place of ITO, the specific resistance value can be lowered, and thus a work function similar to that of ITO can be obtained in the case of p-type silicon substrate. A technology that can replace ITO with a silicon substrate can easily form a high temperature TFT, and thus has the advantage of making a driving circuit on the same substrate, which plays an important role in achieving low cost and high integration. In particular, it is possible to develop a new device that improves the threshold voltage and efficiency by inserting a thin insulator thin film between the electrode having a low work function and the Alq3 thin film, which is an electron transport layer, in the OLED structure.

SUMMARY OF THE INVENTION An object of the present invention is to provide a base technology for manufacturing a transparent and curved organic light emitting display, and to produce a nano silicon on nitride (SON) wafer for obtaining a nano-class transparent and curved silicon substrate having excellent thickness uniformity. To provide a way.

    SUMMARY OF THE INVENTION An object of the present invention is to provide a method for producing a nano SON wafer for obtaining a large area transparent and curved silicon substrate using a nitride film having an excellent selectivity to etching solution.

    An object of the present invention is to provide a nano SON wafer manufactured by the manufacturing method according to the present invention.

    It is an object of the present invention to provide a method and a SON wafer which can omit ITO film growth during the manufacture of an organic light emitting display by implanting boron ions into the nano SON wafer prepared according to the present invention.

    It is still another object of the present invention to provide a SON wafer and a method capable of omitting ITO film growth in manufacturing an organic light emitting display by fabricating a SON wafer using a boron ion implanted device wafer during the process of the present invention.

    The final object of the present invention is to produce an organic light emitting display using a nano SON wafer manufactured by the manufacturing method of the present invention.

In the method of manufacturing a nano SON wafer according to the present invention for achieving the objects of the present invention, a bonded wafer and a reference wafer are prepared, and an insulating film made of a nitride film and an oxide film is formed on at least one surface of the reference wafer. Subsequently, impurity ions are implanted at a predetermined depth from a surface of the bonded wafer to form an impurity ion implantation portion, and then the insulating film of the reference wafer and the bonded wafer are brought into contact with each other. Subsequently, low-temperature heat treatment is performed to cleave the impurity ion implantation portion of the bonded wafer, and the cleaved surface of the bonded wafer adhered to the reference wafer is etched to form nanoscale device formation regions.

    The bonded wafer may be a single crystal silicon wafer, and the method may further include forming an oxide film on a surface of the bonded wafer before bonding to the reference wafer on which the insulating film is formed. In addition, one or more impurity ion implantation portions may be formed by implanting one or more impurity ions into the bonded wafer.

    The impurity ions are hydrogen ions, and the hydrogen ions are implanted under a low voltage, for example, a low voltage of 30 KeV or less, and the projection specific distance Rp of the ion implanted hydrogen ions is close to the surface of the bonded wafer. For example, it is preferable to form in the range of 1000-4000 micrometers. The other impurity ions are boron ions and phosphorus ions, and are preferably formed within a range smaller than the projection specific distance Rp of the ion implanted hydrogen ions. The projection specific distance can be controlled by adjusting the ion implantation voltage.

    The step of adhering the bonded wafer and the reference wafer is preferred in that contacting at least a portion of the bonded wafer and the reference wafer and subsequently adhering while increasing the contact area can reduce the occurrence of voids at the contact surface. For example, the bonded wafer and the reference wafer may be contacted with each other by pressing at least a portion of the lower side in the vertical direction and then sequentially pressing the bonded wafer while increasing the contact area in the upper direction.

    The step of cleaving the impurity ion implanted portion of the bonded wafer is performed by heat treatment at a low temperature of 400 ° C. or lower, preferably so that the Rms value of the cleaved surface of the bonded wafer is 30 to 40 kPa, preferably the bonded wafer. In the step of cleaving, the remaining thickness of the bonded wafer bonded to the reference wafer is 3000 mm or less.

    Meanwhile, in the forming of the device forming region by etching the cleaved surface of the bonded wafer, wet etching the cleaved surface of the bonded wafer combined with the reference wafer may be performed on the surface of the wet-etched bonded wafer. By hydrogen heat treatment. Prior to wet etching the cleaved surface of the bonded wafer bonded to the reference wafer, the method may further include performing a hydrogen heat treatment on the cleaved surface of the bonded wafer, which is cleaved of the bonded wafer. Efficient to wet etch the surface, and performing a hydrogen heat treatment on the surface of the bonded wafer is performed for at least 1 minute at a temperature of 1100 ℃ or more.

    In addition, a SON wafer in which boron is ion-implanted in the device layer may be manufactured by combining boron having a predetermined concentration and a projection distance or more with the reference wafer after the ion implantation. Since the device layer of the boron-implanted SON wafer has low resistance, the ITO film used as an electrode in the manufacture of an organic EL display can be omitted, and the device layer of the SON wafer can be used as an anode as it is.

The wet etching of the cleaved surface of the bonded wafer bonded to the reference wafer may be performed using a mixed solution of NH ₄ OH, H ₂ O _2, and H ₂ O as an etchant, and the etching rate is low. It is preferable at the point which can adjust uniformly.

    On the other hand, in the nano SON wafer manufactured by the manufacturing method of the present invention according to the other object of the present invention, the thickness of the device formation region is 300nm or less, preferably 10 to 200nm.

    An oxide film and a nitride film having a predetermined thickness are formed on both surfaces of the nano SON wafer to be used as a protective film in wet etching. At this time, an oxide film is first formed on the SON wafer, and then a nitride film is formed. The oxide film not only functions as a protective film but also serves as a buffer between the nitride film and the bonded wafer, and an oxide film grown by the CVD method or a thermal oxide film can be used.

    Partial etching of the oxide film and the nitride film on the reference wafer of the nano SON wafer having the oxide film and the nitride film formed on both surfaces thereof is preferably performed in that HF vapor can be uniformly controlled.

    The etching of the exposed silicon portion in which the oxide film and the nitride film are etched by HF vapor on the surface of the reference wafer of the SON wafer, and the oxide film and the nitride film does not exist, is performed using a KOH solution as an etching solution. It is preferable in that an etching thickness can be adjusted uniformly. At this time, the oxide film and the nitride film forming the insulating film of the reference wafer serve as an etch stop layer for the KOH solution. In particular, since the nitride film is not etched at all in the KOH solution, the silicon layer, which is a device layer, can be protected from the KOH solution and thus can be used as an excellent stop layer.

    According to the present invention, it is possible to effectively perform nanoscale silicon substrate manufacturing having an Rms value sufficient to be used as an anode of an organic light emitting diode.

    Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

    The embodiments described below may be modified in various forms, and the scope of the present invention is not limited to the embodiments described below. The embodiments of the present invention are provided to more completely explain the present invention to those skilled in the art. In the drawings illustrating embodiments of the present invention, the thicknesses of certain layers or regions are exaggerated for clarity of the specification, and like reference numerals in the drawings refer to like elements. In addition, where a layer is described as being on the 'top' of another layer or substrate, the layer may be directly on top of the other layer or substrate, and a third layer may be interposed therebetween.

    4 is a process flowchart showing a method for manufacturing a nano SON wafer according to a preferred embodiment of the present invention, Figures 5 to 10 are process cross-sectional views for explaining a method for manufacturing a nano SON wafer according to an embodiment of the present invention. .

    6 to 10, first, a base wafer 20 and a bonded wafer 10 bonded to each other by a subsequent process are prepared (S10). The reference wafer 20 serves as a support for physically supporting the SON wafer, also referred to as a handling wafer, and the bonded wafer 10 is a channel region (device formation region) of a semiconductor device formed by a subsequent process. It is also called a device wafer as a wafer.

    Subsequently, the nitride film 11 is formed on at least one surface of the reference wafer 20 made of, for example, single crystal silicon (S12), and an oxide film, that is, a CVD oxide film 12 is performed by performing a CVD process thereon, for example. To form (S14). The nitride film and the oxide film play a role of a buried oxide layer (BOX layer) in a conventional SOI wafer, and may be formed to a thickness of several tens to thousands of micrometers as needed.

    In FIG. 7, the nitride film 11 and the oxide film 12 are formed only on the upper surface of the reference wafer 20, but the oxide film 12 may be formed on the entire surface of the reference wafer 20 exposed by the oxide film process. If necessary, this state may be maintained or the remainder may be removed so that the oxide film 12 remains on only one surface of the reference wafer 20.

    On the other hand, although not shown in Figs. 6 to 10, if necessary, a silicon oxide film having a thickness of several tens to thousands of micrometers is formed on the bonded wafer 10, and the reference wafer 20 having the nitride film 11 and the oxide film 12 formed thereon; You may join.

Subsequently, low voltage impurity ions, such as hydrogen ions, are injected into the bonded wafer 10 (S16). In the present embodiment, the implantation energy of hydrogen ions was used as low voltage energy of about 30 KeV, the hydrogen dose was about 6 × 10 ¹⁶ cm ^-2 . Accordingly, a hydrogen ion implantation portion 14 having a projection non-determined distance Rp is formed at a predetermined depth from the surface of the bonded wafer 10, and the bonded wafer 10 is coupled to the corresponding element forming portion 10b. It will be divided into the removal unit (10a). In FIG. 3, the hydrogen ion implantation unit 14 is indicated by a dotted line, but the hydrogen ion implantation unit means a region in which hydrogen ions are distributed with a constant width.

    Next, the reference wafer 20 and the bonded wafer 10 are cleaned to remove contaminants on the surface, and the two wafers are vertically bonded (S18). The adhesion is preferably carried out at room temperature, wherein the two wafers are bonded to each other by hydrogen bonding under hydrophilic conditions.

    4 and 9, heat treatment is performed at a low temperature to cleave a portion of the hydrogen ion injection unit 14 (S20). In this embodiment, the cleavage heat treatment is performed at least about 1 minute at a temperature of about 400 ℃ or less. The cleavage process is performed when bubbles in the hydrogen ion implantation part interact with each other during the heat treatment to form a sufficient blister and propagate the flake phenomenon. In the present embodiment, the Rms value of the cleaved surface of the bonded wafer 10 is maintained in the range of about 30 to about 40 mV, and the thickness of the element forming portion 10b after the cleavage is about 3000 mV.

    Subsequently, referring to FIG. 4, if necessary, the hydrogen ion implantation portion 14 of the bonded wafer 10 is cleaved by low temperature heat treatment, and then the first hydrogen heat treatment is performed on the surface of the cleaved element formation portion 10b. (S22). In the hydrogen atmosphere, the heat treatment temperature is performed at 1100 ° C. or more for at least 1 minute. After the hydrogen heat treatment, the Rms value of the element forming unit 10b is lowered from 30 to 40 kPa to 10 kPa or less.

4, after performing the first hydrogen heat treatment, wet etching is performed on the surface of the cleaved device forming unit 10b (S24). The etchant used was NH ₄ OH: H ₂ O ₂ : H ₂ O = 0.5: 1: 5 etchant, the etching temperature was carried out in the range of 65 to 100 ℃, the etching time and the thickness of the etching is the desired final device formation area It was set in consideration of the thickness of (10c in Fig. 9). In the case of nano-class SON, etching is continued so that the thickness of the device formation region 10c is 10 to 200 nm or less. The reason why the etchant of the present invention is selected is that the etching rate is low and the uniformity of the etching thickness after etching is excellent.

    5 is a process flowchart showing a process step of manufacturing a transparent and bent silicon substrate using a nano SON wafer according to a preferred embodiment of the present invention, Figures 8 to 14 are nano SON wafer according to an embodiment of the present invention Process cross-sectional views showing each process step of manufacturing a transparent and curved silicon substrate using.

    A protective film may be formed on both surfaces of the SON wafer (FIG. 9) made by the above-described method by various conventional methods, and for example, an oxide film, that is, a silicon oxide film 32, may be formed on the surface of the SON wafer by performing a thermal oxidation process. To form (S52). In order to withstand the etching solution sufficiently, a nitride film 31 having an etching selectivity higher than that of the oxide film is further formed on the SON wafer (S54).

    5 and 12, in order to etch the reference wafer 20 to obtain a transparent silicon substrate, wet etching is performed on the passivation layer on the reference wafer 20 while leaving portions to deal with the wafer ( S56). HF vapor was used in etching because of the characteristic of etching the oxide film and the nitride film without etching silicon.

    5 and 13, wet etching is performed on the reference wafer 20 exposed by the process (S58). A 30% KOH solution was used as an etchant, and the etching temperature was performed in the range of 60 to 80 ° C. An oxide film and a nitride film serving as a buried oxide layer (BOX layer) in the existing SOI wafer among the SON wafers were exposed. Etched until. The reason for selecting the etchant of the present invention is that the etching speed is quickly and uniformly etched out.

    5, 14 and 15, after the etching process for the reference wafer 20 is completed, a process of finally etching the remaining oxide film and nitride film is performed (S60). This process is carried out in the same manner as the etching process of the oxide film and the nitride film described above. After the completion of the process, it can be seen that a transparent and curved silicon thin film having an Rms value of 2 dB or less remains.

     Results according to the present embodiment are shown in FIGS. 16 and 17. FIG. 16 is a light transmissive silicon substrate wafer fabricated by the method of FIG. 5 using a SON wafer fabricated according to the SON process of FIG. 4 using the 8-inch silicon wafer as a reference wafer and a bonded wafer. FIG. 17 is a light transmissive silicon substrate wafer manufactured according to the method of FIG. 5 after cutting the SON wafer manufactured according to FIG. 4 to a predetermined size (70 mm × 70 mm). At this time, the wafer size can be adjusted, and the light transmitting area is adjustable.

    Although the above-described preferred embodiments of the present invention have been described above, the present invention is not limited thereto, and various modifications may be made by those skilled in the art within the scope of the technical idea of the appended claims.

The organic EL display of the present invention having the above-described configuration is manufactured using a single crystal substrate having light transmitting characteristics and bendable characteristics, so that the display can be bent with high resolution and flexibility. The organic EL display of the present invention having the above-described configuration uses a single crystal substrate having flexibility and light transmission characteristics, so that a semiconductor process to which a fine design rule can be applied can be applied as it is. The present invention can manufacture not only a top injection organic EL display but also a high performance bottom injection organic EL display by using a single crystal substrate having flexible light transmitting characteristics. In addition, the present invention can produce a high performance organic EL display in which the substrate itself can function as an electrode by using a single crystal substrate having flexible light transmitting characteristics, thereby simplifying the laminated structure. In addition, the present invention uses a single crystal substrate having a flexible light transmission characteristics, the excellent device characteristics and reliability of the single crystal silicon TFT enables the integration of various circuit driving devices to manufacture a flexible system on display (SOD). .

In addition, the present invention can produce a flexible light-transmitting single crystal substrate for an organic EL display whose thickness can be adjusted through a relatively simple and easy manufacturing process.

Claims (14)

Preparing a single crystal substrate that is flexible and transmits light, forming an organic EL layer and an electrode on the single crystal substrate to provide an organic EL light emitting device, and forming a protective layer encapsulating the organic EL light emitting device. Method for producing an organic EL display characterized in that it comprises a step The method of claim 1, wherein preparing the single crystal substrate comprises preparing a single crystal substrate that is flexible and transmits light using a SON substrate including a base substrate, an insulating layer, and a single crystal layer. Manufacturing method of the EL display The method of claim 2, wherein the manufacturing of the flexible and light-transmitting single crystal substrate using the SON substrate comprises removing the base substrate and the insulating layer of the SON substrate to make the single crystal layer flexible and light transmitting. Method for manufacturing an organic EL display comprising the step of manufacturing with Preparing a SON substrate including a base substrate, an insulating layer, and a single crystal layer; forming an organic EL layer and an electrode on the single crystal layer to provide an organic EL light emitting device; and a protective layer encapsulating the organic EL light emitting device. And forming the single crystal layer as a flexible and light transmitting single crystal substrate by removing the base substrate and the insulating layer of the SON substrate. The method of manufacturing an organic EL display according to any one of claims 1 to 4, wherein the step of preparing the organic EL light emitting element further comprises an electrode before forming the organic EL layer. The method of claim 3, wherein the removing of the base substrate and the insulating layer comprises removing the base substrate and the insulating layer by wet etching. The method of claim 6, wherein removing the base substrate comprises removing the base substrate by wet etching with KOH. The method of manufacturing an organic EL display according to claim 6, wherein the removing of the insulating layer comprises removing the insulating layer by wet etching with HF. The method for manufacturing an organic EL display according to any one of claims 2 to 4, wherein the thickness of the flexible light transmitting single crystal substrate is adjusted by adjusting the thickness of the single crystal layer of the SON substrate. The method of manufacturing an organic EL display according to any one of claims 2 to 4, wherein the manufacturing of the flexible light transmitting single crystal substrate is performed by etching one surface of the SON substrate using HF vapor. The method according to any one of claims 1 to 4, wherein a nitride film and an oxide film are used on at least one surface of the insulating film of the bonded wafer. The method according to any one of claims 1 to 4, wherein the bonded wafer is subjected to boron ion implantation to lower the resistivity of the wafer surface to produce a SON wafer. The method according to any one of claims 1 to 4, wherein a nitride film and an oxide film are used on at least one surface of the insulating film of the bonded wafer. The method for producing an organic EL display using the manufactured SON wafer according to any one of claims 11 to 12.

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