KR20060127603A - Lead frame type package having ground frame and stack package thereof - Google Patents

Abstract

A lead frame type package with a ground frame and a stacked package using the same are provided to reduce remarkably the thickness of the stacked package by embodying the interconnection between unit packages using a solder bonding manner through an outer lead and a ground lead. A semiconductor chip includes a plurality of bonding pads. A lead frame includes a plurality of inner leads(31) corresponding to a peripheral portion of the chip and a plurality of outer leads(32) prolonged from the inner leads. A ground frame includes a ground plate attached to a bottom surface of the chip and ground leads(42) prolonged from the ground plate. A plurality of bonding wires are used for connecting electrically a ground pad and the ground plate with each other. The bonding wires are for connecting electrically the bonding pads with the inner leads. A package body is used for enclosing selectively the chip, the inner leads and the bonding wires.

Description

LEAD FRAME TYPE PACKAGE HAVING GROUND FRAME AND STACK PACKAGE THEREOF

1 is a cross-sectional view of a lead frame type package according to a first embodiment of the present invention.

FIG. 2 is a partially cutaway perspective view of the lead frame type package shown in FIG. 1.

3 is a cross-sectional view of a laminated package according to a second embodiment of the present invention.

4A through 4C are cross-sectional views illustrating modifications to external leads of the stack package illustrated in FIG. 3.

5 is a cross-sectional view of a lead frame type package according to a third embodiment of the present invention.

6 is a cross-sectional view of a stack package according to a fourth embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

10, 10a, 10b, 100, 100a, 100b: single package

20, 110: semiconductor chip 21a, 21b: bonding pad

30, 120: lead frame 31, 121: internal lead

32, 122: external leads 40, 130: ground frame

41, 131: ground plate 42, 132: ground lead

50, 51, 52, 140, 141, 142: bonding wires

60, 150: dielectric substrate 70, 160: package body

80, 200: laminated packages 81, 82, 201, 202: solder

The present invention relates to a semiconductor package technology, and more particularly, to a single package of a lead frame type and a laminate package in which a stack is implemented using the same.

Typical semiconductor packages use lead frames to provide physical bonding and electrical connections between the package and the external substrate. For example, a package type such as TSOP, SOJ, QFP, etc. corresponds to this type. Hereinafter, this type of package is referred to as a 'lead frame type package'.

Meanwhile, a stack package is a stack of several single packages vertically, and is used for the purpose of increasing memory capacity and improving mounting density on an external substrate. Stacked packages are one of the important issues how to physically and electrically interconnect single packages above and below. In general, a laminated package using the above-described lead frame type package implements physical and electrical connections between lead frames by sandwiching a printed circuit board having a metal pattern or inserting a thermally conductive material having a circuit pattern between single packages. Such examples are disclosed in, for example, Korean Patent Application Publication No. 10-276213, US Patent Publication No. 6,572,387, and the like.

However, the conventional laminated package using the lead frame type package has a problem that the overall thickness becomes large due to the interconnection means inserted between the single packages. Increasing the thickness of a laminated package is undesirable because it is placed in the trend toward thin and short semiconductor products. In particular, when the memory module is configured using the stacked packages, an increase in the thickness of the stacked package causes an increase in the thickness of the memory module and causes a decrease in heat dissipation characteristics of the memory module mounted in the system. In other words, when the thickness of the memory module increases in a situation where system sockets in which the memory modules are mounted are arranged at regular intervals, the distance between neighboring memory modules becomes narrow. Therefore, it is difficult to dissipate heat generated from the module to the outside, it is also difficult to attach the heat sink to the outside of the module. As described above, when the heat dissipation characteristics deteriorate, the operating characteristics of the semiconductor product also deteriorate.

Accordingly, an object of the present invention is to reduce the overall thickness of a laminated package using a lead frame type package.

Another object of the present invention is to improve heat dissipation characteristics of a lead frame type package and a laminated package using the same.

In order to achieve these objects, the present invention provides a lead frame type package having a ground frame and a stack package implementing the stack using the same.

The lead frame type package according to the present invention includes a semiconductor chip, a lead frame, a ground frame, a plurality of bonding wires, and a package body. The semiconductor chip has a plurality of bonding pads formed at the top edge. The lead frame has a plurality of inner leads disposed around the semiconductor chip and outer leads extending from the inner leads. The ground frame has a ground plate attached to the bottom surface of the semiconductor chip and a plurality of ground leads formed extending from a portion of the ground plate. The bonding wires electrically connect the ground pad and the ground plate of the bonding pads, and electrically connect the remaining bonding pads and the inner leads except the ground pad. The package body wraps the semiconductor chip and internal leads and bonding wires. In particular, the ends of the outer leads and ground leads are exposed out of the package body.

In this case, the lead frame type package preferably further includes a dielectric substrate surrounding the entire bottom surface and the top edge of the ground plate. At this time, the inner leads and the ground plate are disposed with the dielectric substrate interposed therebetween.

In addition, the lead frame type package according to the present invention may be configured to include a semiconductor chip having a plurality of bonding pads formed in the upper center. In this case, the lead frame has a plurality of inner leads disposed on the upper side of the semiconductor chip and outer leads extending from the inner leads. In addition, the ground plate of the ground frame has a first opening that exposes the bonding pads and is attached to an upper surface of the semiconductor chip, and a plurality of ground leads are formed extending from a portion of the ground plate. The plurality of bonding wires electrically connect the ground pad and the ground plate of the bonding pads, and electrically connect the bonding pads and the inner leads except the ground pad. The package body wraps the semiconductor chip and internal leads and bonding wires. In particular, the ends of the outer leads and ground leads are exposed out of the package body.

The lead frame type package in this case also preferably further includes a dielectric substrate. The dielectric substrate is disposed between the inner leads and the ground plate and has a second opening formed corresponding to the first opening of the ground plate.

In the lead frame type package according to the present invention, each ground lead may have an upward ground lead bent upward from the ground plate and a downward ground lead bent downward.

In the laminated package according to the present invention, at least two lead frame type packages having the above configuration are vertically stacked, and an outer lead of an upper package and an outer lead of a lower package are connected by a first solder. The downward ground lead of the package located at and the upward ground lead of the package located at the bottom are connected by the second solder.

Hereinafter, with reference to the accompanying drawings will be described in detail an embodiment of the present invention.

In describing the embodiments, descriptions of technical contents which are well known in the technical field to which the present invention belongs and are not directly related to the present invention will be omitted. This is to more clearly communicate without obscure the subject matter of the present invention by omitting unnecessary description. For the same reason, some components in the accompanying drawings are exaggerated, omitted, or schematically illustrated, and the size of each component does not entirely reflect the actual size. The same or corresponding components in each drawing are given the same reference numerals.

First Embodiment (Single Package)

1 is a cross-sectional view of a lead frame type package 10 according to a first embodiment of the present invention, and FIG. 2 is a partially cutaway perspective view of the lead frame type package 10 shown in FIG. 1.

1 and 2, the package 10 of the present embodiment may include a semiconductor chip 20, a lead frame 30, a ground frame 40, a bonding wire 50, a dielectric substrate 60, and a package body ( 70).

The semiconductor chip 20 has a plurality of bonding pads 21a and 21b formed at edges of an upper surface thereof. The bonding pads 21a and 21b may be arranged in one row or several rows at four edges or two opposite edges of the top surface of the chip, respectively. 2 shows an example in which each line is arranged at two edges. The bonding pads 21a and 21b may be classified into signal pads, power pads, and ground pads according to their functions. In this embodiment, the signal pads and power pads are referred to by reference numeral 21a, and the ground pads by reference numeral 21b. Indicated.

The lead frame 30 is composed of a plurality of inner leads 31 and a plurality of outer leads 32. The internal leads 31 are disposed at regular intervals around the semiconductor chip 20 to be electrically connected to the semiconductor chip 20. The outer leads 32 extend from each inner lead 31 and are external connection terminals connected to an external substrate or another single package.

The ground frame 40 is one of the structural features of the lead frame type package 10 according to the present invention. The ground frame 40 consists of a ground plate 41 and a plurality of ground leads 42. The ground plate 41 is a rectangular thin plate, to which the semiconductor chip 20 is attached. In addition, the ground leads 42 are formed bent downward at the edge of the ground plate 41. The ground leads 42 are located inward of the outer leads 32 of the lead frame 30. The effect caused by the lead frame type package 10 of the present invention having the ground frame 40 will be described later.

The bonding wire 50 includes a first bonding wire 51 and a second bonding wire 52. The first bonding wire 51 electrically connects the ground pad 21b of the semiconductor chip 20 to the ground plate 41 of the ground frame 40. The second bonding wire 52 electrically connects the remaining bonding pads 21a except the ground pad 21b, that is, the signal pad and the power pad to the internal leads 31 of the lead frame 30.

The dielectric substrate 60 is another structural feature of the lead frame type package 10 according to the present invention. The dielectric substrate 60 is formed to surround the entire bottom surface and the top edge of the ground plate 41. The reason why the top surface of the ground plate 41 is exposed from the dielectric substrate 60 except for the edge is that the ground plate 41 is attached to the bottom surface of the semiconductor chip 20 as described above. The ends of the ground leads 42 are exposed out of the dielectric substrate 60. Dielectric substrate 60 is made of a dielectric such as FR-4, polyimide, epoxy, phenol, polyester.

The package body 70 is formed to surround all of the semiconductor chip 20, the internal leads 31, and the bonding wires 51 and 52. The outer leads 32 are exposed outside the package body 70. The package body 70 is made of, for example, an epoxy molding compound (EMC). Holes or grooves may be formed in the ground plate 41 to enhance the bonding force to the dielectric substrate 60 or the package body 70.

In the package 10 according to the present exemplary embodiment, the inner leads 31 of the lead frame 30 are disposed on the dielectric substrate 60 covering the top edge of the ground plate 41. Therefore, since the inner lead 31 and the ground plate 41 are disposed with the dielectric substrate 60 interposed therebetween, the internal structure of the package 10 becomes similar to the microstrip line structure, thereby improving signal transmission speed. . This also means that the difference in routing environment between the package and the external substrate is reduced, thereby improving signal integrity.

As mentioned above, in the package 10 of the present embodiment, the ground plate 41 is directly attached to the semiconductor chip 20. The ends of the ground leads 42 formed at the edge of the ground plate 41 are exposed to the outside of the dielectric substrate 60. Therefore, heat generated in the semiconductor chip 20 may be smoothly discharged to the outside of the package 10 through the ground plate 41 and the ground lead 42. Meanwhile, in a conventional package structure corresponding to the present embodiment, a die pad is generally used to support the semiconductor chip 20. However, in the present embodiment, since the ground plate 41 replaces this, the thickness of the package 10 does not increase due to the ground plate 41.

In the package 10 of the present exemplary embodiment, the ground leads 42 may be used as an external connection terminal connected to an external substrate or another single package, similar to the external leads 32. Therefore, the bonding force can be improved when the package 10 is mounted on an external substrate or laminated with another single package. When the ground lead 42 is used as an external connection terminal connected to another single package, the shape of the ground lead 42 may be different from that illustrated in this embodiment. This is illustrated in the following example.

Second Embodiment (Laminated Package)

3 is a cross-sectional view of a stack package 80 according to a second embodiment of the present invention.

Referring to FIG. 3, the stack package 80 according to the present embodiment has a structure in which two single packages 10a and 10b are vertically stacked. The illustrated stack package 80 consists of two single packages, but three or more single packages may be stacked.

Each single package 10a, 10b has basically the same structure as the package of the first embodiment (10 in FIGS. 1 and 2) described above. However, the ground lead 42 of the present embodiment has an upward ground lead 42a bent upward from the ground plate 41 and a downward ground lead 42b bent downward for package stacking.

When the upper package 10a and the lower package 10b are stacked, the inter-package interconnection is made directly through the outer lead 32 and the ground lead 42. That is, the external leads 32 of the upper package 10a and the lower package 10b are physically and electrically connected to one another corresponding to each other through the solder 81. Similarly, the lower ground lead 42b of the upper package 10a and the upper ground lead 42a of the lower package 10b are also physically and electrically connected by the solder 82. Soldering bonding using the solders 81 and 82 in this manner eliminates the need for inserting separate interconnection means between the single packages 10a and 10b as in the prior art. Therefore, the laminated package 80 of this embodiment does not increase the overall thickness more than the sum of the thicknesses of the single packages 10a and 10b.

The stack package 80 of the present embodiment has the advantages of each single package 10a, 10b in addition to the advantages in terms of thickness. That is, since the heat is discharged by the ground plate 41 and the ground lead 42, it has excellent heat dissipation characteristics, and the dielectric substrate 60 is interposed between the ground plate 41 and the inner lead 31 to form a microstrip structure. Since the electrical characteristics are improved.

On the other hand, in the laminated package 80 of the present embodiment, each outer lead 32 is a so-called gull-wing shape in which the end is bent outward, and each ground lead 42 has an end inward. It is a curved "J" shape. As described above, by bending the external lead 32 and the ground lead 42 in opposite directions, the possibility of short circuit between the leads can be reduced. In addition, since the ground lead 42 may be disposed as close to the outer lead 32 as possible, and the width of the ground plate 41 may be increased as much as possible, the area where the microstrip structure is formed inside the packages 10a and 10b. Can be maximized.

The shape of the external lead 32 is not limited to that illustrated in FIG. 3, and may be variously modified in various forms. 4A-4C show variants of the outer lead. The outer lead 32a shown in FIG. 4A has a straight end portion. The outer lead 32b shown in FIG. 4B has a "J" shape with the tip bent inward. The outer lead 32c shown in FIG. 4C has a form in which the end portion is split to both sides.

Third Embodiment (Single Package)

5 is a cross-sectional view of a lead frame type package 100 according to a third embodiment of the present invention.

Referring to FIG. 5, the single package 100 of this embodiment is similar in structure and function to the package of the first embodiment described above, but is structurally shaped as a lead on chip (LOC). That is, in the present exemplary embodiment, the inner leads 121 of the lead frame 120 extend toward the upper surface of the semiconductor chip 110 and are bonded to the bonding pads of the semiconductor chip 110 electrically connected to the inner leads 121. (Not shown) are formed in the center of the upper surface of the chip.

In addition, the ground frame 130 of the present embodiment is located on the top surface of the semiconductor chip 110, the semiconductor chip 110 is attached to the bottom surface of the ground frame 130. The ground frame 130 includes a ground plate 131 and ground leads 132, and the ground plate 131 includes a first opening 133 formed at a central portion thereof. The ground leads 132 are formed by bending downward from the edge of the ground plate 131.

The inner leads 121 are positioned above the ground plate 131, and a dielectric substrate 150 is interposed between the inner leads 121 and the ground plate 141. A second opening 151 is formed in the central portion of the dielectric substrate 150 to correspond to the first opening 133 of the ground plate 131. The second opening 151 is larger than the first opening 133 to expose a part of the ground plate 131. The dielectric substrate 150 may be formed of the same material as the dielectric substrate of the first embodiment described above.

The first opening 133 of the ground plate 131 and the second opening 151 of the dielectric substrate 150 expose the bonding pads of the semiconductor chip 110. Among the bonding pads, the ground pads are electrically connected to the ground plate 131 by the first bonding wire 141, and the remaining bonding pads except the ground pads are the inner leads 121 by the second bonding wire 142. Is electrically connected to the

The package body 160 is formed to surround all of the semiconductor chip 110, the inner lead 121, the ground plate 131, the bonding wires 141 and 142, and the dielectric substrate 150. The external leads 122 of the lead frame 120 are exposed to the outside of the package body 160, and the ends of the ground leads 132 of the ground frame 130 are protruded to the outside of the package body 160. .

The package 100 according to the third embodiment described above has various advantages similar to the package of the first embodiment described above. That is, since the dielectric substrate 150 is interposed between the inner leads 121 and the ground plate 141, the internal structure of the package 100 is similar to the microstrip line structure. Therefore, the electrical characteristics are improved, such as faster signal transmission speed and improved signal integrity. In addition, since the ground plate 131 is directly attached to the semiconductor chip 110 and the end of the ground lead 132 is exposed to the outside, heat generated from the semiconductor chip 110 is smoothly discharged to the outside of the package 100. do. Therefore, the heat dissipation characteristic of the package 100 is improved.

Fourth Embodiment (Lamination Package)

6 is a cross-sectional view of a stack package 200 according to a fourth embodiment of the present invention.

Referring to FIG. 6, the stack package 200 according to the present embodiment has a structure in which the single packages 100a and 100b of the third embodiment are stacked vertically. However, the single packages 100a and 100b used in the present exemplary embodiment have only a difference in which the ground lead 132 is formed of the up ground lead 132a and the down ground lead 132b.

The stack package 200 of the present embodiment has the same stacking method as the stack package described in the second embodiment. That is, the interconnection between the upper and lower single packages 100a and 100b is made through the external lead 122 and the ground lead 132, and soldering is performed using the solders 201 and 202. Therefore, package stacking may be implemented without additional interconnection means, and the thickness of the stack package 200 does not increase.

As described through the embodiments up to now, the lead frame type package and the laminated package using the same according to the present invention have several advantages.

First, the stacked package of the present invention implements the interconnection between single packages by soldering through external leads and ground leads. Thus, since there is no separate interconnection means inserted between a single package, the present invention can reduce the overall thickness of a laminated package as compared to the prior art. The reduction of the thickness of the stacked package leads to the reduction of the thickness of the memory module, and can improve the heat dissipation characteristics by securing the gap between the memory modules mounted in the system socket.

In addition, the lead frame type package according to the present invention has a ground frame attached to the semiconductor chip through the ground plate and exposed to the outside through the ground lead. Therefore, heat generated in the semiconductor chip can be smoothly discharged to the outside of the package by the ground plate and the ground lead. That is, the package of the present invention can further improve heat dissipation characteristics by using a ground frame.

On the other hand, the lead frame type package of the present invention can sufficiently achieve the object of the present invention by forming a ground frame in the package body without using a dielectric substrate. However, it is desirable to arrange a dielectric substrate between the inner lead and the ground plate to implement the internal structure of the package in a form similar to that of the microstrip line structure. Doing so can improve signal delivery speed and improve signal integrity by reducing differences in routing environments between packages and external substrates.

Claims (8)

A semiconductor chip having a plurality of bonding pads formed at an upper edge thereof; A lead frame having a plurality of internal leads disposed around the semiconductor chip and external leads extending from the internal leads; A ground frame having a ground plate attached to a bottom surface of the semiconductor chip, and a plurality of ground leads extending from a portion of the ground plate; A plurality of bonding wires electrically connecting the ground pad of the bonding pads to the ground plate, and electrically connecting the bonding pads and the internal leads except for the ground pad; And A package body surrounding the semiconductor chip, the inner leads, and the bonding wires, A lead frame type package, wherein the outer leads and the ends of the ground leads are exposed out of the package body. The method of claim 1, further comprising a dielectric substrate surrounding the entire bottom surface and the top edge of the ground plate, And the inner leads and the ground plate are disposed with the dielectric substrate interposed therebetween. 3. The lead frame type package of claim 1 or 2, wherein each ground lead has an upward ground lead bent upward from the ground plate and a downward ground lead bent downward. At least two lead frame type packages according to claim 3 are stacked vertically, The outer lead of the package located above and the outer lead of the package located below is connected by a first solder, and the downward ground lead of the package located above and the upward ground lead of the package located below Laminated package characterized in that connected by the second solder. A semiconductor chip having a plurality of bonding pads formed in a center of an upper surface thereof; A lead frame having a plurality of internal leads disposed on an upper surface of the semiconductor chip and external leads extending from the internal leads; A ground frame having a first opening exposing the bonding pads and having a ground plate attached to an upper surface of the semiconductor chip, and a plurality of ground leads extending from a portion of the ground plate; A plurality of bonding wires electrically connecting the ground pad of the bonding pads to the ground plate, and electrically connecting the bonding pads and the internal leads except for the ground pad; And A package body surrounding the semiconductor chip, the inner leads, and the bonding wires, A lead frame type package, wherein the outer leads and the ends of the ground leads are exposed out of the package body. 6. The lead frame type package of claim 5, further comprising a dielectric substrate disposed between the inner leads and the ground plate and having a second opening formed corresponding to the first opening of the ground plate. . 7. The lead frame type package of claim 5 or 6, wherein each of the ground leads has an upward ground lead bent upward from the ground plate and a downward ground lead bent downward. At least two lead frame type packages according to claim 7 are stacked vertically, The outer lead of the package located above and the outer lead of the package located below is connected by a first solder, and the downward ground lead of the package located above and the upward ground lead of the package located below Laminated package characterized in that connected by the second solder.

Images