KR20060104890A - Internal voltage generator - Google Patents

Abstract

The present invention is to provide an internal power generator capable of stably supplying a high voltage even during initial driving, and in the present invention, the internal power generator having a level shifter, wherein the level shifter is a voltage divider Bias generating means for generating a bias voltage by ding; Driving means for supplying a shifting-reference voltage such that the shifting-reference voltage maintains a level higher than a reference voltage in response to the bias voltage; And initialization means for pulling up the supply stage of the shifting-reference voltage before the driving means is activated.

Level Shifter, Initial Run, High Voltage, Reference Voltage, Level Stable

Description

Internal Power Generator {INTERNAL VOLTAGE GENERATOR}

1 is a block diagram of a general internal power generator.

2 is an internal circuit diagram of the level shifter of FIG.

3 is an internal circuit diagram of the level sensing unit of FIG. 1;

4 is an internal circuit diagram of the oscillator of FIG. 1.

5A is a pumping control signal generator of FIG. 1.

5B is an operational waveform diagram of FIG. 5A.

6 is an internal circuit diagram of the charge pumping part of FIG. 1.

7 is a diagram illustrating a level change of an internal voltage as the power supply voltage VCC rises.

8 is a circuit diagram of a level shifter in an internal power generator according to a first embodiment of the present invention.

9 is a view showing a change in the level of the internal voltage of the present invention as the power supply voltage VCC rises.

10 is a circuit diagram of a level shifter according to a second embodiment of the present invention.

* Explanation of symbols for the main parts of the drawings

100: bias generation unit

200: differential amplifier

300: initialization unit

PM2: Pullup Driver

NM3: Pulldown Driver

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor design technology, and more particularly, to an internal power generator for stably supplying internal power even during initial driving to which external power is applied.

An internal voltage generator used as an internal power source in a semiconductor memory device is a circuit for generating various levels of internal voltage by receiving an external power supply voltage (VDD).

In particular, as recent trends of memory semiconductors have become low voltage and low power consumption, DRAM devices have been using internal power generators.

Meanwhile, since the voltage used inside the device is generated by itself, many efforts have been made to generate a stable internal voltage regardless of changes in ambient temperature, process, or pressure.

1 is a block diagram of a general internal power generator.

Referring to FIG. 1, an internal power generator according to the related art generates a shifting-reference voltage by shifting a level of a reference voltage generator 10 for generating a reference voltage VREF and a level of the reference voltage VREF. In response to the output signal PPE of the level shifter 20, the level detector 30 for sensing the level of the high voltage VPP with respect to the shifting-reference voltage VR1, and the level detector 30. The oscillator 40 for generating the periodic signal OSC, the charge pumping unit 60 for supplying the high voltage VPP at a level higher than the power supply voltage VCC by pumping the power supply voltage VCC, and the periodic signal OSC. In response, a pumping control signal generation unit 50 for generating a plurality of pumping control signals for controlling the driving of the charge pumping unit 60 is provided.

As such, when the level of the high voltage VPP falls below the level of the shifting-reference voltage VR1, the internal power generation device according to the related art senses this through the level detector 30, and the oscillator 40 and the pumping control. By driving the charge pumping unit 60 through the signal generator 50, the high voltage VPP is maintained at a constant level.

For reference, the power supply voltage VCC means an external power source applied from the outside of the device.

2 is an internal circuit diagram of the level shifter 20 of FIG. 1.

Referring to FIG. 2, the level shifter 20 includes a driving signal generator 22 for generating a driving signal by dividing a power supply voltage VCC, and a shifting-reference voltage with respect to a reference voltage in response to activation of the driving signal. A differential amplifier 24 for supplying the shifting-reference voltage VR1 by sensing the level difference of VR1 and a NMOS transistor NM1 for pull-down driving the shifting-reference voltage VR1 in response to a driving signal. It is provided.

The level shifter 20 drives the differential amplifier 24 and the NMOS transistor NM1 through a driving signal generated by voltage dividing the power supply voltage VCC, so that the shifting-reference voltage is maintained at the level of the reference voltage.

3 is an internal circuit diagram of the level detector 30 of FIG. 1.

Referring to FIG. 3, the level detector 30 voltage divides the high voltage VPP to output the feedback voltage VPP_FD, the feedback voltage VPP_FD, and the shifting-reference voltage VR1. And a differential amplifier 34 for amplifying the level difference and outputting it as a detection signal PPE.

When the level of the feedback voltage VPP_FD falls below the shifting-reference voltage VR1, the level detector 30 outputs the detection signal PPE at a logic level 'H' and rises above the shifting-reference voltage VR1. In this case, the detection signal PPE is output at the logic level 'L'.

FIG. 4 is an internal circuit diagram of the oscillator 40 of FIG. 1. The oscillator 40 includes a delay / inversion unit 42 and a delay / inversion unit 42 for delaying and inverting the periodic signal OSC. A NAND gate ND1 having an output signal and a sensing signal PPE as inputs, and a delay / inversion unit 44 for delaying and inverting the output signal of the NAND gate ND1 and outputting the periodic signal OSC. do.

The oscillator 40 continuously generates the periodic signal OSC while the periodic signal OSC is at the logic level 'H', and generates the logic signal OSC when the periodic signal OSC is at the logic level 'L'. Output as 'L'.

5A is an internal circuit diagram of the pumping control signal generator 50 of FIG. 1, and FIG. 5B is an operation waveform diagram of FIG. 5A. The pumping control signal generation unit 50 as shown in FIG. 5A generates a plurality of pumping control signals P1, P2, G1, and G2 as shown in FIG. 5B in the activation period of the periodic signal OSC.

In addition, FIG. 6 is an internal circuit diagram of the charge pumping unit 60 of FIG. 1, and receives the pumping control signals P1, P2, G1, and G2 as shown in FIG. 5B, and charges the power voltage VCC to supply power. Supply a high voltage (VPP) with a level higher than the power supply VCC.

Therefore, as illustrated in FIGS. 3 and 4, the oscillator 40 is detected by the sensing signal PPE generated by the level sensing unit 30 by detecting the level of the high voltage VPP based on the shifting-reference voltage VR1. ) Is activated to generate the periodic signal OSC. 5A and 5B, the pumping control signal generation unit 50 generates the pumping control signals P1, P2, G1, and G2 in the activation period of the periodic signal OSC, and thus, the charge pumping unit ( 60 pumps the supply voltage VCC and supplies it to the high voltage (VPP).

Therefore, in order for the internal power generator to maintain and supply the high voltage VPP at a stable level, the internal power generator must not only be able to detect the level of the high voltage VPP well, but also the shifting-reference voltage VR1 as a reference for level detection. The level should be kept stable regardless of the surrounding situation.

However, at the initial stage when the actual power supply voltage VCC is applied, the level of the shifting-reference voltage is unstable, so that the level of the high voltage cannot be detected. This problem will be described in detail with reference to FIG. 7.

7 shows the level change of the shifting-reference voltage according to the level change of the power supply voltage. The X axis represents the change in the power supply voltage VCC, and the unit is voltage, and the Y axis represents the voltage.

Referring to FIG. 7, the time point 'a' represents the power supply voltage VCC when the level detector 30 and the charge pumping unit 60 are driven as the level of the shifting-reference voltage VR1 is stabilized, and 'b' The time point represents the level of the power supply voltage VCC when the level of the high voltage VPP is stabilized.

Here, since the level of the power supply voltage VCC does not have a level sufficient to drive the level shifter 20 in the section before the 'a' time point, the level of the shifting-reference voltage VR1 does not remain stable and is lowered. will be.

As such, when the level of the shifting-reference voltage VR1 is lowered, since the level sensing unit 30 activates the detection signal PPE after the level of the high voltage VPP is lowered as the shifting-reference voltage VR1. As a result, the level of the high voltage (VPP) drops below the level expected at design time, resulting in instability.

Therefore, the internal power generation device having a level shifter according to the prior art has a problem that it is not possible to stably supply a high voltage during the initial driving when the external power is applied.

The present invention has been proposed to solve the above problems of the prior art, and an object thereof is to provide an internal power generator capable of stably supplying a high voltage even during initial driving.

In accordance with an aspect of the present invention for achieving the above technical problem, an internal power generating apparatus having a level shifter, the level shifter comprises: bias generating means for generating a bias voltage by voltage dividing the external power; Driving means for supplying a shifting-reference voltage such that the shifting-reference voltage maintains a level higher than a reference voltage in response to the bias voltage; And initialization means for pull-up driving the supply stage of the shifting-reference voltage before the driving means is activated.

In accordance with another aspect of the present invention, an internal power generator including a level shifter, the level shifter comprising: bias generation means for voltage biasing an external power source to generate a bias voltage; Control signal generating means for generating a driving control signal by detecting a level of a shifting-reference voltage with respect to a reference voltage in response to the bias voltage; A pull-up driver configured to pull-up the supply terminal of the shifting-reference voltage in response to the driving control signal; And a pull-down driver for pull-down driving the supply terminal of the shifting-reference voltage in response to the bias voltage.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. do.

(First embodiment)

8 is an internal circuit diagram of a level shifter in an internal power generator according to a first embodiment of the present invention.

Referring to FIG. 8, the level shifter according to the first embodiment of the present invention may include a bias generator 100 for generating a bias voltage by voltage-dividing a power supply voltage VCC, and a shifting-reference voltage in response to a bias voltage. The driving unit 200 for supplying the shifting-reference voltage VR1 and the initialization unit for initial pull-up driving of the supply terminal of the shifting-reference voltage VR1 so that VR1 maintains a level higher than the reference voltage VREF. 300.

The initialization unit 300 receives a power supply voltage VSS as a gate input, and has a PMOS transistor PM1 having a source-drain path between the power supply voltage VCC and the supply terminal of the shifting-reference voltage VR1 and the shifting-reference voltage VR1. The NMOS transistor NM2 is connected to a supply terminal of the C1) terminal, and a drain terminal thereof is connected to the gate terminal and a source terminal thereof to a supply terminal of the power supply voltage VSS.

The driving unit 200 is implemented as a differential amplifier for supplying the shifting-reference voltage VR1 by detecting and amplifying a level difference between the reference voltage VREF and the shifting-reference voltage VR1 in response to the bias voltage.

9 is a diagram showing a change in the shifting-reference voltage VR1 according to the level change of the power supply voltage VCC, where the X axis represents a level change of the power supply voltage VCC and the Y axis represents a voltage.

As shown in FIG. 9, the time point 'α' indicates when the level of the shifting-reference voltage VR1 is stabilized by driving the level shifter, and the time point 'β' indicates that the charge pumping unit (shown in FIG. 1) It indicates when it is driven, and the 'γ' time indicates when the level of the high voltage (VPP) is stabilized.

In more detail, first, since the level of the bias voltage generated by voltage dividing the power supply voltage VCC is not sufficient in the initial section in which the power supply voltage VCC is applied, the driving unit 200 is turned off. At this time, since the PMOS transistor PM1 in the initialization unit 300 is turned on to connect the shifting-reference voltage VR1 supply terminal to the supply terminal of the power supply voltage VCC, the level of the shifting-reference voltage VR1 is equal to the power supply voltage VCC. To be raised together (before 'α')

Subsequently, when the level of the power supply voltage VCC gradually rises so that the level of the bias voltage is sufficient to drive the driving unit 200, the shifting-reference voltage VR1 supplied by the active driving unit 200 becomes the PMOS transistor ( More than supply by PM1). At this time, the level of the shifting-reference voltage VR1 is no longer increased by the turned-on NMOS transistor NM2 (the 'α' time point).

As described above, when the level of the shifting-reference voltage VR1 is stably maintained, the pumping control signal generator and the charge pumping unit are driven by the level sensor to supply the high voltage VPP although not shown in the drawing.

Therefore, the level of the high voltage VPP is kept stable.

As such, the level shifter in the internal power generator according to the first embodiment of the present invention includes the initialization unit 200, and the shifting-reference voltage VR1 is the level of the power supply voltage VCC at the initial stage when the level of the power supply voltage VCC is applied. As a result, the level of the shifting-reference voltage VR1 during the initial driving to which the level of the conventional power supply voltage VCC is applied is prevented from rising.

(Second embodiment)

10 is an internal circuit diagram of a level shifter in an internal power generator according to a second embodiment of the present invention.

Referring to FIG. 10, the level shifter according to the second embodiment includes a bias generator 400 for generating a bias voltage BS by dividing the power supply voltage VCC with a reference voltage in response to the bias voltage BS. The control signal generator 500 for detecting the level of the shifting-reference voltage VR1 with respect to the VREF and generating the driving control signal, and the supply terminal of the shifting-reference voltage VR1 in response to the driving control signal. And a pull-down driver NM3 for pull-down driving the supply terminal of the shifting-reference voltage VR1 in response to the bias voltage BS.

The control signal generator 500 is implemented as a differential amplifier for detecting and amplifying a level difference between the reference voltage VREF and the shifting-reference voltage VR1 in response to the bias voltage BS and outputting the driving control signal. .

The level shifter according to the second embodiment uses the control signal generator 400 implemented as a differential amplifier, and when the level of the shifting-reference voltage VR1 is lower than that of the reference voltage VREF, the level shifter converts the driving control signal into a logic level ' By activating to L ', the pull-up driver PM2 causes the supply terminal of the shifting-reference voltage to drive to the supply voltage VCC.

Thus, the level of the shifting-reference voltage VR1 is raised along the power supply voltage VCC.

Thereafter, when the level of the power supply voltage VCC is sufficiently raised, the pull-down driver NM3 is activated by the bias voltage BS so that the level of the shifting-reference voltage VR1 is maintained at a constant level.

Therefore, the internal power generation device including the level shifter according to the second embodiment turns on only the pull-up driver PM2 during initial driving when the power supply voltage VCC is applied, so that the level of the shifting-reference voltage VR1 corresponds to the power supply voltage VCC. When the power supply voltage VCC is sufficiently raised, the pull-down driver NM3 is turned on so that the level of the shifting-reference voltage VR1 is kept constant.

As described above, the internal power generator including the level shifters according to the first and second embodiments causes the shifting-reference voltage to rise along the level of the power supply voltage VCC during the initial driving of the power supply voltage VCC. The level of the shifting-reference voltage is kept stable even during initial driving applied.

Therefore, due to the level stabilization of the shifting-reference voltage, the level of the high voltage is stabilized faster than before even in the initial driving.

For reference, the power supply voltage VCC means an external power source applied from the outside of the device.

The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes are possible in the art without departing from the technical spirit of the present invention. It will be clear to those of ordinary knowledge.

The present invention as described above allows the high voltage level to gradually increase as the level of the external power is gradually increased even during initial driving to which the external power is applied, thereby stably supplying the high voltage during initial driving.

Claims (6)

In the internal power generator having a level shifter, The level shifter is Bias generation means for voltage biasing an external power supply to generate a bias voltage; Driving means for supplying a shifting-reference voltage such that the shifting-reference voltage maintains a level higher than a reference voltage in response to the bias voltage; And Initialization means for driving the supply stage of the shifting-reference voltage before the driving means is activated Internal power generating device having a. The method of claim 1, The initialization means, A PMOS transistor configured to receive a gate input of a first power supply voltage and have a source-drain path between the external power supply and a supply terminal of the shifting-reference voltage; And an NMOS transistor having a drain terminal thereof connected to a supply terminal of the shifting-reference voltage and a gate terminal and a source terminal connected to a supply terminal of the first power voltage. The method of claim 2, The driving means, And a differential amplifier for supplying the shifting-reference voltage by detecting and amplifying a level difference between the reference voltage and the shifting-reference voltage in response to the bias voltage. In the internal power generator having a level shifter, The level shifter is Bias generation means for voltage biasing an external power supply to generate a bias voltage; Control signal generating means for generating a driving control signal by detecting a level of a shifting-reference voltage with respect to a reference voltage in response to the bias voltage; A pull-up driver configured to pull-up the supply terminal of the shifting-reference voltage in response to the driving control signal; And A pull-down driver for pull-down driving a supply terminal of the shifting-reference voltage in response to the bias voltage Internal power generating device having a. The method of claim 4, wherein The control signal generating means, And a differential amplifier configured to sense and amplify a level difference between the reference voltage and the shifting-reference voltage in response to the bias voltage to output the driving control signal. The method according to claim 3 or 5, Level sensing means for sensing a level of a high voltage relative to the shifting-reference voltage; An oscillator for generating a periodic signal in response to an output signal of the level sensing means; Charge pumping means for pumping the external power to supply the high voltage at a level higher than the external power; And Pumping control signal generating means for generating a plurality of pumping control signals for controlling the driving of the charge pumping means in response to the periodic signal; Internal power generating device further comprising.

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