KR20060099292A - Substrate for thin film transistor - Google Patents

Abstract

A thin film transistor array panel is provided. The thin film transistor array panel includes a plurality of gate lines having a gate electrode formed on an insulating substrate, a light blocking pattern extending in the form of branches of a plurality of storage capacitor wirings and a storage capacitor wiring parallel to the gate lines, a plurality of gate lines and a plurality of gate lines. A plurality of data lines having a gate insulating film covering the storage capacitor wiring of the storage capacitor, a semiconductor layer formed on the gate insulating film, a source electrode intersecting the plurality of gate lines, and at least partially overlapping the semiconductor layer; A drain electrode facing the semiconductor layer and at least partially overlapping the semiconductor layer, a protective film covering the semiconductor layer, a protective film formed on the protective film, electrically connected to the drain electrode, and covering a data line positioned between adjacent light blocking patterns. It includes a plurality of pixel electrodes.

Thin film transistor array panel, light blocking pattern, and wiring for holding capacitor

Description

Thin film transistor display panel {Substrate for thin film transistor}

1 is a layout view of a liquid crystal display according to a first exemplary embodiment of the present invention.

FIG. 2 is a cross-sectional view of the liquid crystal display shown in FIG. 1 taken along the line II-II '.

3 is a layout view of a liquid crystal display according to a second exemplary embodiment of the present invention.

4 is a cross-sectional view of the liquid crystal display of FIG. 3 taken along the line IV-IV '.

5 is a layout view of a liquid crystal display according to a third exemplary embodiment of the present invention.

FIG. 6 is a cross-sectional view of the liquid crystal display illustrated in FIG. 5 taken along the line VI-VI ′.

The present invention relates to a liquid crystal display device.

Recently, due to the trend of larger display devices such as televisions, liquid crystal displays (LCDs), plasma display panels (PDPs), organic EL displays (instead of cathode ray tubes (CRTs)) Flat panel display devices such as Display (OELD) and the like have been developed. Among such flat panel display devices, a liquid crystal display device capable of being lighter and thinner is particularly attracting attention.

In the liquid crystal display, a liquid crystal material having anisotropic dielectric constant is injected between an upper transparent insulating substrate on which a common electrode, a color filter, a black matrix, and the like are formed, and a lower transparent insulating substrate on which a thin film transistor and a pixel electrode are formed. By applying different potentials to the electrodes and the common electrode, the intensity of the electric field formed in the liquid crystal material is adjusted to change the molecular arrangement of the liquid crystal material, thereby controlling the amount of light transmitted through the transparent insulating substrate to express a desired image. It is a display device. In the liquid crystal display, a thin film transistor liquid crystal display (TFT LCD) using a thin film transistor (TFT) as a switching element is mainly used.

The pixel electrode of the liquid crystal display is formed for each pixel area formed by crossing a plurality of data lines and a plurality of gate lines, and is formed adjacent to adjacent pixel areas with the data line therebetween.

In this case, the data line is positioned between each pixel area and overlaps with neighboring pixel electrodes. When the coupling occurs between the data line and the pixel electrode, the data line acts in a direction in which the voltage of the pixel electrode falls. On the other hand, due to mis-alignment, neighboring pixel electrodes may have different areas overlapping with the data lines therebetween, so that the voltage shift amount varies depending on the degree of overlap of the pixel electrodes on the data lines. Vertical line defects may occur.

Therefore, a liquid crystal display device having a structure in which a pixel electrode completely covers a data line and prevents vertical line defects due to misalignment has been proposed.

However, the structure in which the pixel electrode completely covers the data line may effectively block light leakage and increase the aperture ratio when applied to a vertically aligned liquid crystal display device such as PVA or MVA, but normally white. In the case of the TN mode liquid crystal display device driven by, there is a problem in that light leakage blocking at the boundary of the pixel area is substantially impossible.

An object of the present invention is to provide a liquid crystal display for preventing light leakage that may occur at an interface of a pixel region by applying a structure in which the pixel electrode overlaps a data line in the pixel region.

Another object of the present invention is to provide a liquid crystal display device which is applied to a liquid crystal display device driven normally white and prevents vertical line defects.

Technical problems of the present invention are not limited to the technical problems mentioned above, and other technical problems not mentioned will be clearly understood by those skilled in the art from the following description.

According to embodiments of the present invention, a thin film transistor array panel includes a plurality of gate lines having a gate electrode formed on an insulating substrate, a plurality of storage capacitor wirings and the storage capacitor wirings parallel to the gate lines. A light blocking pattern extending in the form of a branch; a gate insulating film covering the plurality of gate lines and the plurality of storage capacitor wirings; a semiconductor layer formed on the gate insulating film; and the plurality of gate lines intersecting the semiconductor. A plurality of data lines having a source electrode overlapping at least a portion of the layer, a drain electrode facing the source electrode around the gate electrode and overlapping at least a portion of the semiconductor layer, a protective film covering the semiconductor layer; Is formed on the protective film and electrically connected to the drain electrode, And a plurality of pixel electrodes formed to cover the data line positioned between the light blocking patterns.

The light blocking pattern may extend from the storage capacitor wiring so as to cover an area between the adjacent pixel electrodes adjacent to the left and right.

The drain electrode may further include an extension pattern formed to overlap the light blocking pattern.

The extension pattern may be formed on the light blocking pattern to overlap all of the pixel electrodes adjacent to each other.

In addition, the extension pattern may be formed on the light blocking pattern so as to overlap any one of the adjacent pixel electrodes.

The light blocking pattern may be formed to overlap each of the adjacent pixel electrodes adjacent to the left and right of the light blocking pattern.

It may further include a color filter formed on the protective film. In addition, the method may further include an organic layer formed on the color filter.

Specific details of other embodiments are included in the detailed description and the drawings.

Advantages and features of the present invention and methods for achieving them will be apparent with reference to the embodiments described below in detail with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but will be implemented in various forms, and only the present embodiments are intended to complete the disclosure of the present invention, and the general knowledge in the art to which the present invention pertains. It is provided to fully convey the scope of the invention to those skilled in the art, and the present invention is defined only by the scope of the claims. Like reference numerals refer to like elements throughout.

First, the structure of the liquid crystal display according to the first exemplary embodiment of the present invention will be described in detail with reference to FIGS. 1 and 2.

FIG. 1 is a layout view of a liquid crystal display according to a first exemplary embodiment of the present invention, and FIG. 2 is a cross-sectional view of the liquid crystal display shown in FIG. 1 taken along the line II-II ′.

As shown in FIGS. 1 and 2, the liquid crystal display according to the first exemplary embodiment of the present invention includes a plurality of gate lines 21 and a plurality of storage capacitor wirings on the insulating substrate 10. 25) is formed.

The gate line 21 and the storage capacitor wiring 25 are separated from each other. The gate line 21 transmits a gate signal, and a part of each gate line 21 protrudes upward to form a plurality of gate electrodes 22. In addition, the gate pad 23 positioned near one end of the gate line 21 transmits a gate signal from the outside to the gate line 21.

The storage capacitor wiring 25 receives a predetermined voltage such as a common voltage, and is vertically disposed to serve as a light blocking film covering a region between adjacent pixel electrodes 92 adjacent to left and right. The light blocking pattern 29 is formed to extend. In this case, the light blocking pattern 29 may be formed to overlap each of the neighboring pixel electrodes 92. In addition, the ratio of the area where the light blocking pattern 29 overlaps the neighboring pixel electrodes 92 may be symmetrical or asymmetrical.

The gate line 21 and the storage capacitor wiring 25 include a conductive film made of a silver-based metal such as silver (Ag) or a silver alloy having a low resistivity, or an aluminum-based metal such as aluminum (Al) or an aluminum alloy. In addition to these conductive films, other materials, such as chromium (Cr), titanium (Ti), tantalum (Ta), molybdenum (Mo) and alloys thereof, which have good physical, chemical and electrical contact properties with other materials, in particular ITO or IZO It may have a multilayer film structure including a conductive film. An example of the combination of the lower layer and the upper layer is chromium / aluminum-neodymium (Nd) alloy.

A gate insulating film 30 made of silicon nitride (SiNx) or the like is formed on the gate line 21 and the storage capacitor wiring 25.

An island-like semiconductor layer 40 made of hydrogenated amorphous silicon (amorphous silicon is abbreviated a-Si) or the like is formed on the gate insulating film 30 of the gate electrode 22. On top of 40, a plurality of pairs of ohmic contacts 54, 55 made of n + hydrogenated amorphous silicon doped with silicide or n-type impurities at high concentration are formed. Each pair of ohmic contacts 54 and 55 are separated from each other around the corresponding gate electrode 22.

A plurality of data lines 61 and a plurality of drain electrodes 64 are formed on the ohmic contacts 54 and 55 and the gate insulating layer 30.

The data line 61 mainly extends in the vertical direction to cross the gate line 21 and transmit a data voltage. A plurality of branches extending from the data line 61 toward the drain electrode 64 form a source electrode 65. The pair of drain electrodes 64 and the source electrode 65 are separated from each other, and are positioned on the ohmic contacts 54 and 55, respectively. In addition, the data pad 63 located near one end of the data line 61 transmits a data signal from the outside to the data line 61.

On the other hand, the first pattern 66 having a structure extending from the drain electrode 64 is formed so as to partially overlap the storage capacitor wiring 25, thereby forming a storage capacitor.

The data line 61 and the drain electrode 64 also include a conductive film made of a silver-based metal or an aluminum-based metal, and in addition to the conductive film, chromium (Cr), titanium (Ti), tantalum (Ta), and molybdenum (Mo) ) And other conductive films made of alloys thereof.

A lower passivation layer 71 made of silicon nitride or an organic material having excellent planarization characteristics is formed on the data line 61 and the drain electrode 64 and the semiconductor layer 40 which is not covered.

A plurality of three primary color filters 80, for example, red (R), green (G) and blue (B) color filters 80, are formed on the passivation layer 71. The color filter 80 has a boundary for each color formed between two adjacent pixel electrodes adjacent to the left and right. The neighboring color filters 80 partially overlap each other to form a hill.

An organic film 72 made of an organic insulating material is formed on the color filter 80.

In the organic layer 72, contact holes 77 and 79 are formed to expose the first pattern 66 and the data pad 63 extending from the drain electrode 64 together with the color filter 80 and the passivation layer 71. It is. In addition, the organic film 72 is provided with a contact hole 78 that exposes the gate pad 23 together with the color filter 80, the protective film 71, and the gate insulating film 30.

The pixel electrode 92 is formed on the organic layer 72 to be electrically connected to the drain electrode 64 through the contact hole 77. In addition, a gate contact auxiliary pad 98 and a data contact auxiliary pad 99, which are connected to the gate pad 23 and the data pad 63, respectively, are formed on the organic layer 72 through the contact holes 78 and 79. It is. The pixel electrode 92 and the contact auxiliary pads 98 and 99 are made of indium tin oxide (ITO) or indium zinc oxide (IZO), which are transparent conductive materials.

The pixel electrode 92 is electrically connected to the drain electrode 64 through the contact hole 77 to receive a data voltage from the drain electrode 64. The pixel electrode 92 applied with the data voltage forms an electric field together with the common electrode (not shown) of the upper substrate to rearrange the liquid crystal molecules between the two substrates.

On the other hand, in the case of a liquid crystal display device having a TN mode liquid crystal layer driven normally white, the pixel electrode 92 is positioned between the light blocking patterns 29 as in the first embodiment of the present invention. The structure covering the data line 61 requires a separate light blocking film for preventing light leakage between neighboring pixel electrodes 92. Therefore, according to the first embodiment of the present invention, the light blocking film pattern 29 formed by extending the region between the neighboring pixel electrodes 92 from the storage capacitor wiring 25 serves to prevent light leakage. Vertical line defects can be prevented. The light leakage phenomenon refers to a phenomenon in which liquid crystal loses electric field regulation force between pixel electrodes 92 and is misaligned.

Next, the structure of the liquid crystal display according to the second exemplary embodiment of the present invention will be described in detail with reference to FIGS. 3 and 4.

3 is a layout view of a liquid crystal display according to a second exemplary embodiment of the present invention, and FIG. 4 is a cross-sectional view of the liquid crystal display shown in FIG. 3 taken along the line IV-IV '.

As shown in FIGS. 3 and 4, the liquid crystal display according to the second exemplary embodiment of the present invention includes a plurality of gate lines 21 and a plurality of storage capacitor wirings on the insulating substrate 10. 25) is formed.

The gate line 21 and the storage capacitor wiring 25 are separated from each other. The gate line 21 transmits a gate signal, and a part of each gate line 21 protrudes upward to form a plurality of gate electrodes 22. In addition, the gate pad 23 positioned near one end of the gate line 21 transmits a gate signal from the outside to the gate line 21.

The storage capacitor wiring 25 receives a predetermined voltage such as a common voltage, and is vertically disposed to serve as a light blocking film covering a region between adjacent pixel electrodes 92 adjacent to left and right. The light blocking pattern 29 is formed to extend. In this case, the light blocking pattern 29 may be formed to overlap each of the neighboring pixel electrodes 92. In addition, the ratio of the area where the light blocking pattern 29 overlaps the neighboring pixel electrodes 92 may be symmetrical or asymmetrical.

The gate line 21 and the storage capacitor wiring 25 include a conductive film made of a silver-based metal such as silver (Ag) or a silver alloy having a low resistivity, or an aluminum-based metal such as aluminum (Al) or an aluminum alloy. In addition to these conductive films, other materials, such as chromium (Cr), titanium (Ti), tantalum (Ta), molybdenum (Mo) and alloys thereof, which have good physical, chemical and electrical contact properties with other materials, in particular ITO or IZO It may have a multilayer film structure including a conductive film. An example of the combination of the lower layer and the upper layer is chromium / aluminum-neodymium (Nd) alloy.

A gate insulating film 30 made of silicon nitride (SiNx) or the like is formed on the gate line 21 and the storage capacitor wiring 25.

An island-like semiconductor layer 40 made of hydrogenated amorphous silicon (amorphous silicon is abbreviated a-Si) or the like is formed on the gate insulating film 30 of the gate electrode 22. On top of 40, a plurality of pairs of ohmic contacts 54, 55 made of n + hydrogenated amorphous silicon doped with a high concentration of silicide or n-type impurities are formed. Each pair of ohmic contacts 54 and 55 are separated from each other around the corresponding gate electrode 22.

A plurality of data lines 61 and a plurality of drain electrodes 64 are formed on the ohmic contacts 54 and 55 and the gate insulating layer 30.

The data line 61 mainly extends in the vertical direction to cross the gate line 21 and transmit a data voltage. A plurality of branches extending from the data line 61 toward the drain electrode 64 form a source electrode 65. The pair of drain electrodes 64 and the source electrode 65 are separated from each other, and are positioned on the ohmic contacts 54 and 55, respectively. In addition, the data pad 63 located near one end of the data line 61 transmits a data signal from the outside to the data line 61.

Meanwhile, a first pattern 66 having a structure extending from the drain electrode 64 is formed to partially overlap the storage capacitor wiring 25, and has a structure extending from the first pattern 66. The second pattern 67 is formed to overlap the light blocking pattern 29 formed to extend in the vertical direction, thereby forming a storage capacitor.

The data line 61 and the drain electrode 64 also include a conductive film made of a silver-based metal or an aluminum-based metal, and in addition to the conductive film, chromium (Cr), titanium (Ti), tantalum (Ta), and molybdenum (Mo) ) And other conductive films made of alloys thereof.

The lower passivation layer 71, the color filter 80, and the organic layer 72 are formed on the data line 61 and the drain electrode 64 and the semiconductor layer 40 which is not covered by the upper layer. Since the liquid crystal display according to the first exemplary embodiment of the present invention is substantially the same, a detailed description thereof will be omitted below.

Therefore, according to the second embodiment of the present invention, similarly to the first embodiment of the present invention, the light blocking film pattern 29 formed by extending a region between the neighboring pixel electrodes 92 from the storage capacitor wiring 25. ) Prevents light leakage by preventing the light leakage.

In addition, in the liquid crystal display device in which the color filter 80 is present on the lower substrate, since the distance between the pixel electrode 92 and the storage capacitor wiring 25 is high, it is difficult to form the storage capacitor. By superimposing the second pattern 67 extending from the light blocking pattern 29, the holding capacity can be further secured.

Next, the structure of the liquid crystal display according to the third exemplary embodiment of the present invention will be described in detail with reference to FIGS. 5 and 6.

5 is a layout view of a liquid crystal display according to a third exemplary embodiment of the present invention, and FIG. 6 is a cross-sectional view of the liquid crystal display shown in FIG. 4 taken along the line VI-VI ′.

5 and 6, the liquid crystal display according to the third exemplary embodiment of the present invention includes a light blocking pattern 29 ′ extending in the vertical direction from the storage capacitor wiring 25 described above, Except for the structure of the second pattern 67 'that extends from the drain electrode 64 and overlaps the light blocking pattern 29', all structures are liquid crystals according to the second embodiment of the present invention. It is substantially the same as the display device.

The second pattern 67 ′ overlaps the light blocking pattern 29 ′ in a left or right direction so that the second pattern 67 ′ is partially overlapped with only one pixel electrode 92 of two neighboring pixel electrodes 92. Formed.

In addition, the light blocking pattern 29 ′ may be formed sufficiently wide in consideration of a mis-align margin according to the structure of the second pattern 67 ′ which is offset to one side.

Therefore, according to the third embodiment of the present invention, similarly to the second embodiment of the present invention, the light blocking film pattern 29 formed by extending the region between the neighboring pixel electrodes 92 from the storage capacitor wiring 25. ') Plays a role of preventing light leakage, thereby preventing vertical streaks.

In addition, in the liquid crystal display device in which the color filter 80 is present on the lower substrate, since the distance between the pixel electrode 92 and the storage capacitor wiring 25 is high, it is difficult to form the storage capacitor. By holding the second pattern 67 'extending from the light blocking pattern 29', the storage capacitance can be further secured.

In addition, the second pattern 67 ′ overlapping the light blocking pattern 29 ′ between the pixel electrodes 92 may cause light leakage due to coupling with neighboring pixel electrodes 92. The second pattern 67 ′ is overlapped in the left or right direction with respect to the light blocking pattern 29 ′ so that the second pattern 67 ′ is coupled to the neighboring pixel electrode 92. Can be prevented.

Although embodiments of the present invention have been described above with reference to the accompanying drawings, those skilled in the art to which the present invention pertains may implement the present invention in other specific forms without changing the technical spirit or essential features thereof. I can understand that. Therefore, it should be understood that the embodiments described above are exemplary in all respects and not restrictive.

As described above, according to the present invention, the pixel electrode is applied to the thin film transistor array panel having a structure overlapping with the data line in the pixel region, thereby preventing light leakage that may occur at the interface between the pixel electrodes. In addition, it can be applied to a liquid crystal display device driven normally white to prevent vertical streaks.

Claims (8)

A plurality of gate lines having a gate electrode formed over the insulating substrate; A light blocking pattern extending in the form of a plurality of storage capacitor wirings parallel to the gate line and the storage capacitor wiring; A gate insulating film covering the plurality of gate lines and the plurality of storage capacitor wirings; A semiconductor layer formed on the gate insulating film; A plurality of data lines intersecting the plurality of gate lines and having source electrodes overlapping at least a portion of the semiconductor layer; A drain electrode facing the source electrode with respect to the gate electrode and at least partially overlapping the semiconductor layer; A protective film covering the semiconductor layer; And A plurality of pixel electrodes formed on the passivation layer and electrically connected to the drain electrode, and covering the data lines positioned between the light blocking patterns adjacent to each other; And the light blocking pattern extends from the storage capacitor wiring so as to cover an area between the adjacent pixel electrodes adjacent to the left and right. In claim 1, The drain electrode further includes an extension pattern formed to overlap the light blocking pattern. In claim 2, And the extension pattern formed on the light blocking pattern to overlap all of the adjacent pixel electrodes. In claim 2, And the extension pattern overlapping one of the pixel electrodes adjacent to each other on the light blocking pattern. In claim 1, And the light blocking pattern overlaps each of the adjacent pixel electrodes to the left and right of the light blocking pattern. In claim 1, And a color filter formed on the passivation layer. In claim 5, The liquid crystal display device further comprising an organic layer formed on the color filter. In claim 1, The liquid crystal display device includes a TN mode liquid crystal layer driven normally white.

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