KR20060088671A - Apparatus and method of processing video data for plasma display panel - Google Patents

Abstract

The present invention relates to an apparatus and method for driving a plasma display panel to improve image quality.

A video data processing apparatus of a plasma display panel according to the present invention includes an inverse gamma correction unit for inverse gamma correction of each input pixel data; The inverse gamma correction unit determines whether the inverse gamma corrected pixel data is odd or even data input to odd or even numbers of pixel cells or address electrodes, respectively, and the dither value is set to "1" in the odd and even data. A dithering unit configured to correct the pixel data by using dither mask patterns having different positions of cells; A subfield mapping unit for mapping pixel data dithered from the dithering unit to a preset subfield pattern; And a data driver for supplying data from the subfield mapping unit to address electrodes of the plasma display panel.

Description

Plasma display panel video data processing apparatus and method {APPARATUS AND METHOD OF PROCESSING VIDEO DATA FOR PLASMA DISPLAY PANEL}             

1 is a diagram illustrating a configuration of subfields included in one frame.

2 is a diagram illustrating a video data processing apparatus of a plasma display panel according to an exemplary embodiment of the present invention.

3 is a diagram illustrating a dithering unit illustrated in FIG. 2.

FIG. 4 is a diagram illustrating a dither mask pattern stored in the dither mask table shown in FIG. 2.

5 is a diagram illustrating a video data processing method of a plasma display panel according to an exemplary embodiment of the present invention.

<Brief description of symbols for the main parts of the drawings>

2: reverse gamma correction unit 4: dithering unit

6: subfield mapping unit 8: data driver

10: PDP 12: dither mask selector

14 dither mask table 16 adder

30: dither mask pattern group

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel, and more particularly, to a video data processing apparatus and method for a plasma display panel capable of improving image quality.

Recently, a plasma display panel (hereinafter referred to as "PDP"), which is easy to manufacture a large panel, has attracted attention as a flat panel display device. The PDP displays an image including characters or graphics by emitting phosphors by 147 nm ultraviolet rays generated upon discharge of an inert mixed gas such as He + Xe, Ne + Xe or He + Xe + Ne. Such a PDP is not only thin and easy to enlarge, but also greatly improved in quality due to recent technology development. In particular, the three-electrode AC surface discharge type PDP has advantages of low voltage driving and long life because wall charges are accumulated on the surface during discharge and protect the electrodes from sputtering caused by the discharge.

As a method of driving the PDP, an ADS (Address and Display Separation) driving method which is driven by being divided into an address period and a display period, that is, a sustain period is typical. As shown in FIG. 1, the ADS driving method divides one frame 1F into a plurality of subfields SF1 to SF8 corresponding to each bit of data. Each of the subfields SF1 to SF8 again includes a reset period RPD for initializing a radiation cell, an address period APD for selecting a discharge cell, and a sustain period SPD for maintaining the discharge of the selected discharge cell. Divided. Here, in the sustain period SPD, different weights are given for each of the subfields SF1 to SF8, and the PDP implements a corresponding gray level by combining the sustain period SPD according to the video data.

As such, the PDP displays an image using a pulse width modulation method in which the sustain period SPD is proportional to the video data signal. In this case, the display period and the non-display period are distributed in various forms within each frame due to subfields that separate each frame according to each bit of video data. Accordingly, the PDP displays an image by integrating light emitted in each subfield period. In this case, contour noise occurs due to a mismatch between the direction of integration of light assumed by the PDP and the visual characteristics recognized by the human eye. And the contour noise increases when there is continuous gradation such as when the human skin is being displayed. For example, the contour noise increases when successively displaying gray scales, such as 127-128, 63-64, 31-32 gray scales, which differ greatly in emission pattern.

Such a driving method of the PDP for reducing the contour noise includes a method of optimizing the order of subfields, a method of dividing subfields corresponding to the most significant bit (MSB), an equalizing pulse method, and an error spreading error. Diffusion method, dithering method and the like have been proposed. Among them, an equalization pulse method, an error diffusion method, and a dithering method are typical.

The equalization pulse method compensates video data by increasing or decreasing video data generating contour noise using an equalization pulse. However, as contour noise is related to motion, it requires a motion estimator and has a large memory that can store multiple look-up tables as it requires different equalization pulses depending on the speed of motion. There is a disadvantage in that the complexity of the hardware is large.

The error diffusion method calculates quantization error data of digital video data using a Floyd-Steinberg error diffusion filter and spreads the calculated error data to adjacent pixels with different weights. However, the error diffusion method has a problem in that an error diffusion pattern due to the constant error diffusion coefficient is generated as the error diffusion coefficient (i.e., the weight) for the neighboring pixel is constantly set and repeated for each line and frame.

The dithering method is to add appropriate noise so that the contour noise is inconspicuous. For example, European Patent Application No. 00250099.9 and the like disclose a method of repeatedly using a three-dimensional dither pattern corresponding to a plurality of frames, a plurality of lines and a plurality of columns in a PDP. However, in the conventional dithering method, since one dither pattern is used in one frame to finally implement the entire image, regular patterns are easily observed, thereby degrading image quality.

Accordingly, an object of the present invention is to provide an apparatus and method for video data processing of a plasma display panel which can improve image quality.

In order to achieve the above object, the video data processing apparatus of the plasma display panel according to the present invention includes an inverse gamma correction unit for inverse gamma correction of each of the input pixel data; The inverse gamma correction unit determines whether the inverse gamma corrected pixel data is odd or even data input to odd or even numbers of pixel cells or address electrodes, respectively, and the dither value is set to "1" in the odd and even data. A dithering unit configured to correct the pixel data by using dither mask patterns having different positions of cells; A subfield mapping unit for mapping pixel data dithered from the dithering unit to a preset subfield pattern; And a data driver for supplying data from the subfield mapping unit to address electrodes of the plasma display panel.

The dithering unit determines whether the pixel data input from the inverse gamma correction unit is odd data input to odd pixel cells or address electrodes or even data input to even pixel cells or address electrodes, and a vertical synchronization signal. Selecting a dither mask pattern to be supplied to the detected pixel cell according to the determined result and the detected result after detecting the position of the pixel cell to which the pixel data is input using a horizontal synchronization signal and a pixel clock signal. A dither mask selection unit, a dither mask table having a plurality of dither mask patterns having different positions of cells having the dither value set to “1”, separated into an odd block and an even block, and stored from the dither mask table and the inverse gamma correction unit The dither mask table in the upper bits except the lower part bits of the pixel data. It characterized in that it comprises an adder for adding the dither value emitter to be supplied.

The dither mask table is characterized in that a plurality of dither mask patterns having different numbers of cells having the dither value set to "1" are divided into an odd block and an even block according to the gray level.

The number of cells in which the dither value is set to "1" increases as the gray level increases.

Each of the odd block and the even block may store at least two dither mask patterns having different positions of cells having the dither value set to "1".

In accordance with another aspect of the present invention, there is provided a method of processing video data of a plasma display panel, the method comprising: detecting a gray level of a lower part bit of input pixel data; Selecting one of a plurality of dither mask pattern groups in which a plurality of dither mask patterns having a different number of cells having a dither value set to “1” are divided into an odd block and an even block according to the detected result; Detecting a position of the pixel data; Determining whether the pixel data is odd data or even data; Selecting one of an odd block or an even block from the selected dither mask pattern group according to the determination result; Selecting a dither mask pattern present at a position corresponding to the position of the detected pixel data among the selected blocks; Selecting a dither value present at a position corresponding to a position of the detected pixel data in the selected dither mask pattern; And adding the selected dither value to the remaining bits except the lower part bits of the pixel data.

The pixel data may be inverse gamma corrected data.

Each of the odd block and the even block has different positions of cells in which the dither value is set to "1".

Other objects and advantages of the present invention in addition to the above object will become apparent from the description of the preferred embodiment of the present invention with reference to the accompanying drawings.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to FIGS.

2 is a block diagram schematically illustrating a video data processing apparatus of a PDP according to an embodiment of the present invention.

2, a video data processing apparatus of a PDP according to an embodiment of the present invention includes an inverse gamma corrector 2, a dither mask selector 12, connected between a video data input line and a PDP 10. A dithering unit 4, a subfield mapping unit 6, and a data driver 8 are provided.

The inverse gamma correction unit 2 receives digital video data gamma-corrected to suit the luminance characteristic of the display device from the outside, that is, pixel data to be supplied to each of the cells (sub pixels) constituting the PDP 10. The inverse gamma correction unit 2 performs inverse gamma correction on each of the input pixel data to make the luminance characteristic according to the pixel data linear. For example, the inverse gamma correction unit 2 outputs inverse gamma correction pixel data corresponding to the input pixel data by using a look-up table LUT that is set so that luminance characteristics according to the pixel data follow a 2.2 gamma curve. In this case, each of the pixel data output from the inverse gamma correction unit 2 includes an integer part and a fractional part. For example, when 8-bit pixel data is input, the inverse gamma correction unit 2 outputs pixel data corrected to 12 bits having a 6-bit integer part and a 6-bit fractional part, or an 8-bit integer part and an 8-bit fractional part. Outputs pixel data corrected to 16 bits with

The dithering unit 4 inputs pixel data input from the inverse gamma correcting unit 2 to odd data, that is, to odd-numbered pixel cells or address electrodes, or even data, that is, to even-numbered pixel cells or address electrodes. The pixel data is corrected by dithering using a dither mask pattern in which cells having a dither value of "1" in the odd and even data are located at different positions, thereby outputting pixel data having a reduced number of bits. In addition, the dithering unit 4 detects gray levels of the lower three bits of the input data, for example, 8-bit pixel data, and dither mask patterns having a different number of cells whose dither value is set to "1" according to each gray level. The pixel data of which the number of bits is reduced is output by correcting the pixel data using a dithering method. Such a detailed description of the dithering unit 4 will be described later.

The subfield mapping unit 6 maps and outputs each of the odd block and even block pixel data from the dithering unit 4 to a preset subfield pattern.

The data driver 8 latches the input data separated bit by bit according to the subfield pattern in the subfield mapping unit 6, and then, during the period in which the horizontal lines are driven by the latched data line by line, Supply to address electrodes.

The PDP 10 includes an address electrode and a pair of sustain electrodes intersecting the address electrode with the discharge space therebetween. Each cell having a discharge space corresponding to the subpixel is formed at each intersection of the address electrode and the sustain electrode pair. The PDP 10 selects cells to be turned on by the address discharge according to the data supplied from the data driver 8 to the address electrode whenever the scan electrode of the sustain electrode pair is driven in the address period of each subfield. . Then, the PDP 10 causes the selected cells to maintain discharge in the sustain period of each subfield by driving the sustain electrode pairs. In this case, as the number of bits of video data is reduced by the dithering unit 4, the number of subfields constituting one frame can be reduced to sufficiently secure the address period, so that the driving of the PDP 10 can be performed by a single scan method. Do.

3 is a diagram illustrating a configuration of the dithering unit illustrated in FIG. 2.

Referring to FIG. 3, the dithering unit 4 outputs a dither mask selecting unit 12 for selecting a dither mask pattern, a dither mask table 14 in which the dither mask pattern is stored, and an inverse gamma correction unit 2. And an adder 16 connected between the line and the subfield mapping section 6.

The dither mask selector 12 determines whether the pixel data input from the inverse gamma correction unit 2 is odd data, that is, data input to odd-numbered pixel cells or address electrodes, or even data, that is, even-numbered pixel cells or address electrodes. After determining whether or not the data is input to the input, the odd or even dither mask selection signals OSS and ESS are supplied to the dither mask table 14 according to the determination result. At this time, the dither mask selection unit 12 supplies an odd dither mask selection signal OSS to the dither mask table 14 when the input pixel data is odd data, and if the input pixel data is odd data, the dither mask selection signal ESS. Is supplied to the dither mask table 14. In addition, the dither mask selector 12 counts each of the vertical synchronization signal V, the horizontal synchronization signal H, and the pixel clock signal P input from an external control unit (not shown). That is, the position control signal PS indicating the position of the cell is supplied to the dither mask table 14. Accordingly, the dither mask table 14 selects one of the dither mask patterns stored in the odd block or even block according to the position control signal PS, and then selects the dither mask table 14 at a position corresponding to the position control signal PS in the selected dither mask pattern. An existing dither value is selected and supplied to the adder 16. Here, the odd block and the even block mean that a plurality of pixel cells or address electrodes are separated according to spatial positions.

In the dither mask table 14, pixel data input from the inverse gamma correction unit 2, for example, 0 to 7/8 corresponding to the lower 3 bits of the decimal part among pixel data having an integer part of 8 bits and a fraction part of 8 bits. Eight dither mask pattern groups 30 having different numbers of cells in which the dither value is set to "1" according to the gray level are stored. At this time, in each of the dither mask patterns of 0, 1/8, 2/8, 3/8, 4/8, 5/8, 6/8, 7/8 gradation, the number of cells whose dither value is set to "1" Increases in the order of zero, two, four, six, eight, ten, twelve, and fourteen. Meanwhile, the dither mask pattern groups 30 having the same gray level have the same number of cells in which the dither value is set to "1". That is, the number of cells in which the dither value is set to "1" in 1/8 gradation is equal to two. In the dither mask table 14, at least four or more dither mask patterns are stored according to each gray level. In this case, each of the dither mask pattern groups 30 is divided into an odd block and an even block, and each of the plurality of dither mask patterns stored in the odd block and the even block is a 4 × 4 cell (subpixel) as shown in FIG. 4. ) Has a size. Here, at least two dither mask patterns are stored in the odd block and the even block. Therefore, when the lower 3 bits of the decimal part of the pixel data input from the inverse gamma correction unit 2 are "001", the dither mask table 14 corresponds to 1 / 8th gradation among the plurality of dither mask pattern groups 30. The second dither mask pattern group 30b is selected. Here, in the dither mask pattern stored in the odd block and the even block of each dither mask pattern group 30, cells in which the dither value is set to "1" exist in different positions. For example, in the dither mask pattern group 30 corresponding to 1/8 gradation, two cells in which the dither value is set to "1" exist in each dither mask pattern, and the dither value present in each dither mask pattern Cells set to "1" are located at different positions regardless of the odd block and even block. That is, the points where the cells having the dither value set to "1" are located not only in the odd block and even block but also in the odd block and even block. At this time, the positions of the cells having the dither value of "1" may be changed in various ways according to the needs of the designer. According to the dither mask pattern, it is possible to spatially control the position of the on cell whose dither value corresponds to "1". In addition, as the positions of the cells having a dither value of "1" in the dither mask patterns are different for each odd block and even block for one frame, dither noise such as lattice noise due to repetition of a constant dither mask pattern can be reduced. .

The dither mask table 14 selects the dither mask pattern group 30 according to the gray level corresponding to the lower 3 bits of the decimal part of the pixel data, and receives the dither mask selection signal OSS input from the dither mask selection unit 12. ESS), one of the odd blocks or even blocks of the selected dither mask pattern group 30 is selected. The dither mask table 14 selects any one of the dither mask patterns present in the selected odd block or even block according to the position control signal PS input from the dither mask selecting unit 12. In addition, the dither mask table 14 selects a dither value D corresponding to a cell position in the dither mask pattern selected according to the position control signal PS, and supplies the dither mask pattern to the adder 16.

The adder 16 is connected between the inverse gamma correction unit 12, the dither mask table 14, and the subfield mapping unit 6 to convert the dither value D supplied from the dither mask table 14 into the inverse gamma correction unit. The subfield mapping section 6 adds the corrected 11-bit pixel data by adding a carry signal to the data of the pixel data (an integer part 8 bits + a fraction part 5 bits) except for the lower 3 bits of the fraction part of the pixel data supplied from (2). To supply.

5 is a diagram illustrating a video data processing method of a PDP according to an embodiment of the present invention.

Referring to FIG. 5, when the inverse gamma corrected pixel data is input by the inverse gamma correction unit 2, the dither mask table 14 enters the input pixel data, for example, an 8-bit integer part and an 8-bit fractional part. The gray level of the lower 3 bits of the fractional part of the pixel data is detected (S1). At this time, the pixel data corrected by the inverse gamma correction by the inverse gamma correction unit 2 is input to the dither mask table 14. Thereafter, the dither mask table 14 selects the dither mask pattern group 30 according to the detected gray levels (S2). At this time, the dither mask pattern group 30 indicates a dither mask pattern of 0 to 7/8 gray levels corresponding to the lower 3 bits of the decimal part of the pixel data. When the dither mask pattern group 30 according to the gray level is selected, the dither mask selecting unit 12 receives the vertical synchronous signal V, the horizontal synchronous signal H, and the pixel clock input from an external controller (not shown). After detecting the position of the pixel cell to which the inverse gamma corrected pixel data is input by the inverse gamma correction unit 2 using the signal P, the position control signal PS for the detected position is dither mask table 14 (S3). In addition, the dither mask selector 12 inputs the pixel data inversely gamma corrected by the inverse gamma correction unit 2 to odd-numbered pixel cells or address electrodes or odd-numbered pixel cells or address electrodes. It is determined whether or not even data is to be obtained and the dither mask selection signals OSS and ESS are supplied to the dither mask table 14 (S4). For this reason, when the odd dither mask selection signal OSS is input from the dither mask selection unit 12, the dither mask table 14 selects an odd block from the selected dither mask pattern group 30 (S5). In addition, the dither mask table 14 corresponds to a dither mask of the plurality of dither mask patterns existing in the odd block selected in accordance with the position control signal PS supplied from the dither mask selector 12. The pattern is selected (S6). Finally, the dither mask table 14 selects the dither value D present at the position corresponding to the position control signal PS in the selected dither mask pattern and supplies it to the adder 16 (S7). Accordingly, the adder 16 subtracts the dither value D supplied from the dither mask table 14 except the lower 3 bits of the fractional part of the pixel data supplied from the inverse gamma correction unit 2 (integer 8-bit + By adding the carry signal to the data of the fractional part 5 bits), the 11-bit pixel data is corrected and supplied to the subfield mapping unit 6 (S8).

On the other hand, the dither mask table 14 selects an even block from the selected dither mask pattern group 30 when the even dither mask selection signal ESS is input from the dither mask selection unit 12 (S9). At this time, the dither mask table 14 corresponds to the dither mask of the plurality of dither mask patterns existing in the even block selected according to the position control signal PS supplied from the dither mask selector 12. The pattern is selected (S9). In addition, the dither mask table 14 selects a dither value D present at a position corresponding to the position control signal PS in the selected dither mask pattern and supplies it to the adder 16 (S7). Accordingly, the adder 16 subtracts the dither value D supplied from the dither mask table 14 except the lower 3 bits of the fractional part of the pixel data supplied from the inverse gamma correction unit 2 (integer 8-bit + By adding the carry signal to the data of the fractional part 5 bits), the 11-bit pixel data is corrected and supplied to the subfield mapping unit 6 (S8).

As described above, an apparatus and method for processing video data of a PDP according to an embodiment of the present invention determine whether pixel data inputted during one frame are odd or even pixel cells or odd or even data input to address electrodes. Alternatively, the pixel data is corrected by using a dither mask pattern in which cells having dither values set to “1” in the even data are located at different positions. As a result, the video data processing apparatus according to the embodiment of the present invention applies a plurality of dither mask patterns to the entire image during one frame, thereby reducing dither noise such as lattice noise due to repetition of a constant dither mask pattern. It will be possible to improve.

As described above, the video data processing apparatus and method of the plasma display panel according to the present invention determine whether the pixel data input for one frame is odd or even data input to odd or even pixel cells or address electrodes. The pixel data is corrected using a dither mask pattern in which cells having dither values set to “1” in the odd or even data are located at different positions. As a result, since a plurality of dither mask patterns are applied to the entire image during one frame, dither noise such as lattice noise due to repetition of a constant dither mask pattern can be reduced, and thus image quality can be improved.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (8)

An inverse gamma correction unit configured to inverse gamma correct each of the input pixel data; The inverse gamma correction unit determines whether the inverse gamma corrected pixel data is odd or even data input to odd or even numbers of pixel cells or address electrodes, respectively, and the dither value is set to "1" in the odd and even data. A dithering unit configured to correct the pixel data by using dither mask patterns having different positions of cells; A subfield mapping unit for mapping pixel data dithered from the dithering unit to a preset subfield pattern; And a data driver for supplying data from the subfield mapping unit to address electrodes of the plasma display panel. The method of claim 1, The dithering unit, Whether the pixel data inputted from the inverse gamma correction unit is odd data inputted to odd-numbered pixel cells or address electrodes or even data inputted to even-numbered pixel cells or address electrodes is determined. A dither mask for detecting a position of a pixel cell to which the pixel data is input using a signal and a pixel clock signal, and then selecting a dither mask pattern to be supplied to the detected pixel cell according to the determined result and the detected result With the selection, A dither mask table in which a plurality of dither mask patterns having different positions of cells having the dither value set to “1” are separated into an odd block and an even block, and stored therein; And an adder for adding a dither value supplied from the dither mask table to upper bits of the pixel data input from the inverse gamma correction unit, except for the lower partial bits. The method of claim 2, The dither mask table includes a plurality of dither mask patterns having different numbers of cells having the dither value set to "1" according to the gray level, separated into an odd block and an even block, and stored in the dither mask table. . The method of claim 3, wherein And the number of cells in which the dither value is set to "1" increases as the gray level increases. The method of claim 2, And each of the odd block and the even block stores at least two dither mask patterns having different positions of cells having the dither value set to “1”. Detecting a gray level of a part of a lower bit of input pixel data; Selecting one of a plurality of dither mask pattern groups in which a plurality of dither mask patterns having a different number of cells having a dither value set to “1” are divided into an odd block and an even block according to the detected result; Detecting a position of the pixel data by using a vertical synchronization signal, a horizontal synchronization signal, and a pixel clock signal; Determining whether the pixel data is odd data or even data; Selecting one of an odd block or an even block from the selected dither mask pattern group according to the determination result; Selecting a dither mask pattern present at a position corresponding to the position of the detected pixel data among the selected blocks; Selecting a dither value present at a position corresponding to a position of the detected pixel data in the selected dither mask pattern; And adding the selected dither value to remaining bits except the lower part bits of the pixel data. The method of claim 6, And the pixel data is inverse gamma corrected data. The method of claim 6, And each of the odd block and the even block has different positions of cells in which the dither value is set to "1".

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