KR20060078241A - Analog buffer - Google Patents

Abstract

The present invention relates to an analog buffer that quickly stabilizes an output signal output to a signal line by rapidly charging and discharging a signal line. The present invention relates to a control signal by comparing an input signal to be charged to a signal line with an output signal charged to the signal line. A comparator for outputting; The control signal is connected to the signal line by the control signal, and increases by controlling the voltage difference between the input power voltage and the signal line, thereby accelerating the charging and discharging of the signal line. It is configured to include a signal control unit to stabilize to a level.

Analog Buffer, Charge, Discharge, Charge Pump, Stabilize

Description

Analog Buffer {ANALOG BUFFER}

1 is a view showing a schematic configuration of a liquid crystal display device integrated with the driving circuit.

Fig. 2a shows a first drive of a general analog buffer.

Fig. 2b shows a second drive of a general analog buffer.

3 illustrates an analog buffer in accordance with the present invention.

*** Description of the symbols for the main parts of the drawings ***

240: comparison unit 250: signal control unit

251: first charge pump 252: second charge pump

260: pulse generator SW11: first switch

SW12: second switch SW13: third switch

CS11: first control signal CS12: second control signal

Vin11: input signal Vout11: output signal

VDD: Supply Voltage

The present invention relates to an analog buffer, in particular, by applying a charge pump (charge pump) to speed up the charging and discharging speed of the signal line can be stabilized quickly to the desired level output signal charged in the signal line It is about an analog buffer.

In general, among display devices for displaying image information on screens, liquid crystal display devices have been actively studied in recent years because of their advantages of being light, thin, and providing high definition image quality.

The liquid crystal display device is an apparatus for displaying an image by adjusting the transmittance of light by optical anisotropy according to the alignment direction of the liquid crystal by artificially adjusting the alignment direction of the liquid crystal molecules having the orientation using polarization.

The substrate used in the liquid crystal display is a transparent material that transmits light, for example, a glass material having advantages in cost and processability is applied.

When the transistor is made of a polycrystalline silicon material having high electron mobility, the switching speed is high and the size can be designed small. However, since the polycrystalline silicon is formed by a high temperature process, the transistor can be formed on a glass substrate of a liquid crystal display device. There will be no.

Therefore, the thin film transistor applied to the glass substrate of the liquid crystal display device is made of an amorphous silicon material which can be formed by a low temperature process.

On the other hand, since the driving unit of the liquid crystal display requires a very large number of switching elements to process a digital signal, a plurality of integrated circuits (ICs) in which switching speeds are fast and small transistors are integrated at high density. It consists of                         

Therefore, the transistors applied to the driving unit of the liquid crystal display should be made of a polycrystalline silicon material formed by a high temperature process.

As described above, the thin film transistor applied to the substrate of the liquid crystal display device is made of an amorphous silicon material by a low temperature process, and the transistor applied to the driving part of the liquid crystal display device is made of a polycrystalline silicon material formed by a high temperature process.

Accordingly, the driving unit of the liquid crystal display is a plurality of integrated circuits are separately manufactured on a separate single crystal silicon substrate, and the integrated circuits are mounted on a tape carrier package (TCP) to form a tab automated bonding (TAB). ) Is connected to the substrate of the liquid crystal display device or mounted on the substrate of the liquid crystal display device in a chip-on-glass (COG) manner to be combined with the substrate.

However, as described above, when the driving unit of the liquid crystal display device is combined with the substrate by the tab method or the chip-on-glass method, the space occupied by the driving unit of the liquid crystal display device is limited, thereby limiting the size and simplification of the liquid crystal display device. In addition, various noises and electromagnetic interference (EMI) are generated as the number and length of wires transmitting the driving signals increase, thereby reducing the reliability of the product and increasing the manufacturing cost of the liquid crystal display device. there was.

However, in recent years, with the development of research and development for forming the polycrystalline silicon at a low temperature process, the thin film transistor fabricated on the substrate of the liquid crystal display device can be manufactured from the polycrystalline silicon material, and thus, on the substrate of the liquid crystal display device. A liquid crystal display device with a driving circuit integrated therein has been proposed.                         

1 is a view showing a schematic configuration of the liquid crystal display device integrated with the driving circuit.

Referring to FIG. 1, a liquid crystal display includes a plurality of gate lines 16 that are regularly spaced apart from each other, and a plurality of data lines 15 that are vertically spaced apart from each other and vertically intersect each other, and the gate lines ( A liquid crystal display panel 1 in which pixels P are formed in a region where the data line 16 intersects with the data line 16; A gate driver 30 mounted on the liquid crystal display panel 1 to apply a scan signal to the gate line 16; And a data driver 20 mounted on the liquid crystal display panel 1 to apply a data signal to the data lines 15.

Each pixel P includes a pixel electrode and a thin film transistor, the thin film transistor comprising a gate electrode connected to the gate line 16 and a source electrode connected to the data line 15; And a drain electrode connected to the pixel electrode.

The gate driver 30 sequentially applies a scan signal to the gate line 16, and the data driver 20 applies a data signal to the data line 15 so that the pixels of the liquid crystal display panel 1 By driving P) separately, an image is displayed on the liquid crystal display panel 1.

The gate driver 30 and the data driver 20 mounted on the liquid crystal display panel 1 are simultaneously formed in the process of manufacturing the thin film transistor array substrate of the liquid crystal display panel 1.

As described above, the driving circuit-integrated liquid crystal display device increases in number and length of data lines and gate lines as high resolution and large area increase, thereby increasing load.

On the other hand, since the amount of data signals processed to drive the liquid crystal display device increases as the high resolution and large area of the liquid crystal display device progress, the driving unit of the liquid crystal display device should be driven at a higher speed. Likewise, the load on the data lines and the gate lines increases, and thus a desired signal cannot be applied quickly.

Therefore, an analog buffer is used in the liquid crystal display to quickly apply a desired signal in response to the load of data lines and gate lines, and to stably hold an unstable voltage. The analog buffer may be variously applied to an output terminal for outputting image information from the data driver 20, an output terminal for outputting a scan signal from the gate driver 30, or an output terminal for outputting a common voltage to the liquid crystal panel 1. .

2A and 2B are diagrams illustrating a general analog buffer and its operation.

Referring to the drawings, the analog buffer includes a comparator 140, a first switch SW1 connected to an output terminal of the comparator 140, a gate electrode is connected to an output terminal of the comparator 140, and a drain electrode. The first transistor T1 connected to the low potential voltage source, and the second switch SW2 connected between the input terminal of the comparator 140 and the first transistor T1.

The first control signal CS1 and the second control signal CS2 are applied to the analog buffer. The first and second control signals CS1 and CS2 are signals having different potentials, and drive the first and third switches SW1 and SW3 and the second switch SW2 oppositely.

Transistors may be applied to the first to third switches SW1 to SW3. In this case, the first and third switches SW1 and SW3 and the second switch SW2 should use different types of transistors.

In the comparison unit 140, an operational amplifier (OP-AMP) is usually used.

The operation of the analog buffer as described above is as follows.

First, as shown in FIG. 2A, the output terminal of the comparator 140 and the low potential voltage source are electrically connected by the first control signal CS1 to reset the output terminal of the comparator 140. The first switch SW1 is turned on. The output terminal of the comparator 140 is initialized by applying a low potential voltage VSS, and the first transistor T1 is maintained in a turn-off state.

On the other hand, the first control signal CS1 also conducts the third switch SW3. When the third switch SW3 is turned on, the high potential voltage source and the output terminal of the analog buffer are electrically connected, so that the current according to the high potential voltage VDD is charged to the output terminal of the analog buffer to output the output signal Vout1. . In this case, since the second switch SW2 is blocked by the second control signal CS2 applied in a phase opposite to the first control signal CS1, unnecessary operation of the comparison unit 140 is prevented. .

As shown in FIG. 2B, after the output terminal of the analog buffer is charged by the high potential voltage VDD, the first control signal CS1 and the second control signal CS2 are inverted and applied, respectively. Therefore, the first switch SW1 and the third switch SW3 are shut off, and the second switch SW2 is turned on.

The comparator 140 receives an input signal Vin1, which is a reference voltage actually output from the analog buffer, and outputs the analog signal output Vout1 through the second switch SW2. 140).

The comparator 140 compares the voltages of the input signal Vin1 and the output signal Vout1 of the analog buffer and operates differently according to the difference between the two voltages. If the difference between the two voltages is 0V, the comparator 140 does not drive anything, and the output signal Vout1 of the analog buffer is maintained as it is, and the voltage of the output signal Vout1 is equal to that of the input signal Vin1. If the voltage is greater than the voltage, the output terminal of the comparator 140 is in a high potential state, and the first transistor T1 is turned on. At this time, since the current charged in the output terminal of the analog buffer through the turned-on first transistor T1 is discharged to the low potential voltage source, the voltage level of the output signal Vout1 is lowered.

The current charged at the output of the analog buffer is not completely discharged. That is, when the voltage of the output signal Vout1 becomes equal to the voltage of the input signal Vin1, the output terminal of the comparator 140 becomes low potential again, so that the first transistor T1 is turned off. The discharge at the output of the analog buffer is stopped. At this time, the output signal Vout1 having the same voltage as the input signal Vin1 is output from the output terminal of the analog buffer.

However, when the voltage of the input signal Vin1 among the input signal Vin1 and the output signal Vout1 input to the comparator 140 is high, that is, when the third switch SW3 is in contact with the output terminal of the analog buffer. If the current is not properly charged, the output terminal of the analog buffer cannot be charged to raise the output signal Vout1 to a desired reference voltage level. This is because the first transistor T1 can only perform the function of discharging the analog buffer. In order to overcome the limitation of the operation of the analog buffer, the high potential voltage VDD is initially set to a high voltage and charged to the output terminal of the analog buffer, so that the voltage level of the input signal Vin1 may be adjusted only by the discharge function. However, when the voltage difference between the input signal Vin1 and the output signal Vout1 becomes large, it takes some time to discharge the output signal Vout1 to bring it down to the voltage level of the input signal Vin1.

Each signal for driving the liquid crystal display has a short application time, and an interval between the signals is very short. In this way, the voltage level of each signal must be raised to a desired level within a short time to obtain a desired driving effect. When the voltage level is lowered as quickly as possible, the signal can be applied in a short time by narrowing the interval between consecutively applied signals. In particular, such a function is more important in a large area liquid crystal display device. However, since such fast charging and discharging speeds cannot be obtained with the conventional analog buffer, signal delay and distortion may occur, resulting in a poor driving of the liquid crystal display.

SUMMARY OF THE INVENTION The present invention has been made to solve the conventional problems as described above, and an object of the present invention is to provide an analog buffer for quickly stabilizing an output signal to a desired voltage level by fast charging and discharging.

An analog buffer for achieving the object of the present invention as described above comprises a comparison unit for outputting a control signal by comparing the input signal to be charged in the signal line and the output signal charged in the signal line; The control signal is selectively connected to the signal line by the control signal, and includes a signal controller for controlling the input power voltage to increase the potential difference with the signal line to accelerate charge and discharge of the signal line.

3 illustrates an analog buffer according to the present invention.

The analog buffer is selected by a comparator 240 for comparing a input signal to be charged to a signal line with an output signal charged to the signal line and outputting a control signal, and a first control signal CS11 output from the comparator. The first and second switches SW11 and SW12 are connected to the signal line through the first switch SW11, and the input power supply voltage VDD is doubled to more than two positive voltages. And a signal controller 250 for increasing the potential difference with the signal line and increasing the potential difference with the signal line by doubling the power supply voltage VDD to two or more negative voltages.

The output terminal of the comparator 240 is connected to the first switch SW11 and the second switch SW12. Although the first control signal CS11 is simultaneously applied to the first switch SW11 and the second switch SW12, only one of them is turned on. Transistors may be applied to the first and second switches SW11 and SW12. However, in order for only one of the first control signals CS11 to be conducted, transistors of different types must be used for the first and second switches SW11 and SW12. A transmission gate may be used for the first and second switches SW11 and SW12.

The first and second switches SW11 and SW12 are electrically connected to the signal controller 250. The signal controller 250 may include a first charge pump 251 for generating a positive voltage twice or more using the power supply voltage VDD, and a negative voltage twice or more using the power supply voltage VDD. The second charge pump 252 is generated.

The first and second charge pumps 251 and 252 are DC-DC converters and double the power supply voltage VDD according to an internal configuration. As described above, the first charge pump 251 and the second charge pump 252 are applied with the same power supply voltage VDD, but operate differently. The first charge pump 251 forms a positive power supply voltage VDD more than twice, and the second charge pump 252 forms a negative power supply voltage VDD more than twice. Although not shown inside the first and second charge pumps 251 and 252, the charge pump is typically operated by two pulses having a phase inverted periodically. Accordingly, the analog buffer is provided with a pulse generator 260 for supplying pulses PS1 and PS2 to the first and second charge pumps 251 and 252.

The pulse generator 260 periodically generates pulses and simultaneously generates pulses PS1 and PS2 having different phases and supplies them to the first charge pump 251 and the second charge pump 252, respectively. In the next cycle, the pulses PS1 and PS2 of opposite phases may be supplied to the first and second charge pumps 251 and 252, respectively.                     

An input signal Vin11 indicating a voltage reference of the output signal Vout11 output from the analog buffer is input to one of the two input terminals of the comparator 240, and an output line of the analog buffer is electrically connected to the output signal. The signal Vout11 is input. The output line of the analog buffer may be electrically connected to any signal line of a data line, a gate line, or a common voltage line of the liquid crystal panel.

The first charge pump 251 is connected to the output line of the analog buffer through the first switch SW11, and the second charge pump 252 is the output line of the analog buffer through the second switch SW12. Connected with

The driving of the analog buffer configured as described above is as follows.

First, since no signal is applied to the output line of the analog buffer in the initial state of the analog buffer, the third switch SW13 is turned on by the second control signal CS12 and the initial voltage is applied to the output line of the analog buffer. Charge by applying (Vrst). The initial voltage Vrst may be a power supply voltage VDD, but other voltages may be used. As such, if the third switch SW13 is cut off after the output line of the analog buffer is charged by the initial voltage Vrst, the output line of the analog buffer is in a floating state to maintain the charging value. do.

The input signal Vin11 and the output signal Vout11 of the output line charged by the initial voltage Vrst are input to two input terminals of the comparator 240. The comparison unit 240 outputs the first control signal CS11 by comparing the voltages of the two signals Vin11 and Vout11. When the voltage of the output signal Vout11 is greater than the voltage of the input signal Vin11, the second switch SW12 is turned on by the first control signal CS11 in the high potential state, and the output signal Vout11 is applied. When the voltage of V is smaller than the voltage of the input signal Vin11, the first switch SW11 is turned on by the first control signal CS11 in the low potential state. As described above, since the first and second switches SW11 and SW12 are transistors of different types, only one of them is selectively conducted whenever the first control signal CS11 is applied.

Meanwhile, the input signal Vin11 input to the comparator 240 is a signal that is actually applied to the signal line connected to the output line of the analog buffer. Therefore, the voltage level of the output signal Vout11 charged to the output line of the analog buffer initially by the initial voltage Vrst should be adjusted to the voltage level of the input signal Vin11.

The comparison unit 240 conducts the second switch SW12 by the first control signal CS11 when the voltage of the input signal Vin11 is greater than the voltage of the output signal Vout11. In this way, the second charge pump 252 is electrically connected to the output line of the analog buffer through the second switch SW12. At this time, since a negative power supply voltage VDD is formed in the second charge pump 252, more than twice the negative power supply voltage VDD is formed, and thus a large potential difference is formed between the second charge pump 252 and the output line of the analog buffer. Accordingly, as the charge charged in the output line of the analog buffer flows quickly into the second charge pump 252, and a rapid discharge occurs, the voltage level of the output signal Vout11 is changed to the voltage level of the input signal Vin11. Down quickly.

In contrast, when the voltage of the input signal Vin11 is less than the voltage of the output signal Vout11, the first switch SW11 is turned on by the first control signal CS11. As such, the first charge pump 251 is electrically connected to the output line of the analog buffer through the first switch SW11. Since the power supply voltage VDD is more than doubled in the first charge pump 251, a large potential difference is formed between the first charge pump 251 and the output line of the analog buffer. Accordingly, as the current I1 flows from the first charge pump 251 to the output line, and the charge is quickly charged to the output line, the voltage level of the output signal Vout11 is the voltage level of the input signal Vin11. As soon as you rise.

The main purpose of using the first and second charge pumps 251 and 252 is to make a large voltage difference between the output line of the analog buffer and each of the first and second charge pumps 251 and 252 to speed up the flow of current. To accelerate. In general, the voltage difference between the power supply voltage VDD and the output signal Vout11 is much larger than the voltage difference between the power supply voltage VDD and the output signal Vout11. As such, by increasing the speed of charging and discharging the output line of the analog buffer, the output signal Vout11 to be output from the analog buffer to the signal line can be quickly stabilized by rising or lowering to a desired level. Such an analog buffer may be used for fast stabilization of signals having only a very short period, especially in a large area liquid crystal display.

As described above, the analog buffer according to the present invention can charge and discharge the signal line quickly by the charge pump when the output signal charged to the signal line is different from the desired level, thereby maintaining the output signal stably and accurately at the desired level. Can be.

Claims (8)

A comparator for comparing the input signal to be charged to the signal line with the output signal charged to the signal line and outputting a control signal; First and second switches selectively connected by a control signal output from the comparison unit; A first charge pump electrically connected to the signal line through the first switch, and increasing a potential difference with the signal line by doubling the input power voltage to more than two positive voltages; And a second charge pump electrically connected to the signal line through the second switch, and increasing a potential difference with the signal line by doubling the input power voltage to two or more negative voltages. . The analog buffer of claim 1, wherein the signal line is charged with charge from the first charge pump. The analog buffer of claim 1, wherein the charge charged in the signal line is discharged to the second charge pump. The analog buffer of claim 1, further comprising a pulse generator configured to periodically provide pulses of different phases to the first and second charge pumps to drive the first and second charge pumps. The analog buffer of claim 1, wherein the first and second switches are transistors. The analog buffer of claim 5, wherein the first and second switches are transistors of different types. The analog buffer of claim 1, wherein the first and second switches are transmission gates. A comparator for comparing the input signal to be charged to the signal line with the output signal charged to the signal line and outputting a control signal; And The control signal is connected to the signal line by the control signal, and increases by controlling the voltage difference between the input power voltage and the signal line, thereby accelerating the charging and discharging of the signal line. Analog buffer, characterized in that configured to include a signal control unit to stabilize to a level.

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