KR20060065329A - A thin film transistor array panel, liquid crystal display and repairing method thereof - Google Patents

Abstract

According to the present invention, a repair line is formed on the same layer as the gate line, so that a transistor failure occurs in a thin film transistor array panel having two transistors in one pixel, so that repair can be performed by using the repair line.

By using this, four shortings and three cuttings can be used to repair a defective sub-pixel, thereby improving yield.

Transistor failure, repair line, subpixel, data line

Description

Thin film transistor array panel, liquid crystal display device and repair method thereof {A THIN FILM TRANSISTOR ARRAY PANEL, LIQUID CRYSTAL DISPLAY and REPAIRING METHOD THEREOF}

1 is a layout view of a thin film transistor array panel according to an exemplary embodiment of the present invention.

FIG. 2 is a cross-sectional view taken along line II-II 'of FIG. 1.

3 is a layout view of a common electrode display panel according to an exemplary embodiment of the present invention.

4 is a layout view of a liquid crystal display according to an exemplary embodiment of the present invention including the display panel of FIGS. 1 and 3.

FIG. 5 is a diagram illustrating a repairing method of the thin film transistor array panel for the liquid crystal display of FIG. 1.

<Explanation of symbols for the main parts of the drawings>

110: first substrate 121: gate line

124a: first gate electrode 124b: second gate electrode

131: storage electrode line 140: gate insulating film

137a: first repair ship 137b: second repair ship

154a: first channel portion semiconductor layer 154b: second channel portion semiconductor layer

157a: first repair line semiconductor layer 157b: second repair line semiconductor layer

163a, 163b, 165a, 165b, 167a, 167b: ohmic contact layer                 

171a: first data line 171b: second data line

171c: data line connection

173a: first source electrode 173b: second source electrode

175a: first drain electrode 175b: second drain electrode

180: shield

185a: first contact hole 185b: second contact hole

190a: first pixel electrode 190b: second pixel electrode

210: second substrate 270: common electrode

72a, 72b: common electrode incision

92a: first pixel electrode cutout 92b: second pixel electrode cutout

The present invention relates to a thin film transistor array panel, a liquid crystal display, and a repair method thereof, which can repair a defect in a transistor.

The display device is a device that provides information through an image. Among them, a liquid crystal display device and an organic EL display device are in the spotlight as a flat panel display device. Among them, a liquid crystal display device generally includes an upper substrate and a thin film transistor on which a common electrode and a color filter are formed. And a liquid crystal material are injected between the lower substrate where the pixel electrode and the like are formed, and different electric potentials are applied to the pixel electrode and the common electrode to form an electric field to change the arrangement of the liquid crystal molecules, thereby adjusting the light transmittance. This is an apparatus which expresses an image.

These liquid crystal display devices and organic EL display devices use a thin film transistor array panel for its driving.

In the display panel on which the thin film transistor is formed, a plurality of gate lines and data lines are formed in row and column directions, respectively, and pixel electrodes connected to the gate lines and data lines are formed through the thin film transistors. Pixel electrodes connected to these gate lines and data lines are formed through the thin film transistors. The thin film transistor controls the data signal transmitted through the data line according to the gate signal transmitted through the gate line and transmits the data signal to the pixel electrode. The gate signal is generated by combining a plurality of gate driving integrated circuits (ICs) receiving the gate on voltage and the gate off voltage generated by the driving voltage generator according to control from the signal controller. The data signal is obtained by changing the gradation signal from the signal controller to the analog voltage by the plurality of data driving ICs.

The signal controller and driving voltage generation ratio are usually provided on a printed circuit board (PCB) located outside the display panel, and the driving IC is a flexible printed circuit (FPC) located between the PCB and the liquid crystal panel assembly. ) It is mounted on the substrate. Two PCBs are usually placed in this case, one above and one left of the liquid crystal panel assembly, and the left one is called a gate PCB and the right one is called a data PCB. A gate driving IC is positioned between the gate PCB and the display panel, and a data driving IC is positioned between the data PCB and the display panel, and each receives a signal from a corresponding PCB.

However, only the data PCB can be used without using the gate PCB. In this case, the gate side FPC board and the gate driver IC thereon may be left as it is. In this case, in order to transfer signals from the signal controller and the driving voltage generator located in the data PCB to all the gate driver ICs, wires are separately formed on the data FPC board and the display panel. Wiring is also made on the gate FPC board so that signals can be passed to the next gate driver IC.

The narrow view angle of the liquid crystal display has been a major disadvantage, and a method of widening the view angle of the liquid crystal display has been proposed in various ways. Increasingly, research has been made on how to widen a viewing angle by dividing one pixel into two or more subpixels and inserting patterns into upper and lower electrodes to control the liquid crystal rotation direction. Among these studies, a method of controlling two or more subpixels by connecting them with each transistor has been increased.

As such, a structure in which one pixel is divided into two or more subpixels and connected and controlled with each transistor requires more wires and transistors to be inserted than the existing structure.

That is, a large number of fine wires are formed in the thin film transistor array panel, and some of these wires may be disconnected or short-circuited. In addition, defects may occur in some of the many transistors.

There have been many structures for repairing defects when wiring occurs, but no structure has been proposed in which transistors repair defects when two transistors are used in one pixel. As described above, in order to use the display panel without discarding the transistor when a defect occurs, a disconnection or a short circuit of the wiring can be repaired, and a simple structure is required.

An object of the present invention is to provide a thin film transistor array panel for a liquid crystal display device and a repairing method having a structure capable of repairing a transistor failure in a structure in which one pixel is divided into two or more subpixels.

In order to solve this problem, in the present invention, a repair line is formed on the same layer as the gate line so that a repair can be performed by using a transistor failure.

Specifically, an insulating substrate, a gate line formed on the insulating substrate in a first direction, formed on the insulating substrate in a second direction, and insulated from and intersecting the gate line, the first data line and the second data line. A first thin film transistor comprising a pair of two data lines connected to the data line, the gate line, and the first data line, the first thin film transistor including a first drain electrode, and the gate connected to the first thin film transistor; A second thin film transistor connected to a line and the first data line and including a second drain electrode, a first pixel electrode connected to the first drain electrode, and a second pixel connected to the second drain electrode The first repair line overlapping the electrode, the first drain electrode and the second data line, the second drain electrode and the second data line The second repair are for the TFT array panel, including lines,

Preferably, the first and second repair lines are formed in the same process with the same material on the same layer as the gate line,

Preferably, two connection units are formed in pairs, and one connection unit is formed to correspond to the first pixel electrode and the second pixel electrode.

Preferably, the gate line is positioned between the first pixel electrode and the second pixel electrode, and each of the connection portions is formed farther from the gate line than the first and second repair lines.

Preferably, the first drain electrode and the second drain electrode each include a repair portion extending toward the front data line so as to overlap the first repair line and the second repair line, respectively.

A first insulating substrate, a gate line formed on the first insulating substrate in a first direction, formed on the first insulating substrate in a second direction, and insulated from and intersecting with the gate line; Two data lines are paired and connected to the data line, the gate line and the first data line, which are connected to each other by a connection part, and include a first thin film transistor including a first drain electrode and the first thin film transistor. A second thin film transistor connected to the gate line and the first data line, the second thin film transistor including a second drain electrode, a first pixel electrode connected to the first drain electrode, and a second drain electrode A first repair line overlapping a second pixel electrode, the first drain electrode, and a second data line, and overlapping the second drain electrode and the second data line. Is a second repair line, a second insulating substrate facing the first insulating substrate, a common electrode formed on the second insulating substrate, a liquid crystal material layer injected between the first substrate and the second substrate, and And a domain dividing means formed on at least one of the first insulating substrate and the second insulating substrate and including domain dividing means for dividing the first pixel electrode and the second pixel electrode into a plurality of small domains. ,

Preferably, the first and second repair lines are formed in the same process with the same material on the same layer as the gate line,

Preferably, two connection units are formed in pairs, and one connection unit is formed to correspond to the first pixel electrode and the second pixel electrode.

Preferably, the gate line is positioned between the first pixel electrode and the second pixel electrode, and each of the connection portions is formed farther from the gate line than the first and second repair lines.

Preferably, the first drain electrode and the second drain electrode each include a repair portion extending toward the front data line so as to overlap the first repair line and the second repair line, respectively.

A first line connected to a gate line, a first data line and a second data line, the first line and a second data line, the first line being connected to the gate line and the first data line, and including a first drain electrode A second thin film transistor connected to the thin film transistor, the gate line to which the first thin film transistor is connected, and the first data line, and including a second drain electrode, and a first pixel connected to the first drain electrode A first repair line overlapping an electrode, a second pixel electrode connected to the second drain electrode, the first drain electrode, and the second data line, a second overlapping line with the second drain electrode, and the second data line; In the thin film transistor array panel including two repair lines, both ends of the first repair line are shorted to be connected to the first drain electrode and the second data line, and Shorting both ends to connect the second drain electrode and the second data line, disconnecting the first repair line and the second repair line and the shorted second data line, and cutting the drain electrode of the defective transistor to cut off the signal. And a method for repairing the thin film transistor, the method including the step of preventing from being applied to the pixel electrode connected to the drain electrode.

The gate line is positioned between the first pixel electrode and the second pixel electrode, and the disconnecting of the second data line may be performed when the gate line is positioned more than the position on the second data line shorted with the first and second repair lines. It is desirable to disconnect each of the positions farther from the line,

Preferably, the disconnection position is present in a region corresponding to the first pixel electrode and a region corresponding to the second pixel electrode, respectively.

DETAILED DESCRIPTION Embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like parts are designated by like reference numerals throughout the specification. When a part of a layer, film, region, plate, etc. is said to be "on" another part, this includes not only the other part being "right over" but also another part in the middle. On the contrary, when a part is "just above" another part, there is no other part in the middle.

Hereinafter, a thin film transistor array panel for a liquid crystal display according to an exemplary embodiment of the present invention and a repair method thereof will be described in detail with reference to the accompanying drawings.

1 is a layout view of a thin film transistor array panel according to an exemplary embodiment of the present invention, and FIG. 2 is a cross-sectional view taken along line II-II ′ of FIG. 1.

As a whole, one pixel is composed of two subpixels while being symmetrical with respect to the gate line 121 as shown in FIG. 1. The subpixel formed in the upper portion is called a first subpixel, and the subpixel formed in the lower portion is called a second subpixel. In the following description, the first subpixel will be described.

The gate wiring 121, the storage electrode line 131, and the repair lines 137a and 137b are formed on the transparent insulating substrate 110 such as glass.

The gate lines 121, 124a, and 124b include gate lines 121 extending in the horizontal direction, and a portion of the gate lines 121 protrude upward and downward to form the gate electrodes 124a and 124b.

The storage electrode line 131 is formed to be parallel to the gate line 121, and although not illustrated, may have branch lines.

The repair lines 137a and 137b are formed parallel to the gate line 121 and are positioned between the gate line 121 and the storage electrode line 131. In addition, the repair lines 137a and 137b may be formed at a position closer to the gate line 121 than the sustain electrode line 131, and may not be connected to the gate electrodes 124a and 124b. In addition, the repair lines 137a and 137b may be formed not to be parallel to the gate line 121, as shown in FIG. 1.

The gate wirings 121, 124a and 124b, the storage electrode lines 131, and the repair lines 137a and 137b are covered with the gate insulating layer 140, and the semiconductor layers 154a and 154b made of amorphous silicon on the gate insulating layer 140. 157a and 157b are formed. The semiconductor layer is divided into channel portion semiconductor layers 154a and 154b formed in the channel portion of the transistor and repair semiconductor layers 157a and 157b formed at one end of the repair lines 137a and 137b.

The channel portion semiconductor layers 154a and 154b overlap the gate electrodes 124a and 124b, respectively, to form channel portions of the thin film transistor. On the other hand, the repair semiconductor layers 157a and 157b are not necessarily components to be included as semiconductor layers formed to prevent the data lines formed on the repair lines 137a and 137b from being disconnected by a step.

On the semiconductor layers 154a, 154b, 157a, and 157b, ohmic contacts 163a, 163b, 165a, 165b, 167a, and 167b made of amorphous silicon doped with N-type impurities such as phosphorus are formed. The ohmic contact layer is also divided into portions 163a, 163b, 165a and 165b formed in the thin film transistor and portions 167a and 167b formed at one end of the repair line.

The data wires 171a, 171b, 171c, 173a, 173b, 175a, and 175b are disposed on the semiconductor layers 154a, 154b, 157a, and 157b, the contact layers 163a, 163b, 165a, 165b, 167a, and 167b, and the gate insulating layer 140. ) Is formed. The data wires 171a, 171b, 171c, 173, 175a, and 175b respectively connect data line connection portions connecting the first and second data lines 171a and 171b and the first and second data lines 171a and 171b that extend vertically. First and second source electrodes 173a and 173b connected to 171c and the first data line 171a and first and second drain electrodes 175a and 175b separated from the first and second source electrodes 173a and 173b.

Two data lines are formed in pairs, and the first and second data lines 171a and 171b are connected to two data line connection units 171c per pixel. The connection part 171c is preferably provided with one data line connection part 171c per subpixel. The data line connection part 171c is formed closer to the storage electrode line 131 than the gate line 121, and is located closer to the storage electrode line 131 than the repair lines 137a and 137b.

The first and second source electrodes 173a and 173b protrude from the first data line 171a on the first and second gate electrodes 124a and 124b and have a horseshoe shape. One end of the first and second drain electrodes 175a and 175b is formed in a space between the horseshoe of the first and second source electrodes 173a and 173b having a horseshoe shape, and the other ends thereof are repair lines 137a and 137b. It extends toward the front end data line (the data line neighboring the data line connected with the thin film transistor) so as to overlap. A portion extending from the first and second drain electrodes 175a and 175b so as to overlap with the repair lines 137a and 137b is referred to as a repair portion below, and the repair portion does not overlap with the gate line and is formed to be parallel to the gate line. Do.

Here, the ohmic contacts 163a, 163b, 165a, and 165b formed in the transistor are formed only at a portion where the channel portion semiconductor layers 154a and 154b overlap with the data wirings 173a, 173b, 175a, and 175b. The ohmic contacts 167a and 167b formed on the repair line are formed only at the portion where the second data line 171b and the repair line semiconductor layers 157a and 157b overlap.

The passivation layer 180 is formed on the data wires 171a, 171b, 171c, 173a, 173b, 175a, and 175b. In this case, the passivation layer 180 has first and second contact holes 185a and 185b exposing one ends of the first and second drain electrodes 175a and 175b, respectively.

First and second pixel electrodes connected to the first drain electrode 175a and the second drain electrode 175b through the first contact hole 185a and the second contact hole 185b on the passivation layer 180, respectively. 190a and 190b are formed. The pixel electrodes 190a and 190b are made of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO).

The first and second pixel electrodes 190a and 190b are physically and electrically connected to the drain electrodes 175a and 175b through the contact holes 185a and 185b to receive a data voltage from the drain electrodes 175a and 175b.

The first and second pixel electrodes 190a and 190b to which the data voltage is applied rearrange the liquid crystal molecules of the liquid crystal layer by generating an electric field together with the common electrode 270.                     

The first and second pixel electrodes 190a and 190b and the common electrode 270 form a capacitor (hereinafter, referred to as a “liquid crystal capacitor”) to maintain an applied voltage even after the thin film transistor is turned off. In order to enhance the voltage holding capability, another capacitor connected in parallel with the liquid crystal capacitor is provided, which is called a storage electrode. The storage capacitor is formed by overlapping the pixel electrode 190 with the storage electrode line 131. The storage electrode 135 is disposed on the storage electrode line 131 to increase the capacitance of the storage capacitor, that is, the storage capacitance. By extending and expanding the drain electrode 175 connected to 190 to close the distance between the terminals and to increase the overlap area. The potential of the common electrode facing the pixel electrodes 190a and 190b is usually applied to the storage capacitor wiring 131.

The pair of first and second pixel electrodes 190a and 190b are engaged with each other with a gap therebetween, and the upper left corner of the first pixel electrode 190a and the lower left corner of the second pixel electrode 190b are chamfered. Has a modified form.

The pair of first and second pixel electrodes 190a and 190b have a first cutout 92a and a second cutout 92b, respectively, and the pixel electrodes 190a and 190b have these cutouts 92a and 92b, respectively. Is divided into a plurality of areas. The cutouts 92a and 92b invert the symmetry of the pixel electrode with respect to the gate line 121. The first and second cutouts 92a and 92b extend perpendicular to each other at an angle of about 45 degrees with respect to the gate line 121.

Therefore, the first subpixel is divided into a plurality of areas by the first cutout 92a, and the second subpixel is divided into a plurality of areas by the second cutout 92b. In this case, the number of regions or the number of cutouts may vary depending on the size of the pixel, the length ratio of the horizontal and vertical sides of the pixel electrode, the type and characteristics of the liquid crystal layer, and the inclination direction may also vary.

Next, the common electrode display panel 200 will be described with reference to FIGS. 3 to 4.

3 is a layout view of a common electrode display panel according to an exemplary embodiment of the present invention, and FIG. 4 is a layout view of a liquid crystal display according to an exemplary embodiment of the present invention including the display panels of FIGS. 1 and 3.

A light shielding member is formed on an insulating substrate made of transparent glass or the like. The light blocking member has a plurality of openings facing the pixel electrode and having substantially the same shape as the pixel electrode, and preferably includes a portion corresponding to the gate line and the data line and a portion corresponding to the thin film transistor.

A plurality of color filters are also formed on the substrate and are mostly located in an area surrounded by the light blocking member. The color filter may extend in the vertical direction along the pixel electrode. As the color filter, one of primary colors such as red, green, and blue is selected and used.

An overcoat is formed on the color filter.

The common electrode 270 formed of a transparent conductor such as ITO or IZO is formed on the overcoat.

The common electrode 270 has a plurality of sets of cutouts 72a and 72b.                     

The pair of cutouts 72a and 72b are formed at positions corresponding to the first and second pixel electrodes 190a and 190b and include the first cutout 72a and the second cutout 72b. do. Each of the cutouts 72a and 72b is disposed between adjacent cutouts 92a and 92b of the first and second pixel electrodes 190a and 190b or chamfered between the cutouts 92a and 92b and the pixel electrodes 190a and 190b. It is placed between the hypotenuses.

The number and direction of the cutouts 72a and 72b may also vary according to design factors, and the light blocking member may overlap the cutouts 72a and 72b to block light leakage near the cutouts 72a and 72b.

Vertical alignment layers are coated on the inner surfaces of the display panels 100 and 200, and polarizing plates are provided on the outer surfaces thereof. The transmission axes of the two polarizing plates are orthogonal and one of the transmission axes is parallel to the gate line 121. In the case of a reflective liquid crystal display, one of two polarizers may be omitted.

The liquid crystal layer has negative dielectric anisotropy, and the liquid crystal molecules of the liquid crystal layer are aligned such that their major axes are perpendicular to the surfaces of the two display panels in the absence of an electric field.

When a common voltage is applied to the common electrode 270 and a data voltage is applied to the first and second pixel electrodes 190a and 190b, a primary electric field substantially perpendicular to the surface of the display panel is generated. In response to the electric field, the liquid crystal molecules attempt to change their long axis to be perpendicular to the direction of the electric field. Meanwhile, the cutouts 72a, 72b, 92a and 92b of the common electrode 270 and the first and second pixel electrodes 190a and 190b, and the first and second pixel electrodes 190a and 190b parallel thereto. The sides distort the main electric field, creating a horizontal component that determines the tilt direction of the liquid crystal molecules. The horizontal component of the main electric field is perpendicular to the sides of the cutouts 72a, 72b, 92a, 92b and the sides of the first and second pixel electrodes 190a, 190b. In addition, the horizontal components of the main electric field at two opposite sides of the cutouts 72a, 72b, 92a, 92b are opposite to each other.

Through these electric fields, the cutouts 72a, 72b, 92a, and 92b control the direction in which the liquid crystal molecules of the liquid crystal layer are inclined. The liquid crystal molecules in each domain defined by the adjacent cutouts 72a, 76b, 92a, 92b or defined by the left hypotenuse of the cutouts 72a, 72b and the first pixel electrode 190a are cutouts 72a. , 72b, 92a, 92b are inclined in a direction perpendicular to the longitudinal direction.

At least one cutout 92a, 92b, 72a, 72b may be replaced with a protrusion (not shown) or a depression (not shown). The protrusions may be made of organic or inorganic materials and may be disposed above or below the field generating electrodes 190a, 190b, and 270.

The shape and arrangement of the cutouts 92a, 92b, 72a, 72b can be modified.

FIG. 5 is a diagram illustrating a repairing method of the thin film transistor array panel for the liquid crystal display of FIG. 1.

In the thin film transistor array panel illustrated in FIGS. 1 and 2, a method of repairing a defect in a transistor will be described.

A description will be given of a method in which the upper (first subpixel) transistor of the two transistors shown in FIG. 5 is considered defective and repaired. Hereinafter, a thin film transistor in which a defect occurs is referred to as a defective transistor, and a drain electrode of the defective transistor is referred to as a defective drain electrode.

When a failure occurs in the transistor, the data signal is transmitted to the drain electrode regardless of the gate signal, and thus the voltage is continuously applied to the pixel electrode. In this case, the first subpixel becomes an Off state (since PVA is normally a black mode), and the first subpixel becomes a subpixel having a lower luminance than an adjacent subpixel. In order to solve this problem, four of A, A ', B, and B' of FIG. 3 are shorted with a laser, and C, D, and E of the first drain electrode of the second data line 171b are disconnected with a laser. .

A, A ', B, and B' are portions where the repair lines 137a and 137b overlap the drain electrodes 175a and 185b and the second data line 171b, and C and D represent the second data line 171b. A point between the portion overlapping the repair lines 137a and 137b and the data line connecting portion 171c, and E is a point on the first drain electrode 175a and the first drain electrode 175a and the first pixel electrode ( Disconnect 190a). That is, E disconnects the drain electrode so that a signal is not transmitted to the pixel electrode through the drain electrode of the defective transistor.

In this case, when the transistor of the second subpixel is turned on, the data signal is transmitted from the second source electrode 173b to the second drain electrode 175b, and also to the second pixel electrode 190b. The signal is transmitted from the second repair line 137b to the first pixel electrode 190a through the second data line 171b through the first repair line 137a and the first drain electrode 175b. Since the second data line 171b is disconnected by C and D, a signal flowing through the second data line 171b is transmitted to the next pixel through the first data line 171a. In addition, the signal flowing to the defective transistor is not transmitted to the first pixel electrode 190a due to the disconnection at the point E. FIG.

The above method can be applied even when the transistor of the second subpixel is defective, and can be repaired by applying when the transistor is defective for all the pixels of the panel.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

When transistor defects occur in a structure having two thin film transistors in one pixel by using the thin film transistor array panel having the structure as described above, the subpixels having defective transistors can be repaired by four shortings and three cuttings. This improves the yield.

Claims (13)

Insulation board, A gate line formed on the insulating substrate in a first direction, A data line formed in the second direction on the insulating substrate and insulated from and intersecting with the gate line, wherein the first and second data lines are paired and connected to each other by a connection part; A first thin film transistor connected to the gate line and the first data line and including a first drain electrode; A second thin film transistor connected to the gate line and the first data line to which the first thin film transistor is connected, and including a second drain electrode; A first pixel electrode connected to the first drain electrode, A second pixel electrode connected to the second drain electrode, A first repair line overlapping the first drain electrode and the second data line, And a second repair line overlapping the second drain electrode and the second data line. In claim 1, And the first and second repair lines are formed in the same layer on the same layer as the gate line in the same process. In claim 1, 2. The thin film transistor array panel of claim 2, wherein two connection parts are formed in pairs, and one connection part is formed to correspond to the first pixel electrode and the second pixel electrode. In claim 3, The gate line is positioned between the first pixel electrode and the second pixel electrode, and each of the connection portions is formed to be located farther from the gate line than the first and second repair lines. In claim 1, The first drain electrode and the second drain electrode each include a repair unit extending toward the second data line so as to overlap with the first repair line and the second repair line, respectively. First insulating substrate, A gate line formed on the first insulating substrate in a first direction, A data line formed in the second direction on the first insulating substrate and insulated from and intersecting with the gate line, wherein the first data line and the second data line are paired and connected to each other by a connection part; A first thin film transistor connected to the gate line and the first data line and including a first drain electrode; A second thin film transistor connected to the gate line and the first data line to which the first thin film transistor is connected, and including a second drain electrode; A first pixel electrode connected to the first drain electrode, A second pixel electrode connected to the second drain electrode, A first repair line overlapping the first drain electrode and the second data line, A second repair line overlapping the second drain electrode and a second data line, A second insulating substrate facing the first insulating substrate, A common electrode formed on the second insulating substrate, A liquid crystal material layer injected between the first substrate and the second substrate, And domain dividing means formed on at least one of the first insulating substrate and the second insulating substrate and dividing the first pixel electrode and the second pixel electrode into a plurality of small domains. In claim 6, And the first and second repair lines are formed in the same layer on the same layer as the gate line in the same process. In claim 6, And two connecting parts, and one connecting part corresponding to the first pixel electrode and the second pixel electrode. In claim 8, And the gate line is positioned between the first pixel electrode and the second pixel electrode, and each of the connection portions is formed farther from the gate line than the first and second repair lines. In claim 6, The first drain electrode and the second drain electrode each include a repair unit extending toward the second data line so as to overlap the first repair line and the second repair line, respectively. A first line connected to a gate line, a first data line and a second data line, the first line and a second data line, the first line being connected to the gate line and the first data line, and including a first drain electrode A second thin film transistor connected to the thin film transistor, the gate line to which the first thin film transistor is connected, and the first data line, and including a second drain electrode, and a first pixel connected to the first drain electrode A first repair line overlapping an electrode, a second pixel electrode connected to the second drain electrode, the first drain electrode, and the second data line, a second overlapping line with the second drain electrode, and the second data line; In the thin film transistor array panel containing two repair lines, Shorting both ends of the first repair line and connecting the first drain electrode and the second data line, and shorting both ends of the second repair line and connecting the second drain electrode and the second data line; Disconnecting the first repair line and the second data line shorted with the second repair line, and cutting the drain electrode of the defective transistor so that a signal is not applied from the defective thin film transistor to the pixel electrode connected to the drain electrode. To repair a thin film transistor. In claim 11, The gate line is positioned between the first pixel electrode and the second pixel electrode, and the disconnecting of the second data line may be performed when the gate line is positioned more than the position on the second data line shorted with the first and second repair lines. A method of repairing thin film transistors that each disconnects a position farther from the line. In claim 12, And wherein the disconnection position is present in a region corresponding to the first pixel electrode and a region corresponding to the second pixel electrode, respectively.

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