KR20060041561A - Method of debugging in embedded system - Google Patents

Abstract

The present invention relates to a debugging method of an embedded system. The present invention provides a debugging method of a target system incorporating a processor associated with a host through a monitoring program, and performs an operation of each hardware using the processor in response to an interrupt execution request of the hardware of the target system. Storing the debugging information in the memory of the system by debugging the memory of the target system during the waiting time of the target system, and monitoring the hardware operation execution result and the debugging information to the host by executing the monitoring program. It provides a debugging method of the embedded system comprising a. Therefore, by directly debugging the hardware and software of the system in the target system without implementing a separate debugging environment, by maximizing the resource utilization of the target system, it is possible to reduce the cost and ease of improvement required for the implementation of the debugging environment.

Embedded Systems, Monitoring Programs, EISC Processors, Debugging

Description

Method of debugging in Embedded system}

1 to 2 are diagrams illustrating a debugging method in an embedded system according to the prior art.

3 is a view showing a board configuration and debugging environment of the embedded system according to the present invention

4 is a view showing an operation flow of the MPEG 2 encoder system according to the present invention.

5 is a diagram illustrating a monitoring debugging method according to the present invention.

-Explanation of symbols for the main parts of the drawing-

100: target board 200: EISC processor

300: PREP unit 400: memory

500: ME part 600: VENC part

700: host

The present invention relates to a debugging method of an embedded system, and more particularly, to a debugging method that can be applied to the implementation of the MPEG 2 encoder system.                         

An embedded system is an electronic control system in which hardware and software of a computer are combined to perform specific predetermined functions.

A debugging method used in the development of such an embedded system is shown in FIG. 1.

1 to 2 are diagrams illustrating a debugging method in an embedded system according to the prior art.

First, the debugging method as shown in FIG. 1 utilizes the ICE (In-Circuit Emulator) 40 as a separate module to communicate with each other between the target board 10 and the host computer 50. To debug.

The ICE 40 has a separate central processing unit therein and receives commands from the host computer 50 so that the control bus, address bus, and data bus of the target board 10 may be controlled. I / O is performed by directly controlling the data bus, and the debugging mode is executed by forcibly entering the debugging mode. Thus, it provides convenience for command reception and data transmission between the host computer 50 and the target board 10 and provides ease of system development.

However, the debugging method using the ICE 40 according to the prior art, the ICE 40 has to be purchased separately, there is a disadvantage that a high cost is required to implement a development environment.

In addition, in the debugging method as shown in FIG. 2, a communication program that enables the remote debugger 60 of the host computer 50 to enable debugging is provided separately from the main program of the target board 10 to execute serial communication ( Remote-Debugging that debugs through serial communication.

The remote debugging method compiles and links a communication program that will operate on the target board 10 called a stub file when compiling a program to be executed on the target board 10.

The stub file used at this time is a program that performs communication and debugging functions between the host computer 50 and the target board 10 through serial communication. The stub file is interlocked with a debugger program on the host computer 50 to generate a kind of encrypted packet. It is in charge of communication by giving and receiving.

Therefore, when using this method, it is disadvantageous in terms of ease of development because it is necessary to develop a stub file considering the characteristics of a communication program for separate debugging, that is, a debugger program running on the target board 10 and the host computer 50. There was a downside.

The present invention is to solve the above problems, an object of the present invention is to propose a debugging method of the embedded system to minimize the cost by debugging the target board without the help of a separate device such as ICE.

Another object of the present invention is to propose a debugging method of an embedded system that facilitates development of a debugging environment by performing debugging without the help of a program such as a stub file to be developed separately at the same time as the target board program.

In order to achieve the above object, the present invention provides a debugging method of a target system incorporating a processor associated with a host through a monitoring program, the operation of each hardware using the processor in response to an interrupt execution request of the internal hardware of the target system. And storing the result in the memory of the system, debugging during the standby time of the target system, storing debugging information in the memory of the system, and performing the monitoring program to perform the hardware operation result and debugging information. It provides a debugging method of an embedded system including monitoring the host.

The debugging step is characterized in that the code for debugging support is executed together with the encoding software and stored in the memory of the system.

The wait time of the target system may be from the completion of the interrupt service routine according to the interrupt request until the next interrupt request time.

Therefore, the present invention directly debugs the hardware and software of the system directly on the target system without implementing a separate debugging environment, and satisfies the limitations that the real-time characteristics of the system and the hardware and software must be closely related to each other and at the same time interoperate. By maximizing the resource utilization of the system, it is possible to reduce the cost and ease of use required to implement a debugging environment.

Hereinafter, with reference to the accompanying drawings, preferred embodiments of the present invention that can specifically realize the above object will be described.                     

3 is a diagram illustrating a board configuration and debugging environment of an embedded system according to the present invention, in which a target system exemplifies an MPEG 2 video encoder system.

In the embedded system as shown in FIG. 3, since the target board 100 has a characteristic that the target board 100 is performed without the help of an operating system, an Extended Instruction Set Computer (EISC) processor 200 that plays a pivotal role in the system is provided. By booting the startup code required for the processor and other initialization at boot time, the main program necessary for operating the system is prepared.

At this time, by performing the main program, the PREP (PRE-Processing) unit 300, ME (Motion Estimator) unit 500, and VENC (Video ENCoder) unit 600, which are video encoding hardware, are initialized. You are ready to control each piece of hardware.

The target board 100 is driven by periodically supplying the PREP unit 300 with a video stream to be encoded as an input of a system after performing such initialization. At this time, the PREP unit 300 receives the stream and performs a pre-processing function, and the processing result is data of a form that can be processed by the ME unit 500 or the VENC unit 600. After converting and storing the memory 400, a hardware interrupt is issued to inform the EISC processor 200 that its operation is completed.

As such, the system operating on the target board 100 is called a target system, and the overall operation flow of the MPEG 2 encoder system according to the present invention is illustrated in FIG. 4.

As shown in FIG. 4, a VENC (Video ENCoder) unit or a ME (Motion Estimator) unit in charge of an actual encoding function of a target system is an interrupt service routine (ISR) performed by an interrupt request of a PRE-Processing unit. It is controlled and driven by Interrupt Service Routine. In other words, the data preprocessed by the PREP unit is read from memory, encoding is performed, and as a result, the bit stream, which is the result data, is stored in the memory, and the EISC processor requests a hardware interrupt to inform the completion of its operation. do.

As such, as shown in FIG. 4, the EISC processor, which is given control right through each hardware interrupt request, plays a role necessary for encoding by executing each corresponding interrupt service routine.

The operation of the processor is performed every time control is taken from each piece of hardware, and the EISC processor, which has completed execution of each interrupt service routine, completes the operation of each hardware until the system takes over control from the hardware. It will wait in the System Halt state. Therefore, the EISC processor repeats the operation and the halt state.

According to the present invention, debugging is performed using the time that the EISC processor is in the stopped state, that is, the time when the processor is not running. The following description will be made in detail with reference to FIG. 5. same.

5 is a diagram illustrating a monitoring debugging method according to the present invention.                     

As shown in FIG. 5, in order to perform debugging during the time when the processor is not running, the EISC processor monitors the user through the execution of a monitoring debugger program. That is, the monitoring debugger program is operated to monitor the debugging situation in connection with the terminal program of the host 700 as shown in FIG. 3.

To this end, Runtime Debugging Information during encoding software and hardware is executed by the encoding software along with the encoding software in memory of the system without limiting the real-time characteristics of the system. After saving, this information is taken when executing the monitoring program and provided as debugging information. (A)

In addition, information on the result of each interrupt service routine execution, that is, system data, BSS region information, and other information related to compilation are stored in the memory as execution result information. (B) provide the resulting information.

Therefore, the method according to the present invention does not require a separate debugging environment implementation procedure, and executes a debugging program while the processor does not execute an interrupt service routine, so that the encoding hardware is maintained while maintaining the system's real-time characteristics and other operating conditions. And software can be debugged directly.

In addition, this method can increase the processor utilization of the EISC processor by 100%, maximizing the resource utilization of the target system.                     

On the other hand, the present invention is not limited to the above-described embodiment, and can be modified by those skilled in the art as can be seen from the appended claims and such modifications are within the scope of the present invention. Belongs.

Referring to the effects of the debugging method of the embedded system according to the present invention described above are as follows.

First, there is an effect of directly debugging the hardware and software of the system directly on the target system without implementing a separate debugging environment.

Second, the system meets the real-time characteristics of the system and the constraint that hardware and software are closely related to each other, and maximizes the utilization of the resources of the target system, thereby reducing the cost and ease of implementation required for implementing a debugging environment. It works.

Claims (4)

In the debugging method of the target system with the processor associated with the host through the monitoring program, Performing an operation of each hardware by using the processor according to an interrupt execution request of the internal hardware of the target system, and storing the result in a system memory; Debugging during the waiting time of the target system and storing debugging information in a memory of the system; And monitoring the hardware operation execution result and debugging information to the host by executing the monitoring program. The method of claim 1, And the target system is an MPEG 2 video encoder system. The method of claim 2, The debugging step, the debugging method of the embedded system, characterized in that for executing the code for debugging support with the encoding software and stored in the memory of the system. The method of claim 1, The wait time of the target system is a debugging method of the embedded system, characterized in that from the completion of the interrupt service routine according to the interrupt request to the next interrupt request time.

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