KR20060041045A - Pixel and driving method of light emitting display using the same - Google Patents

Abstract

The present invention relates to a light emitting display device capable of displaying an image of uniform brightness.

According to an exemplary embodiment of the present invention, a light emitting display device supplies a first scan signal to all scan lines during a first period of one frame, and sequentially scans the second scan signal to the scan lines for a second period except the first period. A scan driver for supplying a; A data driver for supplying a predetermined voltage to the data lines during the first period, and supplying a data signal to the data lines during the second period; And an image display unit including pixels arranged to be connected to the scan lines and the data lines.

Description

Pixel and driving method using light emitting display device and the same {Pixel and Driving Method of Light Emitting Display Using the Same}             

1 is a circuit diagram showing a conventional pixel.

FIG. 2 is a waveform diagram illustrating a driving waveform supplied to the pixel illustrated in FIG. 1.

3 is a view showing a light emitting display device according to an embodiment of the present invention;

FIG. 4 is a circuit diagram showing the structure of a pixel shown in FIG. 3 in detail. FIG.

FIG. 5 is a waveform diagram showing a first embodiment of a driving waveform supplied to the pixel shown in FIG. 4; FIG.

FIG. 6 is a waveform diagram showing a second embodiment of a drive waveform supplied to the pixel shown in FIG. 4; FIG.

<Explanation of symbols for the main parts of the drawings>

10,140 pixel 12,142 pixel circuit

110: scan driver 120: data driver

130: image display unit 150: timing control unit

The present invention relates to a pixel, a light emitting display device using the same, and a driving method thereof. More particularly, the present invention relates to a pixel and a light emitting display device using the same, and a method of driving the same.

Recently, various flat panel displays have been developed to reduce weight and volume, which are disadvantages of cathode ray tubes. The flat panel display includes a liquid crystal display, a field emission display, a plasma display panel, a light emitting display, and the like.

Among the flat panel display devices, the light emitting display device is a self-light emitting device that generates light by recombination of electrons and holes. Such a light emitting display device has an advantage in that it has a fast response speed and is driven with low power consumption.

1 is a circuit diagram illustrating a pixel of a conventional light emitting display device.

Referring to FIG. 1, when the scan signal is applied to the scan line Sn, the pixel 10 of the conventional light emitting display generates light corresponding to the data signal supplied to the data line Dm.

As the scan line Sn, a scan signal is sequentially supplied from the first scan line S1 to the nth scan line Sn as shown in FIG. The data signal is supplied to the data lines Dm in synchronization with the scan signal.

Each pixel 10 includes a light emitting element OLED and a pixel circuit 12 connected to the data line Dm and the scan line Sn to emit light of the light emitting element OLED. The anode electrode of the light emitting element OLED is connected to the pixel circuit 12, and the cathode electrode is connected to the second power source VSS. As such, the light emitting device OLED generates light corresponding to a current supplied to the pixel circuit 12.

The pixel circuit 12 includes a second transistor M2 connected between the first power supply VDD and the light emitting device OLED, and a first transistor M1 connected to the data line Dm and the scan line Sn. And a storage capacitor C connected between the gate electrode of the second transistor M2 and the first electrode. Here, the first electrode is selected from any one of the source electrode and the drain electrode. For example, when the first electrode is selected as the source electrode, the second electrode is set as the drain electrode, and when the first electrode is selected as the drain electrode, the second electrode is set as the source electrode.

The gate electrode of the first transistor M1 is connected to the scan line Sn, and the first electrode is connected to the data line Dm. The second electrode of the first transistor M1 is connected to the storage capacitor C. The first transistor M1 is turned on when the scan signal is supplied from the scan line S to supply the data signal supplied from the data line D to the storage capacitor C. At this time, the storage capacitor C is charged with a voltage corresponding to the data signal.

The gate electrode of the second transistor M2 is connected to the storage capacitor C, and the first electrode is connected to the first power source VDD. The second electrode of the second transistor M2 is connected to the anode electrode of the light emitting element OLED. The second transistor M2 controls the amount of current flowing from the second power supply VDD to the light emitting device OLED in response to the voltage value stored in the storage capacitor C. In this case, the light emitting device OLED generates light having luminance corresponding to the amount of current supplied from the second transistor M2.

Here, the current flowing to the light emitting device OLED is determined as in Equation 1.

In Equation 1, I _OLED is a current flowing to the light emitting device OLED, Vgs is a voltage between the gate electrode and the first electrode of the second transistor M2, Vth is the threshold voltage of the second transistor M2, Vdata is the data The voltage of the signal, β represents a constant value.

As described in Equation 1, the current flowing to the light emitting device OLED is affected by the threshold voltage of the second transistor M2. Therefore, when the threshold voltage of the second transistor M2 is set to be the same regardless of the position of the pixel 10, the light emitting display can display an image of uniform luminance. However, the threshold voltage of the second transistor M2 is set slightly differently depending on the position of the pixel 10 due to an error in a process, and thus, a problem in that a uniform luminance cannot be displayed in the light emitting display device occurs. do.

Accordingly, an object of the present invention is to provide a pixel, a light emitting display device using the same, and a driving method thereof capable of displaying an image of uniform luminance.

In order to achieve the above object, the first aspect of the present invention supplies a first scan signal to all scan lines during a first period of one frame, and sequentially supplies the scan lines to the scan lines for a second period except the first period. A scan driver for supplying two scan signals, a data driver for supplying a predetermined voltage to the data lines during the first period, and a data driver for supplying a data signal to the data lines during the second period, the scan lines and the data A light emitting display device including an image display unit including pixels provided to be connected to lines is provided.

Preferably, the width of the first scan signal is set wider than the width of the second scan signal. The scan driver supplies a first emission control signal to emission control lines formed parallel to the scan lines during the first period, and sequentially supplies a second emission control signal to the emission control lines during the second period. The width of the first emission control signal is set wider than the width of the second emission control signal. The predetermined voltage is set to the same voltage value as the first power supply.

According to a second aspect of the present invention, there is provided a light emitting device, a second transistor connected to a data line and an n (n is a natural number) scan line, a first capacitor and a second capacitor connected between a first power source and the second transistor; A first transistor connected between the first node and the first power supply between the first capacitor and the second capacitor, and between the gate electrode and the second electrode of the first transistor, the n-1 scan line A pixel having a third transistor to be controlled and a fourth transistor provided between the third transistor and the second electrode of the first transistor and controlled by an nth scan line is provided.

Preferably, the semiconductor device further includes a fifth transistor connected between the first transistor and the light emitting device and connected to the nth emission control line.

A third aspect of the present invention includes applying a first scan signal to all scan lines during a first period of a frame, and applying a predetermined voltage to all data lines during the first period. Provided is a method of driving a light emitting display device in which a voltage corresponding to a threshold voltage of a transistor included in each of the pixels to control a current supplied to the light emitting device is charged in at least one capacitor included in each of the pixels. .

Preferably, sequentially supplying a second scan signal to the scan lines during a second period of the frame except for the first period, and transmitting a data signal synchronized with the scan signal during the second period. Supplying the same. The width of the first scan signal is set wider than the width of the second scan signal. The predetermined voltage is set to the same voltage value as the first power supply.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to FIGS. 3 to 6 that can be easily implemented by those skilled in the art.

3 illustrates a light emitting display device according to an embodiment of the present invention.

Referring to FIG. 3, a light emitting display device according to an exemplary embodiment of the present invention includes an image display unit 130 including pixels 140 formed at an intersection area of scan lines S1 to Sn and data lines D1 to Dm. And the scan driver 110 for driving the scan lines S1 to Sn, the data driver 120 for driving the data lines D1 to Dm, the scan driver 110 and the data driver 120. A timing controller 150 for controlling is provided.

The scan driver 110 receives the scan driving control signal SCS from the timing controller 150. The scan driver 110 supplied with the scan driving control signal SCS generates the first scan signal and the second scan signal. Here, the first scan signal is simultaneously supplied to all the scan lines S1 to Sn, and the second scan signal is sequentially supplied to the first scan line S1 to the nth scan line Sn. In addition, the scan driver 1100 supplied with the scan driving control signal SCS generates the first emission control signal and the second emission control signal, wherein the first emission control signal is applied to all emission control lines E1 to En. At the same time, the second emission control signal is sequentially supplied to the first emission control line E1 to the nth emission control line En. A detailed operation process of the scan driver 110 will be described later.

The data driver 120 receives the data drive control signal DCS from the timing controller 150. The data driver 120 receiving the data driving control signal DCS generates a data signal and supplies the generated data signal to the data lines D1 to Dm whenever the second scan signal is supplied. The data driver 120 supplies a predetermined voltage to the data lines D1 to Dm when the first scan signal is supplied to the scan lines S1 to Sn. Detailed operation of the data driver 120 will be described later.

The timing controller 150 generates a data drive control signal DCS and a scan drive control signal SCS in response to external synchronization signals. The data driving control signal DCS generated by the timing controller 150 is supplied to the data driver 120, and the scan driving control signal SCS is supplied to the scan driver 110. The timing controller 150 supplies the data Data supplied from the outside to the data driver 120.

The image display unit 130 includes a plurality of pixels 140. Each of the pixels 140 receives a first power source VDD and a second power source VSS from an external source. The pixels 140 supplied with the first power source VDD and the second power source VSS generate light corresponding to the data signal. Here, the emission time of the pixels 140 is controlled by the second emission control signal.

4 is a diagram illustrating a structure of a pixel according to an exemplary embodiment of the present invention. In FIG. 4, the pixel 140 connected to the m-th data line Dm, the n-th scan line Sn-1, and the n-th scan line Sn is illustrated.

Referring to FIG. 4, a pixel 140 according to an exemplary embodiment of the present invention includes a light emitting device OLED, an m-th data line Dm, an n-th scan line Sn-1, and an n-th scan line Sn And a pixel circuit 142 connected to the nth emission control line En to control the light emitting device OLED.

The anode electrode of the light emitting element OLED is connected to the pixel circuit 142, and the cathode electrode is connected to the second power source VSS. The second power source VSS may be a voltage lower than the first power source VDD, for example, a ground voltage. The light emitting device OLED generates light corresponding to a current supplied from the pixel circuit 142.

The pixel circuit 142 includes a first transistor M1 and a fifth transistor M5 connected between the first power supply VDD and the light emitting device OLED, the first transistor M1 and the m-th data line Dm. ) And a third transistor (M3) and a fourth transistor (M4) connected between the second transistor (M2) and the first capacitor (C1) and the first node (N1) and the fifth transistor (M5). And a second capacitor C2 connected between the first electrode and the gate electrode of the first transistor M1.

The first electrode of the second transistor M2 is connected to the mth data line Dm, and the gate electrode is connected to the nth scan line Sn. The second electrode of the second transistor M2 is connected to one side of the first capacitor C1. The second transistor M2 is turned on when the second scan signal is supplied to the nth scan line Sn to supply the data signal supplied to the mth data line Dm to one side of the first capacitor C1. Supply.

The gate electrode of the first transistor M1 is connected to the first node N1, and the first electrode is connected to the first power source VDD. The second electrode of the first transistor M1 is connected to the first electrode of the fifth transistor M5. The first transistor M1 supplies a current corresponding to the voltage stored in the first capacitor C1 and the second capacitor C2 to the fifth transistor M5.

The gate electrode of the third transistor M3 is connected to the n-1 th scan line Sn-1, and the first electrode is connected to the first node N1. The second electrode of the third transistor M3 is connected to the first electrode of the fourth transistor M4. The third transistor M3 is turned on when the first scan signal or the second scan signal is supplied to the n-1 scan line Sn-1.

The gate electrode of the fourth transistor M4 is connected to the nth scan line Sn, and the first electrode is connected to the second electrode of the third transistor M3. The second electrode of the fourth transistor M4 is connected to the first electrode of the fifth transistor M4. The fourth transistor M4 is turned on when the first scan signal or the second scan signal is supplied to the nth scan line Sn. Here, the third transistor M3 and the fourth transistor M4 are connected between the gate electrode and the second electrode of the first transistor M1. Therefore, when the third transistor M3 and the fourth transistor M4 are turned on at the same time, the first transistor M1 is connected in the form of a diode. In addition, since the third transistor M3 and the fourth transistor M4 are controlled by different scan lines Sn-1 and Sn, the first and second transistors M5 leak the first electrode of the fifth transistor M5. Prevents current from flowing Detailed description thereof will be described later.

The gate electrode of the fifth transistor M5 is connected to the nth emission control line En, and the first electrode is connected to the second electrode of the first transistor M1 and the second electrode of the fourth transistor M4. . The second electrode of the fifth transistor M5 is connected to the anode electrode of the light emitting device OLED. The fifth transistor M5 is turned off when the first emission control signal or the second emission control signal is supplied to the nth emission control line En, and remains otherwise turned on.

The first capacitor C1 and the second capacitor C2 charge the voltage corresponding to the threshold voltage and the video signal of the first transistor M1 and supply the charged voltage to the gate electrode of the first transistor M1. .

5 is a waveform diagram illustrating driving waveforms supplied from a scan driver and a data driver.

Referring to FIG. 5, one frame 1F is driven by being divided into a first period and a second period. Here, the first period is a period for compensating the threshold voltage of the first transistor M1 included in each of the pixels 140, and the second period is a period of the desired luminance by supplying a data signal to each of the pixels 140. It is a period for displaying an image.

The scan driver 110 supplies the first scan signal SP1 to all the scan lines S1 to Sn during the first period. The scan driver 110 sequentially supplies the second scan signal SP2 to the first scan line S1 to the nth scan line Sn during the second period. Here, the scan driver 110 makes the width T1 of the first scan signal SP1 wider than the width T2 of the second scan signal SP2 so that the threshold voltage of the first transistor M1 can be sufficiently compensated. Set it.

The scan driver 110 supplies the first emission control signal EMI1 to the emission control lines E1 to En during the first period. Here, when the first emission control signal EMI1 is supplied, the fifth transistor M5 included in each of the pixels 140 is turned off. The scan driver 110 sequentially supplies the second emission control signal EMI2 to the first emission control line E1 to the nth emission control line En during the second period. Here, the width of the first emission control signal EMI1 is set to be wider than the width of the second emission control signal EMI2. That is, the application time of the first emission control signal EMI1 is set to the second emission control signal EMI1. It is set longer than the application time of EMI2).)

During the first period, the data driver 120 supplies the predetermined voltage V1 to all the data lines D1 to Dm so that the threshold voltage of the first transistor M1 can be compensated stably. Here, the predetermined voltage V1 is set higher than the voltage of the highest data signal that can be supplied from the data driver 120. For example, if the voltage range of the data signal supplied from the data driver 120 is 2V to 4V, the predetermined voltage V1 is set higher than the voltage of 4V. For example, the predetermined voltage V1 may be set to the same voltage as the first power source VDD. During the second period, the data driver 120 supplies the data signal DS to the data lines D1 to Dm to be synchronized with the second scan signal SP2.

4 and 5, the operation of the pixel 140 will be described in detail. First, the first scan signal SP1 is supplied to all the scan lines S1 to Sn during the first period, and at the same time, all the emission control lines En ) Is supplied with the first light emission control signal EMI1. The predetermined voltage V1 is supplied to all of the data lines D1 to Dm during the first period. Here, for convenience of explanation, it is assumed that the predetermined voltage V1 is the same voltage as the first power source VDD.

When the first scan signal SP1 is supplied to all the scan lines S1 to Sn, the second transistor M2, the third transistor M3, and the fourth transistor M4 are turned on. When the third transistor M3 and the fourth transistor M4 are turned on, the first transistor M1 is connected in the form of a diode. Therefore, a voltage value obtained by adding the threshold voltages of the first power source VDD and the first transistor M1 is applied to the first node N1. Here, since the second transistor M2 is turned on, a predetermined voltage V1, in this case, the same voltage as the first power source VDD, is applied to one side of the first capacitor C1. Then, the first capacitor C1 is charged with a voltage corresponding to the threshold voltage of the first transistor M1. Similarly, the second capacitor C2 is charged with a voltage corresponding to the voltage applied to the first node N1 and the difference voltage between the first power supply VDD, that is, the voltage corresponding to the threshold voltage of the first transistor M1. do.

On the other hand, the application time T1 of the first scan signal SP1 is set so that a sufficient enough voltage can be charged in the first capacitor C1 and the second capacitor C2. Therefore, in the present invention, the threshold voltage of the first transistor M1 can be compensated for stably during the first period. In other words, in the present invention, when the scan signals are sequentially supplied to the scan lines S1 to Sn, the first period can be sufficiently wide because the threshold voltage is compensated for the first first period without compensating the threshold voltage. Therefore, the threshold voltage of the first transistor M1 can be compensated for in a stable and sufficient time.

The second scan signal SP2 and the second emission control signal EMI2 are sequentially supplied to the scan lines S1 to Sn and the emission control lines E1 to En during the second period. The data signals DS are synchronized with the second scan signal SP2 to the data lines D1 through Dm during the second period.

The third transistor M3 is turned on when the second scan signal SP2 is supplied to the n-1 th scan line Sn-1. At this time, the second transistor M2 and the fourth transistor M4 maintain the turn-off state. Therefore, even when the third transistor M3 is turned on, the leakage current due to the voltage charged in the first capacitor C1 and the second capacitor C2 is not supplied to the fifth transistor M4. That is, since the third transistor M3 and the fourth transistor M4 are turned on at different times during the second period, the leakage current due to the voltage charged in the first capacitor C1 and the second capacitor C2. Can be prevented.

When the second scan signal SP2 is supplied to the nth scan line Sn, the second transistor M2 and the fourth transistor M4 are turned on. When the second transistor M2 is turned on, a voltage corresponding to the data signal DS is charged in the first capacitor C1 and the second capacitor C2. Here, the Vgs of the first transistor M1 is determined by Equation 2 in consideration of the voltage previously charged in the first capacitor C1 and the second capacitor C2.

In Equation 2, Vgs represents a voltage between the gate electrode and the first electrode of the first transistor M1, Vth represents a threshold voltage of the first transistor M1, and Vdata represents a voltage of the data signal. Substituting Vgs obtained in Equation 2 into Equation 1 eliminates the threshold voltage Vth. Accordingly, in the present invention, an image having a uniform image quality may be displayed regardless of the threshold voltage of the first transistor M1.

The first transistor M1 supplies currents corresponding to the first capacitor C1 and the second capacitor C2 to the first electrode of the fifth transistor M5. On the other hand, when the second scan signal SP2 is supplied to the nth scan line Sn, the second emission control signal EMI2 is supplied to the nth emission control line En. When the second emission control signal EMI2 is supplied, the fifth transistor M5 is turned off. Accordingly, when the second scan signal SP2 is supplied to the nth scan line Sn, the fifth transistor M5 is turned off. No current is supplied. Thereafter, the supply of the second emission control signal EMI2 of the nth emission control line En is stopped, and at this time, the fifth transistor M5 is turned off. Then, the current supplied from the first transistor M1 is supplied to the light emitting device OLED so that light having a predetermined brightness is generated in the light emitting device OLED.

Meanwhile, in the present invention, as shown in FIG. 6, the first emission control signal EMI1 is supplied to the emission control lines E1 to En during the first period, and the second emission is emitted to the emission control lines E1 to En during the second period. The control signal EMI2 may not be supplied. In other words, in the present invention, since the threshold voltage of the first transistor M1 is compensated for the first period separately provided, the image can be stably displayed even when the second emission control signal EMI2 is not supplied for the second period. . In this case, since the first to nth emission control lines E1 to En are supplied with the same driving waveform, they may be commonly connected.

The above detailed description and drawings are merely exemplary of the present invention, which are used only for the purpose of illustrating the present invention and are not intended to limit the scope of the present invention as defined in the claims or the claims. Accordingly, those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical protection scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

As described above, according to the pixel, the light emitting display device using the same, and a driving method thereof, the threshold of the first transistor on the first capacitor and the second capacitor included in the pixels during the first period of one frame. The threshold voltage can be compensated by charging a voltage corresponding to the voltage. As such, when the threshold voltage of the first transistor included in each of the pixels is compensated, the light emitting display may display an image of uniform luminance. In the present invention, the threshold voltage of the first transistor can be stably compensated by setting the first period so that the threshold voltage of the first transistor can be sufficiently compensated. In the present invention, the leakage current can be prevented from flowing by providing two transistors connected to different scanning lines between the gate terminal and the second terminal of the first transistor.

Claims (22)

A scan driver for supplying a first scan signal to all scan lines during a first period of one frame, and sequentially supplying a second scan signal to the scan lines for a second period except the first period; A data driver for supplying a predetermined voltage to the data lines during the first period, and supplying a data signal to the data lines during the second period; And an image display unit including pixels arranged to be connected to the scan lines and the data lines. The method of claim 1, The width of the first scan signal is set to be wider than the width of the second scan signal. The method of claim 1, Wherein the scan driver supplies a first emission control signal to emission control lines formed parallel to the scan lines during the first period, and sequentially supplies a second emission control signal to the emission control lines during the second period. Display. The method of claim 1, And the scan driver commonly supplies a light emission control signal to light emission control lines formed parallel to the scan lines during the first period, and does not supply the light emission control signal during other periods. The method of claim 4, wherein A light emitting display device in which the light emission control lines are commonly connected. The method of claim 3, wherein The width of the first light emission control signal is set to be wider than the width of the second light emission control signal. The method of claim 1, And the predetermined voltage is set to a voltage higher than the voltage of the data signal. The method of claim 1, Each of the pixels A light emitting element; A second transistor connected to said data line and an nth (n is a natural number) scan line; A first capacitor and a second capacitor connected in series between the second transistor and a first power source; A first transistor connected between the first node and the first power source between the first capacitor and the second capacitor and supplying a current corresponding to the voltage charged in the first capacitor and the second capacitor to the light emitting device; Wow; A third transistor connected between the first node and the second terminal of the first transistor and controlled by an n-th scan line; And a fourth transistor connected between the third transistor and the second terminal of the first transistor and controlled by the nth scan line. The method of claim 8, And the predetermined voltage is set to the same voltage value as the first power supply. The method of claim 8, And a voltage corresponding to the threshold voltage of the first transistor is charged in the first capacitor and the second capacitor when the first scan signal is supplied. The method of claim 8, And a fifth transistor connected between the first transistor and the light emitting element and connected to the nth emission control line. A light emitting element; A second transistor connected to the data line and the nth (n is a natural number) scan line; A first capacitor and a second capacitor connected between a first power supply and the second transistor; A first transistor connected between the first node and the first power source between the first capacitor and the second capacitor; A third transistor disposed between the gate electrode and the second electrode of the first transistor and controlled by the n-th scan line; And a fourth transistor disposed between the third transistor and the second electrode of the first transistor, the fourth transistor being controlled by an nth scan line. The method of claim 12, And a fifth transistor connected between the first transistor and the light emitting element and connected to the nth emission control line. Applying a first scan signal to all scan lines during a first period of one frame; Applying a predetermined voltage to all data lines during the first period, And a voltage corresponding to a threshold voltage of a transistor included in each of the pixels to control a current supplied to the light emitting device during the first period is charged in at least one capacitor included in each of the pixels. The method of claim 14, Sequentially supplying a second scan signal to the scan lines during a second period of the one frame except the first period; And supplying a data signal synchronized with the scan signal to the data lines during the second period. The method of claim 15, And a width of the first scan signal is greater than a width of the second scan signal. The method of claim 15, And the predetermined voltage is set to a voltage value higher than the voltage of the data signal. The method of claim 15, And the transistor controls the amount of current flowing from the first power supply to the light emitting element in response to a voltage corresponding to the at least one capacitor. The method of claim 18, And the predetermined voltage is set to the same voltage value as the first power supply. The method of claim 14, Applying a first emission control signal to all emission control lines during the first period; And sequentially applying a second emission control signal to the emission control lines during the second period. The method of claim 20, The width of the first light emission control signal is set to be wider than the width of the second light emission control signal. The method of claim 14, And a light emission control signal applied to all the light emission control lines during the first period, and the light emission control signal is not supplied to the light emission control lines during the second period.

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