KR20060037309A - Interlocking bumping structures and chip bonding processes using the same - Google Patents

Abstract

The present invention relates to a bump connection structure for chip mounting, a chip-on-glass mounting method and a flip chip mounting method using the same, and more particularly, high-strength steel bumps and the iron bumps. The lower strength bumps are formed, and during the chip mounting process, the iron bumps are plastically deformed and inserted into the recess bumps. It relates to an uneven connection structure, a chip-on-glass mounting method and a flip chip mounting method using the same.

According to the present invention, the bumps for convex parts are plastically deformed and inserted into the bumps for concave parts to form concave-convex connection structures, thereby improving the mechanical reliability and electrical properties of the chip-on-glass and flip chip-mounted joints. It can be effective.

Uneven connection structure, bumps for recesses, bumps for recesses, chip-on-glass and flip chips.

Description

Uneven connection structure and chip mounting method using the same {Interlocking bumping structures and chip bonding processes using the same}

BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic diagram of chip-on-glass mounting using a concave-convex connection structure according to the present invention.

Fig. 2 is a schematic diagram showing bumps for recesses and bumps for recesses and concave-convex connecting portions formed by connecting these bumps for recesses according to the present invention.

Figure 3 is a schematic diagram of the chip-on-glass mounting using an anisotropic conductive film according to the existing technology.

Figure 4 is a schematic diagram mounting the chip on the glass using a non-conductive adhesive according to the existing technology.

Figure 5 is a scanning electron micrograph showing an embodiment of the bumps for convex and concave bumps for forming the concave-convex connection structure according to the present invention.

Figure 6 is a scanning electron micrograph showing the uneven connection in the chip-on glass mounted specimen using the uneven connection structure according to the present invention.

7 is a connection resistance according to the bonding (bonding) stress measured in the chip-on-glass specimen having the uneven connection structure according to the present invention.

8 is a chip shear load according to the connection stress measured in the chip-on-glass specimen having the uneven connection structure according to the present invention.

Fig. 9 is a schematic diagram showing bumps for convex portions formed on a chip according to the present invention, pads for concave portions formed on a substrate, and concave-convex connection portions formed by connecting them.

Figure 10 is a schematic diagram of the chip-on glass mounted with an anisotropic conductive film by applying the concave-convex connection structure according to the present invention.

* Explanation of Signs of Major Parts of Drawings *

11. Semiconductor chip 12. Glass substrate

13. Bumps for recesses 14. Bumps for recesses

15. Uneven connection

31.Bump bump 32.Board pad

33. Anisotropic conductive film 34. Conductive particles

41.Nonconductive Adhesive

91. Substrate Pads

The present invention is to improve the mechanical reliability and electrical characteristics of the connecting portion when mounting the semiconductor chip formed with metal bumps (chip on glass) or flip chip mounting, as shown in Figures 1 and 2 The present invention relates to a connection structure, a chip on glass mounting method and a flip chip mounting method using the same.

CRT (Cathode Ray Tube), which is a display element used in conventional TV or computer monitor, is not suitable as a large-screen display device because it is bulky and weighty as the screen is enlarged, and it is impossible to use as a portable display due to high power consumption. There is this.

In order to overcome the drawbacks of the CRT, flat display devices such as liquid crystal display (LCD), organic light emitting diode (OLED), and plasma display panel (PDP) They are thinner, lighter in weight, and lower in power consumption than CRTs. They are large-screen display devices such as large screen televisions, notebook computers, and portable information and communication devices such as mobile phones and personal digital assistants (PDAs). Is being used.

The liquid crystal display, the organic light emitting diode, and the plasma display all use a glass substrate as a substrate of a display panel for realizing an image. The liquid crystal display device has a structure in which a liquid crystal is injected between two glass substrates on which a polarizing plate is attached, and an image is realized by controlling an amount of light transmission by changing an intensity of an electric field applied to the liquid crystal. The organic light emitting device has a structure in which an anode electrode, an organic thin film layer, and a cathode electrode are sequentially formed on a glass substrate, and when the electric is applied, the organic thin film layer emits itself and realizes an image. Plasma display panel has a structure that fills the panning gas between the electrode and the two glass substrates on which the phosphor is formed, and then applies a voltage to the electrode to convert the panning gas into plasma gas to generate ultraviolet rays to stimulate the phosphor to produce an image. .

As a method of mounting a semiconductor chip on the flat panel display devices including a liquid crystal display device, a chip-on-glass method has been developed in which a metal bump is formed on a semiconductor chip and the semiconductor chip is directly mounted on a glass substrate of the flat panel display devices. In the chip-on-glass mounting method, the footprint of the semiconductor chip can be minimized, thereby miniaturizing and thinning the system using the flat panel display device, and improving the resolution by increasing the signal transfer speed due to the decrease in the distance between the semiconductor chip and the flat panel display device. This is possible.

As the chip-on-glass method, a method using an anisotropic conductive film (ACF) as shown in FIG. 3 has been mainly used. The chip-on-glass method using an anisotropic conductive film is anisotropic in which polymer particles such as Au (gold), Ag (silver), Ni (nickel), or conductive particles 34 such as plastic particles coated with Au / Ni are coated on a polymer matrix. The conductive film 33 is sandwiched between the metal bumps 31 of the semiconductor chip 11 and the pads 32 of the glass substrate 12 of the flat panel display element and thermo-compressed so that the semiconductor chip 11 is a flat panel including a liquid crystal display element. It is a method of bonding to the glass substrate 12 of a display element.

However, in the chip-on-glass mounting method using the anisotropic conductive film, electrical connection is caused by the mechanical contact of the conductive particles 34 compressed between the chip bumps 31 and the substrate pads 32, so that the connection resistance is large and the chip bumps 31 As the size of a) decreases, the possibility of the occurrence of open and short increases, which is difficult to apply to the connection of the chip 11 having a fine pitch of 50 μm or less.

In order to solve the problem of the chip-on-glass mounting method using the anisotropic conductive film, a chip-on-glass mounting method using a non-conductive adhesive (NCA) has been developed. In the chip-on-glass mounting using the non-conductive adhesive, as shown in FIG. 4, after injecting the non-conductive adhesive 41 between the chip bump 31 and the substrate pad 32, the chip bump 31 is applied by applying an appropriate temperature and stress. ) Is directly connected to the substrate pad 32.

In the chip-on-glass mounting method using the anisotropic conductive film, in contrast to the electrical contact caused by the mechanical contact of the conductive particles 34 compressed between the chip bump 31 and the substrate pad 32, in the chip-on-glass mounting method using the non-conductive adhesive. Since the electrical connection is made through the contact surface of the chip bump 31 and the substrate pad 32 itself, the connection resistance can be further lowered and the process is low cost, and the chip can be connected even at a fine pitch of 50 μm or less.

In the chip-on-glass connection method using the non-conductive adhesive, mechanical reliability and electrical characteristics of the connection surface between the chip bump 31 and the substrate pad 32 are applied to form the connection between the chip bump 31 and the substrate pad 32. It depends on the connection stress. When the connection stress is low, since the mechanical connection is not properly made at the interface between the chip bump 31 and the substrate pad 32, not only the connection resistance increases but also the interface separation easily occurs, thereby greatly reducing the reliability. Therefore, in order to improve the resistance and mechanical properties of the interface between the chip bump 31 and the substrate pad 32, an increase in the connection stress is required. However, when the connection stress is increased, the shape change due to plastic deformation of the chip bumps 31 is severely generated. Therefore, the connection stress that can be applied is limited and it is difficult to improve the connection characteristics of the chip-on-glass mounting.

In the conventional chip-on-glass mounting technique using the non-conductive adhesive, since the interface formed between the chip bump 31 and the substrate pad 32 is vulnerable to shear stress, the semiconductor chip 11 and the glass substrate 12 Due to the shear stress due to the thermal expansion coefficient of the crack propagation at the interface easily progressed there was a problem that the mechanical reliability is lowered.

Therefore, in the chip-on-glass mounting method using the non-conductive adhesive or the chip-on-glass mounting method using the anisotropic conductive film, a new connection structure capable of improving the mechanical reliability of the bump connection part and lowering the connection resistance was required.

DISCLOSURE OF THE INVENTION An object of the present invention is to solve the above-mentioned problems of the prior art, and the bumps 14 for recesses in the chip connection process, such as a chip-on-glass process or a flip chip process, are used for the recesses for the recesses. 13) The present invention provides a chip-on-glass mounting method and a flip-chip mounting method using the recessed and projected connection structure, which is inserted into the recessed and recessed connection structure 15 to improve the mechanical reliability and electrical properties of the connection.

In the concave-convex connection structure according to the present invention, as shown in Figs. 1 and 2, the convex bumps 14 are smaller in size than the concave bumps 13, so that the convex bumps are formed during the chip connection process. The bouillon bumps 14 plastically deform the recesses bumps 13 and are inserted into them to form the uneven connections. At this time, in order to be able to be inserted into the recessed bumps 13 while maintaining the shape, the yield bumps 14 have a higher yield strength than the materials of the recessed bumps 13. Higher metals should be used to form bumps 14 for convexities.

In the chip connection process using the concave-convex connection structure according to the present invention, since the cross-sectional area of the bumps for convexities 14 is smaller than the cross-sectional area of the bumps for concave portions 13, the chip bumps in the conventional chip-on-glass process The connection by forming the uneven connection structure can be made even at low connection stress where plastic deformation of (31) may not occur. At this time, since the plastic bumps 13 connected to the bumps for iron parts 13 are severely deformed so that the bumps 14 for local parts are inserted locally. The pressure welding between the convex bumps 14 and the concave bumps 13 is sufficiently performed, whereby the connection resistance of the connection portion can be improved.

In addition, when the bumps 14 for the iron parts are inserted into the bumps 13 for the recesses, the bumps for the iron parts having higher yield strength than the bumps 13 for the recesses ( Since 14) serves as a support, it is possible to minimize the shape change of the bumps 13 for the main part during the connection process, and it is possible to greatly improve the mechanical reliability of the connection part.

In a chip-on-glass package in which a semiconductor chip mainly composed of Si (silicon) is mounted on a glass substrate of a flat panel display device such as a liquid crystal display device, the chip bump and the substrate pad interface are formed at the interface between the chip bump and the substrate pad due to the difference in thermal expansion coefficient between the semiconductor chip and the glass substrate. Interfacial fracture occurs due to the shear stress applied. However, in the concave-convex connection structure in which the bumps 14 for convex parts are inserted into the bumps 13 for concave parts according to the present invention, the crack propagation at the interface between the chip bumps and the substrate pad is used for convex parts. Since it is stopped by the bump 14, the mechanical reliability of a connection part can be improved significantly.

This invention will be described by the following examples. However, these do not limit the rights of the present invention.

As an example of the concave-convex connection structure according to the present invention, bumps 14 for convex parts are formed on the glass substrate 12 by using Cu (copper), and Sn (conductor) is formed on the semiconductor chip 11 made of Si. Tin) was used to form bumps 13 for recesses. The yield strength of Cu is 68.9 MPa, which is more than 5 times higher than the yield strength of Sn (tin), which is 5 times or more, so that the Cu bumps 14 maintain the shape during the chip connection process. It is possible to plastically deform the bump 13 for Sn recesses and to be inserted therein.

FIG. 5 is a scanning electron micrograph showing an example of bumps for convex and concave bumps for forming the concave-convex connection structure according to the present invention.

In order to manufacture the board | substrate 12 in which the bump 14 for Cu iron parts is formed, 0.1 micrometer Ti as a contact bonding layer on the glass substrate 12 was sputter-deposited by DC magnetron sputtering method, Sputter-deposited Cu of 2 micrometers thickness was deposited on the wiring layer for bump connection resistance measurement on it. A photoresist pattern having a thickness of 5 μm, 10 μm and a diameter of 5, 10, or 15 μm was formed on the glass substrate 12 having the Ti / Cu layer. Cu was electroplated to a thickness of 5 탆 and 10 탆 at a current density of 4 mA / cm ² , thereby forming a Cu iron bump 14. It is also possible to use such a Cu convex bump 14 for a chip connection process without further processing, and to improve the connection characteristic with the Sn (tin) concave bump 13 It is also possible to use an electroplated Sn layer having a thickness of 0.5 μm at a current density of 5 mA / cm ² on the Cu iron bumps 14.

In order to fabricate the chip 11 specimen having the Sn (tin) bumps 13 formed thereon, after the sputter deposition of 0.1 µm Ti and 2 µm thick Cu on a Si wafer, 25 x 25 µm A photoresist pattern of size was formed to a thickness of 20 μm. In this photoresist pattern, an electroplating was performed at a current density of 5 mA / cm ² to form a Sn recessed bump 13 having a thickness of 15 µm. Such Sn recessed bumps 13 can be used in a chip connection process without further processing, and Ag 0.1 μm thick Ag is used as a surface oxidation prevention film on the Sn recessed bumps 13. It is also possible to use electroplated at a current density of 3 mA / cm ² .

A non-conductive adhesive 41 is applied to the glass substrate 12 on which the Cu iron bumps 14 are formed, and the chip 11 on which the Sn recess bumps 13 are formed. ) Was aligned with the glass substrate 12 and then maintained at 150 ° C. for 180 seconds to mount the chip on glass. At this time, the connection stress was changed in the range of 19 MPa to 107 MPa in order to measure the connection resistance of the uneven connection according to the connection stress.

After the chip-on-glass mounted specimen was polished using the concave-convex connection structure of the present invention, the shape of the concave-convex connection part 15 was observed using a scanning electron microscope, which is shown in FIG. 6. As shown in FIG. 6, for the Cu (copper) iron parts bumps 14 formed on the glass substrate 12, the Sn (tin) recesses formed on the Si (silicon) semiconductor 11. It is observed that the bumps 13 are locally plastically deformed and inserted to form the uneven connection structure as shown in the schematic diagrams of FIGS. 1 and 2.

Cu bumps 14 for diameter 10 占 퐉 and 10 占 퐉 height, which is one of the present embodiments, were connected to bumps for Sn (tin) recesses having a size of 25 x 25 占 퐉 and a height of 15 占 퐉. The change of the connection resistance according to the test connection stress is shown in FIG. 7. As the connection stress increased, the connection resistance decreased, indicating 16.5 mΩ at the connection stress of 44.4 MPa. When the connection stress increased to 44.4 MPa or more, the decrease in the connection resistance decreased, but the connection resistance decreased slightly as the connection stress increased. The decrease in the connection resistance with the increase of the connection stress is effective as the plastic deformation increases at the site of the bump 13 for Sn recesses subjected to the compressive stress by the Cu iron bumps 14. This is due to the increase in area.

The connection resistance of the concave-convex connection part according to the present invention shown in FIG. 7 is based on the connection resistance of several hundred mΩ reported in the chip-on-glass process using the anisotropic conductive film 33 of the prior art or the chip-on-glass process using the nonconductive adhesive 41. In comparison with the above-mentioned excellent value, it is possible to greatly reduce the connection resistance by performing the connection process using the uneven connection structure according to the present invention.

An advantage obtained in the connection process using the uneven connection structure according to the present invention is that the mechanical reliability can be greatly improved along with the reduction of the connection resistance. In the structure in which the bumps for iron parts 14 are inserted in the bumps 13 for recesses according to the present invention, the cracks generated at the interface between the chip bumps and the substrate pads are bumps for the iron parts. Since it is stopped by 14 and can no longer propagate, the mechanical reliability of the connecting portion can be greatly improved.

In order to evaluate the mechanical reliability of the concave-convex connection part according to the present invention, the Si (silicon) semiconductor chip 11 specimen in which the Sn concave bump 13 is formed is used for the Cu convex bump 14 After bonding the chip on glass to the glass substrate (12) is formed, a chip shear test is performed using a ball shear tester (ball shear tester) to measure the load required for shear separation of the chip 11 from the substrate 12 It was.

8 shows the chip shear load value according to the connection stress when the Cu bumps 14 are connected to the Sn bumps 13. At this time, the size of the Sn recessed bumps 13 was 25 μm and the height was 15 μm. The height of the Cu iron bumps 14 was 10 μm, and the diameters were 5 μm and 15 μm, respectively. And 25 μm.

In the case where the diameter of the Cu bumps in Fig. 8 is 25 占 퐉, the connection stress is achieved when the bumps for the concave parts of the same length do not act as the bumps for the convex parts 14 and form a flat joint. Irrespective of the interface separation of the planar interface, the chip shear load was very low.

On the other hand, the Cu bumps have a diameter of 5 µm and 15 µm, which are smaller than those of the Sn recess bumps 13 to act as bumps 14 for iron parts to form an uneven connection structure. It can be seen that the load is greatly increased, thereby greatly improving the mechanical reliability of the joint. In FIG. 8, when the Cu bumps 14 having diameters of 5 μm and 15 μm were used, the chip shear load increased as the connection stress increased, which increased as the connection stress increased. This is because the bumps 14 are deeply inserted into the Sn recesses bumps 13.

In the present embodiment, Cu (copper) bumps were used as the bumps for iron parts, and Sn (tin) bumps having a lower yield strength than Cu were used as the bumps for the recesses (13). . In the present invention, when the bumps for iron parts 14 are formed using a metal having a higher yield strength than the material of the recessed bumps 13, the bumps for iron parts 14 are formed. It is possible to be inserted into the bumps 13 for recesses, maintaining the shape.

Therefore, in the present invention, a Sn alloy mainly comprising Cu (used) bump or Sn having lower yield strength than Cu as Cu (13) for iron parts and Cu (13) for main parts. It is also possible to use bumps.

In the present invention, Ni (nickel), which has higher yield strength than Cu (copper), Au (gold), and Sn (tin), is also used as the bump for iron parts 14, and the yield strength is lower than that of Ni bumps. It is also possible to use Cu bumps or Au bumps or Sn bumps or Sn alloy bumps as the bumps for recesses 13.

In the present invention, Au (gold), which has a higher yield strength than Sn (tin), is also used as the bump for iron parts 14, and a Sn or Sn alloy having a lower yield strength is used for the main part bumps. It is also possible to use it as (13).

In this embodiment, the copper bumps 14 for Cu and the bumps 13 for Sn recesses were formed using an electroplating method. In addition, in the present invention, Ni (nickel), Cu (copper), Au (gold), Sn (tin) for use as bumps for iron parts 14 or bumps for recesses (13). Alternatively, Sn alloy bumps may be formed using any one or two or more of sputtering, vacuum deposition, electron beam deposition, chemical vapor deposition, and electroless plating.

In this embodiment, bumps 14 for convex parts are formed on the substrate 12, and bumps 13 for concave parts are formed on the semiconductor chip 11. In addition, according to the present invention, the bumps for iron parts 14 having high yield strength are formed on the semiconductor chip 11, and the bumps 13 for lower parts with low yield strength are formed on the substrate 12. It is also possible to form the uneven connecting portion 15.

In the present invention, as shown in FIG. 9, a bump 14 for iron parts having a high yield strength is formed on the semiconductor chip 11, and a recess part having a low yield strength for the substrate 12 is used. It is also possible to form the substrate pad 81 thin so as to form the uneven connection portion 15 during the mounting process.

In this embodiment, Ti / Cu sequentially sputter-deposited Ti and Cu as an under bump metallurgy (UBM) for forming the bumps 14 for convex parts and the bumps 13 for concave parts. However, in addition to the use of various UBM, such as Ni, Ni (P), Cu, Ti / Cu / Ni (V), Cr / Cu, Cr / Cu / Au, Ti / Cu / Au, etc., the present invention Uneven connection structure and chip mounting method using the same are not limited by the type and structure of the UBM.

In the present embodiment, when the bumps for Cu convex portions 14 are inserted into the Sn concave bumps 13 to form the concave-convex connection portions 15, the bumps for Cu convex portions ( 14) was simply used or a Sn coating layer was formed on the Cu iron bumps 14 in order to improve the connection characteristics with the Sn recess bumps 13. The Sn recessed bumps 13 were also used in the chip connection process or Ag layers were formed on the Sn recessed bumps 13 as a surface oxidation prevention film.

Thus, in the present invention, Ni (nickel), Cu (copper), Au (gold), Sn (tin) for use as bumps for iron parts 14 or bumps for recesses (13). Or Sn (tin), Sn alloys, Ag (silver), Au (gold), Ni (nickel), Cu () to improve the connection characteristics on the surface of Sn alloy bumps, to activate the interfacial reaction, to prevent surface oxidation, or to prevent diffusion. It is also possible to form and use a surface coating layer using copper). The surface coating layer of the convex bump 14 or the concave bump 13 may be any one or two of an electroplating method, a sputtering method, a vacuum deposition method, an electron beam deposition method, a chemical vapor deposition method, and an electroless plating method. It is possible to form using the process method which consisted of the above.

When the concave-convex connection structure according to the present invention is applied to the chip-on-glass connection process using the anisotropic conductive film described above, as shown in FIG. 10, the bumps for convex parts 14 are bumps for concave parts. 13) or the recessed part pad 91 is inserted into the pad 91, and since the propagation of the interfacial crack is suppressed by the bumps 14 for the convex portions, the mechanical reliability of the connecting portion can be greatly improved. In addition, an increase in the connection stress applied between the convex bumps 14 and the concave bumps 13 or the concave pads 91 increases the stress in the anisotropic conductive film 33. Since the conductive particles 34 are sufficiently compressed to increase the connection area, the electrical characteristics of the connection portion can be improved.

A non-conductive film (NCF) is a film of a polymer adhesive of a non-conductive adhesive in the form of a film, and an anisotropic conductive adhesive (ACA) is a polymer film of an anisotropic conductive film. The concave-convex connection structure according to the present invention is applicable to the chip-on-glass process using the non-conductive adhesive and the chip-on-glass process using the anisotropic conductive film as well as the chip-on-glass process using the non-conductive film and the chip-on-glass process using the anisotropic conductive adhesive.

The flip chip process of forming a metal bump on a semiconductor chip and connecting it to a pad of a polymer circuit board or a flexible substrate using an anisotropic conductive film or a non-conductive adhesive is performed in comparison with a chip-on-glass process using an anisotropic conductive film. This process is the same process as the chip-on-glass method using metal bumps of semiconductor chips. Therefore, the concave-convex connection structure according to the present invention can be applied to a mounting method of flip chip bonding a semiconductor chip to a circuit board or a flexible substrate using an anisotropic conductive film, and a semiconductor chip can be formed using a non-conductive adhesive. The present invention can also be applied to a mounting method of flip chip bonding to a flexible substrate. In addition, the concave-convex connection structure according to the present invention is applicable to a flip chip mounting method in which an underfill is injected between the semiconductor chip and the substrate after the flip chip bonding of the semiconductor chip to the circuit board or the flexible substrate.

In this embodiment, a cylindrical shape was used as the shape of the bumps for Cu convex parts, and a square column shape was used as the shape of the bumps 13 for the concave parts of Sn. However, the shape of the convex bumps 14 and the concave bumps 13 of the present invention is not limited thereto, and various shapes such as cylinders, square columns, ladder columns, and dome shapes are not limited thereto. The use of shapes is possible.

As described above, in the chip mounting process such as the chip-on-glass process or the flip chip process, the bumps 14 for concave parts 13 are used for the concave parts 13 or recesses according to the present invention. ) It is effective to improve the mechanical reliability and electrical properties of the connecting portion by plastically deforming the pad 81 to be inserted to form the uneven connection structure 15.

Claims (11)

In bump connection parts in which a semiconductor chip is mounted on a glass substrate of a liquid crystal display device, an organic light emitting device, or a plasma display, or a flip chip is mounted on a circuit board or a flexible substrate, bumps for recesses are made of metal having low strength or For the recess during the chip mounting process, a pad for recesses is formed, and a bump for iron parts is formed of a metal having a higher strength than the bumps for recesses or the pad for recesses. Concave-convex connection structure and method for manufacturing the concave-convex bump, wherein the bump for convex part is inserted into a bump or concave pad. The method of claim 1, wherein bumps for recesses or pads for recesses are formed on a semiconductor chip, and bumps for recesses are formed on a liquid crystal display device, an organic light emitting device, a glass substrate of a plasma display, An uneven connection structure and a method of manufacturing the same, which are formed on a circuit board or a flexible board. The method of claim 1, wherein the bumps for recesses or pads for recesses are formed on a liquid crystal display, an organic light emitting element, a glass substrate of a plasma display, a circuit board, or a flexible substrate, and used for iron parts. An uneven connection structure and a method of manufacturing the same, wherein bumps are formed on a semiconductor chip. The method of claim 1, wherein one of Ni (nickel), Cu (copper), Au (gold), Sn (tin) or Sn alloy is selected to form bumps for iron parts, and Ni (nickel) and Cu For bumps or recesses, one of the copper, Au (gold), Sn (tin), or Sn alloys is selected from metals of lower strength than the metals used for the iron bumps. An uneven | corrugated connection structure formed by forming a pad, and its manufacturing method. Ni (nickel), Cu (copper), Au (gold), Sn as described in Claims 1 and 4 as pads for convex bumps, concave bumps or concave parts. (Tin) or the Sn alloy is formed using an electroplating method, sputtering method, vacuum deposition method, electron beam evaporation method, chemical vapor deposition method, electroless plating method using any one or two or more methods comprising the uneven connection structure and its manufacturing method . According to claim 1 and claim 4, Sn (tin), Sn alloy, Ag (silver) as a surface coating layer on the bumps for convex parts, bumps for concave parts or pads for concave parts; The Au (gold), Ni (nickel) and Cu (copper) layers are formed by using any one or two or more methods of electroplating, sputtering, vacuum deposition, electron beam deposition, chemical vapor deposition, and electroless plating. Uneven connection structure and its manufacturing method. According to claim 1 and claim 4, Sn (tin) alloy for forming the bumps for recesses or pads for recesses is mainly composed of Sn, Bi (bismuth), Cu (copper), Ag The uneven connection structure and its manufacturing method characterized by containing any one or two or more selected from (silver), In (indium), and Pb (lead). A chip-on-glass mounting method comprising bonding a semiconductor chip to a liquid crystal display, an organic light-emitting device, or a glass substrate of a plasma display using the uneven connection structure of claim 1. The chip-on-glass mounting method according to claim 1 or 8, wherein a non-conductive adhesive or anisotropic conductive film or a non-conductive film or anisotropic conductive adhesive is used for bonding the chip-on glass of the uneven connection structure. Flip chip bonding a semiconductor chip to a circuit board or a flexible board using the uneven | corrugated connection structure of Claim 1, The flip chip mounting method characterized by the above-mentioned. The non-conductive adhesive or anisotropic conductive film or a non-conductive film or anisotropic conductive adhesive is used for bonding the chip-on-glass of the uneven connection structure, or the underfill is injected between the semiconductor chip and the substrate after the flip chip bonding. Flip chip mounting method characterized in that.

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