KR20060029725A - Test fixture for application test and semiconductor device application tester having thereof - Google Patents

Abstract

The present invention provides a test fixture for a mounting test, comprising: a plurality of reference electronic devices equipped with a socket interface for inserting and ejecting a semiconductor device to be tested, and a CPU connected to each of the plurality of reference electronic devices; A plurality of main boards for performing a mounting test, an interface unit integrating and providing input / output interfaces of the plurality of main boards, and a control unit connected to each of the plurality of main boards and controlling an operation of the test fixture. It relates to test fixtures for implementation tests.

According to the present invention, a semiconductor device used in an electronic device such as a buffer memory used in a hard disk drive, which has been difficult to perform a conventional mounting test, can be tested in a mounting environment.

Test fixtures, sockets, buffer memory, reference electronics

Description

TEST FIXTURE FOR APPLICATION TEST AND SEMICONDUCTOR DEVICE APPLICATION TESTER HAVING THEREOF}

1 is a block diagram of a test fixture for mounting test in accordance with one embodiment of the present invention.

2 is a block diagram of a test fixture for mounting test in accordance with another embodiment of the present invention.

3 is a view showing the appearance of a test fixture for mounting test according to an embodiment of the present invention.

4 is a configuration diagram of a semiconductor device mounting tester including a test fixture for mounting testing according to the present invention.

<Description of Symbols for Main Parts of Drawings>

100: test fixture 110: reference electronics

130: motherboard 150: interface unit

170: control unit 190: power supply unit

200: external analysis device 300: stacker device

350: tray transfer apparatus 500: test fixture

The present invention relates to a test fixture for a mounting test and a semiconductor device mounting tester including the same. More particularly, to test a semiconductor device used in an electronic device, such as a buffer memory used in a hard disk drive, in a mounting environment. The present invention relates to a test fixture for an in-mount test and a semiconductor device mounting tester including the same.

In order to test a conventional semiconductor device, it is determined whether a semiconductor device is good or bad by analyzing a signal output from the semiconductor device after applying a specific signal pattern to the semiconductor device using an automatic test equipment (ATE).

However, such a test device such as ATE is expensive, which increases the cost of testing each semiconductor device, and thus reduces the price competitiveness. Also, the test is performed in a separate experimental environment, not in the environment in which the semiconductor device is actually installed and used. As a result, the accuracy of the test is reduced due to failure to implement characteristics of various noises in an actual use environment, which makes it difficult to accurately determine whether it is good or bad.

In order to improve such a problem, mounting tests for actually attaching a semiconductor device to an electronic device and performing a test in an actual use environment of the semiconductor device, that is, a mounting environment, are increasingly adopted. For example, in the case of testing the DRAM devices used in the PC, the DRAM module is actually inserted into the PC main board and the test program according to the actual environment is driven to determine that the drive is successful and the drive is abnormal. It is judged that the ground is bad.

An example of a mounting test apparatus for use in such a PC is disclosed in, for example, patent application No. 10-2002-0004428 filed "Semiconductor Memory Test Device" filed on January 25, 2002 by Silicon Tech.

The technology disclosed in No. 10-2002-0004428 is a semiconductor tester structure for testing a DRAM module used in a main board of a PC, in which a module PC is inserted into a module socket provided on a main board in a PC. A test socket is mounted at a location of each device of the module PCB, and each of the memory devices to be tested is loaded into the test socket to test the memory devices in a mounting environment.

However, most of the devices that perform the conventional mounting test perform a test of a DRAM module inserted into a PC main board, and test a memory included in an actual electronic device, for example, when testing a buffer memory used in a hard disk drive. The test structure is not developed.

As the test demand for the memory included in various electronic devices as well as the memory module inside the PC is increasing, the mounting test of semiconductor devices such as the buffer memory included in other electronic devices is similar to the mounting test of the DRAM module for the PC. There is a growing need for ways to do this.

 Disclosure of Invention An object of the present invention is a test fixture for mounting test for testing a semiconductor device used in an electronic device such as a buffer memory used in a hard disk drive, which has been difficult to perform a conventional mounting test in a mounting environment, and a semiconductor device mounting including the same. To provide a tester.

In order to achieve the above technical problem, the present invention is a test fixture for a mounting test, a plurality of reference electronics equipped with a socket interface for inserting and ejecting the semiconductor device to be tested, and is connected to each of the plurality of reference electronics A plurality of main boards including a CPU to perform a mounting test, an interface unit integrating and providing input / output interfaces of each of the plurality of main boards, and connected to each of the plurality of main boards to control the operation of the test fixture. A test fixture for an implementation test including a control unit is provided.

In a test fixture for a mounting test according to the present invention, the socket interface includes a socket including a plurality of pins respectively contacting a plurality of pins of a semiconductor device to be tested, a plurality of socket contact ends and a plurality of connection block contact ends. And a plurality of socket contact ends respectively contacting the plurality of pins, and the plurality of connection block contact ends are respectively connected to the plurality of socket contact ends through an internal wiring. Preferably, the plurality of pogo pins are in contact with the block contact end, and the plurality of pogo pins each include a connection block which is in contact with the contact means of the reference electronic device on which the mounting test is to be performed.

In addition, in a test fixture for mounting test according to the present invention, the reference electronic device is a hard disk drive, the test fixture comprises four hard disk drives, the semiconductor device to be tested is used for the hard disk drive It is preferable that it is a buffer memory.

In addition, in the test fixture for the mounting test according to the present invention, the interface unit, each of the plurality of input and output interfaces including a keyboard input and output, monitor input, power input for each of the plurality of motherboards corresponding to one interface board It is desirable to simplify the internal connection wiring by implementing the connection to the input / output interface.

In addition, in the test fixture for mounting test according to the present invention, the control unit preferably comprises a communication interface for connection with an external analysis device.

The present invention also provides a test fixture for mounting test, comprising: a plurality of reference electronic devices equipped with a socket interface for inserting and discharging a semiconductor element to be tested, and connected to each of the plurality of reference electronic devices, respectively; And a control unit configured to control a test operation of the control unit, and to receive and analyze a test signal from each of the reference electronic devices, and a plurality of reference electronic devices and a power supply unit to supply power to the control unit. do.

In the test fixture for mounting test according to the present invention, the control unit preferably includes a communication interface for connection with an external analysis device.

The present invention provides a stacker for accommodating process trays, a process tray for accommodating a semiconductor device to be tested, a process tray for accommodating a semiconductor device judged as good, and a process tray for accommodating a semiconductor device determined to be defective. A stacker device for loading and empty process trays, a tray transfer device for moving the process tray, a set plate for loading the device to be tested, and a set plate for unloading the device to be tested. And a set plate apparatus for moving the process tray moved by the tray transfer apparatus to a pickup position, and a semiconductor to be tested in a process tray in a set plate for loading the device to be tested. For loading and transferring devices and for unloading the tested semiconductor devices. A picker robot for transferring to a set plate and one or more test fixtures for testing and testing a semiconductor device carried by the picker robot and being transported by the picker robot, the apparatus comprising: 1 to 7 Provided is a semiconductor device mounting tester comprising one or more test fixtures described in any of claims, and a control unit for controlling each device.

In the semiconductor device mounting tester according to the present invention, when a failure occurs in a part of the one or more test fixtures during the test, the controller stops the operation of the test fixture and removes the test fixture so that internal defects are eliminated. If you replace the part and insert the test fixture again, it is desirable to detect the insertion with the built-in sensor and resume the operation of the test fixture again.

Hereinafter, a test fixture for a mounting test of the present invention and a semiconductor device mounting tester including the same will be described in more detail with reference to the accompanying drawings.

1 is a block diagram of a test fixture for a mounting test according to an embodiment of the present invention.

As shown, the test fixture 100 for a mounting test according to an embodiment of the present invention, a plurality of reference electronic devices (110a to 110n), a plurality of main boards (130a to 130n), the interface unit 150 ) And a control unit 170.

The plurality of reference electronics 110a to 110n are equipped with a socket interface for inserting and discharging a semiconductor device to be tested therein and are the same reference electronics.

The reference electronic device 110 may be, for example, a hard disk drive connected to the main board 130 to remove a case and remove a device corresponding to a semiconductor device to be tested among internal circuits, and may be a semiconductor to be tested. The device may be a buffer memory mounted in the hard disk drive. In addition, the reference electronic device 110 may be a variety of devices, such as a CD drive, a DVD drive, a graphics board connected to the main board 130 to operate.

The socket interface is mounted on a portion of the reference electronic device 110 from which the device corresponding to the semiconductor device to be tested is removed to perform the test of the semiconductor device.

The socket interface can be used, for example, by inserting a conventional burn-in socket. In addition, a new socket interface may be used to solve problems such as durability and poor contact of the conventional burn-in socket.

The new socket interface comprises a socket comprising a plurality of pins each contacting a plurality of pins of a semiconductor device to be tested, a plurality of socket contacts and a plurality of connection block contacts, the plurality of socket contacts being the plurality of pins And a plurality of connection block contact ends respectively connected to the test interface board and the plurality of pogo pins contacting the plurality of connection block contact ends. And the plurality of pogo pins each comprising a connection block which contacts the contact means of the reference electronic device on which the mounting test is to be performed.

Details of this new socket interface are disclosed in detail in the patent application entitled "Socket Interface for Semiconductor Device Mounting Test," another patent application filed by the same applicant as the present application, and the "test for mounting semiconductor devices." The contents of the "Socket Interface for" patent application are incorporated herein by reference.

A plurality of main boards 130a to 130n are connected to the plurality of reference electronic devices 110a to 110n, respectively, and each of the main boards 130 includes a CPU therein to perform a mounting test.

That is, when the reference electronic device is a hard disk drive, the operation of the hard disk drive under the control of a CPU determines whether the semiconductor device inserted into the socket interface mounted on the hard disk drive is good or bad. .

The interface unit 150 integrates and provides an input / output interface of each of the plurality of main boards 130a to 130n.

For example, the plurality of main boards 130a to 130n each include a plurality of input / output interfaces including a keyboard input / output, a monitor input, a power input, and the like. Internal wiring will be very complicated if multiple I / O interfaces are configured and connected separately. Therefore, if the integrated interface of each of the plurality of main boards 130a to 130n is provided in the form of one interface board, the internal wiring can be simplified and the volume of the test fixture device can be reduced.

The controller 170 is connected to each of the plurality of main boards 130a to 130n and controls the operation of the test fixture 100 as a whole. Although not shown, the controller 170 may include a communication interface for connecting to the external analyzer 200. The test fixture 100 is a basic structure for performing a mounting test, and in order to perform an actual test, a tester including a device for loading a semiconductor device is required. The controller 170 controls the overall operation of the test fixture 100 through connection with the tester.

2 is a block diagram of a test fixture for mounting test according to another embodiment of the present invention. As illustrated, the test fixture 100 ′ for a test for mounting according to another embodiment of the present invention includes a plurality of reference electronic devices 110 ′ a through 110 ′ n, a controller 170 ′, and a power supply unit 190. ).

The plurality of reference electronics 110'a to 110'n are equipped with a socket interface for inserting and discharging a semiconductor device to be tested therein and are the same reference electronics.

The reference electronic device 110 ′ may be, for example, a mobile communication terminal such as a mobile phone, and a device that removes a case and removes a device corresponding to a semiconductor device to be tested from an internal circuit. It may be a memory. A socket interface may be mounted on a portion of the reference electronic device 110 ′ in which a device corresponding to the semiconductor device to be tested is removed to test the semiconductor device. Since the description of the socket interface is the same as the test fixture 100 ′ for the mounting test according to the embodiment of the present invention, a detailed description thereof will be omitted. The difference between the reference electronic device 110 ′ according to another embodiment of the present invention and the reference electronic device 110 according to an embodiment of the present invention is that the reference electronic device 110 according to the embodiment of the present invention is a PC. It is an electronic device mounted on a main board and operated under the control of a PC, and the reference electronic device 110 ′ according to another embodiment of the present invention is not limited thereto.

The controller 170 ′ is connected to each of the plurality of reference electronic devices 110 ′ a to 110 ′ n and controls the operation of the test fixture 100 ′ as a whole. Although not shown, the controller 170 ′ may also include a communication interface for connecting to the external analyzer 200. The test fixture 100 ′ is a basic structure for performing a mounting test, and a tester including a device for loading a semiconductor device is required to perform an actual test. The controller 170 ′ controls the overall operation of the test fixture 100 ′ through connection with the tester.

The power supply unit 190 supplies power to the plurality of reference electronic devices 110 ′ a through 110 ′ n and the controller 170 ′.

3 is a view showing the appearance of a test fixture for the mounting test according to an embodiment of the present invention.

As shown, the case is housed in a case, and the socket interfaces 115a to 115d are respectively disposed on the four reference electronic devices 110a to 110d to insert and discharge the semiconductor devices to be tested, and the interface unit 150 is illustrated. As such, it includes an interface for input and output to each motherboard.

4 is a configuration diagram of a semiconductor device mounting tester including a test fixture for a mounting test according to the present invention.

As illustrated, the semiconductor device mounting tester includes a stacker device 300a to 300d, a tray transfer device 350, a picker robot 450, and a test fixture 500a to 500m. Although not shown, it includes a set plate device and a control unit for controlling each device.

The stacker devices 300a to 300d accommodate process trays, and are composed of four stackers as shown in FIG. 3.

That is, a stacker 300a for stacking a process tray for accommodating a semiconductor device to be tested, a stacker 300b for stacking an empty process tray, and a stacker for stacking a process tray for storing a semiconductor device judged to be good. 300c and the stacker 300d which mounts the process tray which accommodates the semiconductor element judged to be defective.

The stacker device 300 may be loaded or unloaded a process tray manually or automatically.

The tray transfer device 350 moves the trays for each process. That is, it serves to transfer the process tray in the stacker device 300 to the set plate device.

The set plate apparatus performs the up / down movement and position fixing up to a position where the picker robot 450 can pick up the process tray.

The picker robot 450 transfers the semiconductor device in the process tray seated on the set plate apparatus to the burn-in socket in the test fixture 500. In this case, the picker robot 450 includes a picker head therein, so that the picker robot 450 can absorb and move the semiconductor device.

Test fixtures 500a to 500m test the semiconductor devices transferred by the picker robot 450 and the tested semiconductor devices are transferred by the picker robot, and test a plurality of semiconductor devices at the same time including a plurality of test fixtures. To do this.

Although the present invention has been described by way of example only, it is for the purpose of illustrating the invention only, and the protection scope of the present invention is not limited by these examples, the protection scope of the present invention is defined by the description of the claims Lose.

As described above, according to the present invention, a semiconductor device used in an electronic device such as a buffer memory used in a hard disk drive, which has been difficult to perform a conventional mounting test, may be tested in a mounting environment.

Claims (9)

As a test fixture for implementation tests, A plurality of reference electronics equipped with socket interfaces for inserting and ejecting semiconductor devices to be tested; A plurality of main boards connected to each of the plurality of reference electronic devices and including a CPU to perform a mounting test; An interface unit for integrating and providing input / output interfaces of each of the plurality of mainboards; A control unit connected to each of the plurality of main boards and controlling an operation of the test fixture Test fixtures for mounting test including. The method of claim 1, wherein the socket interface, A socket comprising a plurality of pins each of which contacts a plurality of pins of the semiconductor device to be tested, And a plurality of socket contact ends and a plurality of connection block contact ends, wherein the plurality of socket contact ends contact the plurality of pins, respectively, and the plurality of connection block contact ends are respectively connected to the plurality of socket contact ends through an internal wiring. Test interface board, A connection block comprising a plurality of pogo pins contacting the plurality of connection block contacts, wherein the plurality of pogo pins are respectively in contact with the contact means of the reference electronic device on which the mounting test is to be performed. The test fixture for mounting test that includes. The test of claim 1, wherein the reference electronics is a hard disk drive, the test fixture comprises four hard disk drives, and the semiconductor device to be tested is a buffer memory used in the hard disk drive. Test fixtures. The method of claim 1, wherein the interface unit, A plurality of input / output interfaces including keyboard input / output, monitor input, power input, etc. for each of the plurality of mainboards can be connected to corresponding input / output interfaces of one interface board, thereby simplifying internal wiring wiring. Fixture for in-place test. The method of claim 1, wherein the control unit, A test fixture for mounting test comprising a communication interface for connection to an external analyzer. As a test fixture for implementation tests, A plurality of reference electronics equipped with socket interfaces for inserting and ejecting semiconductor devices to be tested; A control unit connected to each of the plurality of reference electronic devices and controlling a test operation of each of the plurality of reference electronic devices, and receiving and analyzing a test signal from each of the reference electronic devices; A power supply unit supplying power to the plurality of reference electronic devices and the control unit Test fixtures for mounting test including. The method of claim 6, wherein the control unit, A test fixture for mounting test comprising a communication interface for connection to an external analyzer. As a stacker for storing process trays, a process tray for storing a semiconductor element to be tested, a process tray for accommodating a semiconductor element judged good, and a process tray for accommodating a semiconductor element judged defective and an empty tray A stacker device for loading a tray for each process, A tray transfer device for moving the process tray, A set plate device comprising a set plate for loading the device to be tested and a set plate for unloading the device to be tested and for moving the process tray moved by the tray transfer device to a pickup position Wow, A picker robot which loads and transfers the semiconductor device to be tested in the process tray in the set plate for loading the device to be tested and transfers the tested semiconductor device to the set plate for unloading the tested device; The semiconductor device tested by the picker robot and the tested semiconductor device are at least one test fixture to be transferred by the picker robot, the at least one test fixture according to any one of claims 1 to 7, Control unit for controlling each device Semiconductor device mounting tester comprising a. The method of claim 8, wherein the control unit, If some of the one or more test fixtures fail during the test, stop the operation of the test fixtures, take out the test fixtures, replace the defective parts inside, and insert the test fixtures again. A semiconductor device mounting tester that detects an insertion and resumes operation of that test fixture.

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