KR20060028540A - Liquid crystal divice - Google Patents

Abstract

The liquid crystal display according to the exemplary embodiment of the present invention is connected to a first insulating substrate, a gate line and a data line insulated and intersected on the first insulating substrate, a thin film transistor connected to the gate line and the data line, and a thin film transistor. A thin film transistor array panel including a pixel electrode, a second insulating substrate facing the thin film transistor array panel, a color filter formed on the second insulating substrate, an opposing display panel including a common electrode formed on the color filter, and a thin film transistor It is formed at a position corresponding to the thin film transistor on the liquid crystal, thin film transistor display panel or the opposite display panel filled between the display panel and the opposite display panel to maintain a constant distance between the two display panels, at least two for each of the thin film transistors It is formed as above.

Thin Film Transistor Board, Column Spacer

Description

Liquid crystal display {LIQUID CRYSTAL DIVICE}

1 is a layout view of a liquid crystal display according to an exemplary embodiment of the present invention.

FIG. 2 is a circuit diagram of the thin film transistor array panel of FIG. 1.

3 is a layout view of one pixel of the liquid crystal display according to the exemplary embodiment of the present invention;

4 is a layout view of a thin film transistor array panel constituting the liquid crystal display of FIG. 3.

FIG. 5 is a layout view of an opposing display panel forming the liquid crystal display of FIG. 3;

FIG. 6 is a cross-sectional view taken along line VI-VI′-VI ″ of FIG. 3;

7 is a layout view of a thin film transistor array panel for a liquid crystal display according to another exemplary embodiment of the present invention.

FIG. 8 is a cross-sectional view taken along the line VIII-VIII′-VIII ″ of FIG. 7.

※ Code explanation about main part of drawing ※

110, 210: insulated substrate 121: gate line

151: semiconductor layer 171: data line

190 pixel electrode 220 black matrix

230R, 230G, 230B: Color filter 270: Common electrode                 

320: column spacer

The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device including a column spacer.

The liquid crystal display injects a liquid crystal material between the upper panel and the lower panel and applies an electric field to the liquid crystal to change the orientation of the liquid crystal to induce a change in the polarization state of light passing therethrough and to pass light through the polarizer according to the polarization state. The device displays an image by varying the amount of.

The cell gap must be maintained between the upper panel and the lower panel. An active spacer is used for this purpose. As the active spacers, bead spacers and column spacers are used. Among these, the bead-shaped spacer is advantageous in terms of simplicity of process and ease of manufacture, but is floating in the liquid crystal display device to move together with the liquid crystal when the liquid crystal is injected. In this case, when the moving pressure and the moving distance are large, the alignment layer and the like may be bent, and thus light loss occurs.

In contrast, since the column spacer is formed by photolithography, the column spacer may be selected and formed in a fixed shape at a required position. For this reason, column spacers are currently used rather than beads.                         

Such column spacers are formed to have a constant density in the liquid crystal display. When the liquid crystal display becomes large, the column spacers increase in size or the number of formation of the column spacers increases, so that the column spacers have a constant density in the liquid crystal display. Have it.

In this case, the column spacer is disposed in an opaque region in consideration of the aperture ratio of the pixel. When the column spacer is disposed in the region corresponding to the signal line, the column spacer is limited in size, and therefore, the column spacer is preferably disposed in the portion corresponding to the thin film transistor.

Meanwhile, as the size of the liquid crystal display increases, the size of the spacer is increased or the number of column spacers is increased in consideration of the density of the column spacer in the liquid crystal display. At this time, when arranged in different color filters to increase the number of column spacers, the cell spacing becomes uneven according to the step of the color filter, and the problem of adjusting the height of the column spacer appears to correct the step difference. .

In addition, if the size of the column spacer increases indefinitely, there is almost no deformation of the column spacer, and thus it is very difficult to control the cell gap.

The present invention provides a liquid crystal display having a column spacer capable of maintaining a uniform cell gap without reducing the density of the column spacer required in the liquid crystal display.

A liquid crystal display according to an exemplary embodiment of the present invention for achieving the above object is a thin film transistor connected to a first insulating substrate, a gate line and a data line insulated and intersected on the first insulating substrate, and a gate line and a data line. And a thin film transistor array panel including a pixel electrode connected to the thin film transistor, a color filter formed on the second insulating substrate and facing the thin film transistor array panel, and a common electrode formed on the color filter. It is formed at a position corresponding to the thin film transistor on the opposing display panel, the thin film transistor display panel and the opposing display panel including a thin film transistor display panel or the opposing display panel to maintain a constant distance between the two display panels, each At least two with respect to the thin film transistor It is formed.

The thin film transistor may include a semiconductor layer formed on the first insulating substrate, a source and a drain electrode overlapping portions of the semiconductor layer and spaced apart from each other, and the drain electrode may have branched branches on both sides such as? Do.

At this time, it is preferable that the branched branches extend to portions corresponding to the column spacers, respectively.

And it is preferable that the source electrode surrounds the branch of the said drain electrode.

In addition, the color filter preferably includes red, green, and blue color filters, and the column spacer is formed on the red and green color filters.

In addition, the semiconductor layer may have the same planar pattern as the source, drain, and data lines except for a predetermined region between the source and drain electrodes.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like parts are designated by like reference numerals throughout the specification. When a part of a layer, layer, area, plate, etc. is over another part, this includes not only the part directly above the other part but also another part in the middle. On the contrary, when a part is just above another part, it means that there is no other part in the middle.

A thin film transistor array panel according to an exemplary embodiment of the present invention will now be described in detail with reference to the accompanying drawings.

1 is a layout view of a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 2 is a circuit diagram of the thin film transistor array panel of FIG. 1.

As shown in FIGS. 1 and 2, the thin film transistor array panel 100 and the opposing display panel 200 are formed to face each other. Liquid crystals (not shown) are filled between them, and the filled liquid crystals are sealed by the sealing material 310.

A black matrix 220 having an opening is formed in the opposing display panel 200, and a column spacer 320 is formed in a portion corresponding to the thin film transistor of the thin film transistor array panel 100. The column spacer 320 maintains a constant distance between the thin film transistor array panel 100 and the color filter panel 200. Two column spacers 320 are formed in pairs in one thin film transistor TFT. The column spacer 320 is formed to have a constant density in the liquid crystal display, and in the exemplary embodiment of the present invention, the column spacer 320 is disposed on the pixel in which the green and red color filters are formed.

As in the exemplary embodiment of the present invention, when two column spacers are disposed, the column spacers may be formed to have a smaller diameter than when they are formed as one, so that when the upper and lower display panels 100 and 200 are compressed, Easy to adjust height That is, as the liquid crystal display becomes larger, the column spacer 320 must be formed to have a larger diameter in order to uniformly support the gap between the two display panels 100 and 200. However, the large diameter column spacer has almost no elasticity, so the height of the column spacing 320 is hardly changed in the crimping process of attaching the two display panels 100 and 200. Difficult to adjust.

In order to solve this problem, in the exemplary embodiment of the present invention, since each size is formed by dividing the size into two, each column spacer has a flexible elasticity, and thus the height of the column spacer 320 is easily deformed during compression so that the display panel is easily formed. Can absorb the step.

For example, even when the column spacers are disposed in the stepped color filters 230R, 230G, and 230B, the steps of the color filters are absorbed by the deformation of the column spacer 320, and thus the two display panels 100 and 200 are uniform cells. You can maintain the interval.                     

In the thin film transistor array panel 100 illustrated in FIG. 2, a plurality of gate lines 121 and data lines 171 that are insulated and intersect are formed. The thin film transistor TFT is connected to the gate line 121 and the data line 171, and is formed in each of the pixel areas P defined by the gate line 121 and the data line 171. Each pixel area P corresponds to an opening of the opposing display panel 100.

The plurality of pixel areas PR form a display area P for collectively displaying an image of the liquid crystal display. One end of the gate line 121 and the data line 171 extends to the peripheral area beyond the display area D in order to receive an external signal. The remaining portion of the liquid crystal display except for the display area D is called a peripheral area.

Hereinafter, one pixel of the liquid crystal display illustrated in FIGS. 1 and 2 will be described in detail with reference to FIGS. 3 to 6.

3 is a layout view of one pixel of a liquid crystal display according to an exemplary embodiment of the present invention, FIG. 4 is a layout view of a thin film transistor array panel constituting the liquid crystal display of FIG. 3, and FIG. 5 is a liquid crystal display of FIG. 3. 6 is a layout view of an opposing display panel, and FIG. 6 is a cross-sectional view taken along the line VI-VI′-VI ″ of FIG. 3.

3 to 6, the thin film transistor array panel 100 is made of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO), and has cutouts 191, 192, and 193. The pixel electrode 190 is formed, and each pixel electrode 190 is connected to a thin film transistor to receive an image signal voltage. In this case, the thin film transistor is connected to the gate line 121 for transmitting the scan signal and the data line 171 for transferring the image signal, respectively, to turn on and off the pixel electrode 190 according to the scan signal. do. A lower polarizer (not shown) is attached to the bottom surface of the thin film transistor array panel 100. Here, the pixel electrode 190 may not be made of a transparent material in the case of a reflective liquid crystal display, and in this case, the lower polarizer is also unnecessary.

It is also made of a transparent insulating material such as glass, and the opposite display panel 200 facing the thin film transistor array panel 100 includes a black matrix 220 and a color filter of red, green, and blue to prevent light leakage from the edge of the pixel. The common electrode 270 formed of the transparent conductive material such as 230 and ITO or IZO is formed. The black matrix 220 may be formed not only in the peripheral portion of the pixel region but also in the portion overlapping the cutouts 271, 272, and 273 of the common electrode 270. This is to prevent light leakage caused by the cutouts 271, 272, and 273.

The thin film transistor array panel 100 will be described in more detail. In the thin film transistor array panel 100, a plurality of gate lines 121 may be formed on the lower insulating substrate 110 to transmit a gate signal. The gate line 121 mainly extends in the horizontal direction, and a portion or a protruding portion of each gate line 121 is used as a gate electrode 124 of the thin film transistor. At this time, the two columns are extended to a wide width corresponding to the spacer 320.

The gate line 121 may have a contact portion for transmitting a gate signal from the outside to the gate line 121, but otherwise, an end portion of the gate line 121 may be directly formed on the substrate 110. Connected to the output of the gate drive circuit.

The storage electrode line 131 is formed on the insulating substrate 110 in the same layer as the gate line 121. Each storage electrode line extends in parallel with the gate line 121 at the edge of the pixel area, and includes a plurality of storage electrodes 133 extending from the storage electrode line 131. The storage electrode 133 extends in the vertical direction. The storage electrode 133 may be deformed into various shapes as needed, and for example, may be formed to overlap the cutouts 191 and 193 of the pixel electrode 190.

The gate line 121 and the storage electrode lines 131 and 133 include a conductive film made of an aluminum-based metal such as aluminum (Al) or an aluminum alloy. In addition to the conductive film, other materials, particularly indium tin oxide (ITO) or IZO, may be used. chromium (Cr), titanium (Ti), tantalum (Ta), molybdenum (Mo) and their alloys (eg, molybdenum-tungsten (MoW) alloys) with good physical, chemical and electrical contact with indium zinc oxide It may have a multi-layer film structure including another conductive film made of. An example of the combination of the lower layer and the upper layer is chromium / aluminum-neodymium (AlNd) alloy. In the case of the double film, the aluminum-based conductive film is preferably positioned below the other conductive film, and in the case of the triple film, the aluminum-based conductive film is preferably positioned as the intermediate layer.

Side surfaces of the gate lines 121 and 124 and the storage electrode lines 131 and 133 are inclined to increase adhesion to the upper layer. A gate insulating layer 140 made of silicon oxide (SiO 2), silicon nitride (SiNx), or the like is formed on the gate lines 121 and 124 and the storage electrode lines 131 and 133.                     

A plurality of linear semiconductor layers 151 made of hydrogenated amorphous silicon (a-Si) or the like are formed on the gate insulating layer 140. The linear semiconductor layer 151 extends mainly in the vertical direction, from which a plurality of extensions 154 extend toward the gate electrode 124. Further, the linear semiconductor layer 151 increases in width near the point where the linear semiconductor layer 151 meets the gate line 121 to cover a large area of the gate line 121.

On the semiconductor layer 151, a plurality of linear and island ohmic contacts 161 and 165 made of a material such as N + hydrogenated amorphous silicon doped with silicide or n-type impurities at a high concentration are formed. have. The linear ohmic contact 161 has a plurality of protrusions 163, and the protrusion 163 and the island-type ohmic contact 165 are paired and positioned on the protrusion 154 of the semiconductor layer 151. Side surfaces of the semiconductor layer 151 and the ohmic contacts 161 and 165 are also inclined, and the inclination angle is 30 to 80 ° with respect to the substrate 110.

A plurality of data lines 171 and a plurality of drain electrodes 175 are formed on the ohmic contacts 161 and 165 and the gate insulating layer 140, respectively. The data line 171 mainly extends in the vertical direction to cross the gate line 121 and transmit a data voltage. A plurality of branches extending from the data line 171 toward the drain electrode 175 forms a source electrode 173. The pair of source electrode 173 and the drain electrode 175 are separated from each other and are positioned on the protrusion 154 of the semiconductor layer 151.                     

At this time, the drain electrode 175 forms a branched shape on both sides, like the letter s, and the split portions extend to portions corresponding to the column spacers 320, respectively. The source electrode 173 surrounds the cracked portion of the drain electrode 175 while being maintained at regular intervals.

The gate electrode 124, the source electrode 173, and the drain electrode 175 form a thin film transistor (TFT) together with the protrusion 154 of the semiconductor layer 151, and the channel of the thin film transistor The protrusion 154 is formed between the source electrode 173 and the drain electrode 175.

In addition, a leg metal piece 172 overlapping the gate line 121 is formed on the gate insulating layer 140.

Like the gate line 121, the data line 171, the drain electrode 175, and the leg metal piece 172 may be formed of a conductive film such as aluminum (Al) or an aluminum alloy such as an aluminum alloy. In addition, chromium (Cr), titanium (Ti), tantalum (Ta), molybdenum (Mo) and their materials have good physical, chemical and electrical contact properties with other materials, especially indium tin oxide (ITO) or indium zinc oxide (IZO). It may have a multilayer film structure including another conductive film made of an alloy (eg, molybdenum-tungsten (MoW) alloy). An example of such a structure is a chromium / aluminum-neodymium (AlNd) alloy. In the case of the double film, the aluminum-based conductive film is preferably positioned below the other conductive film, and in the case of the triple film, the aluminum-based conductive film is preferably positioned as the intermediate layer.

Similarly to the gate line 121, the data line 171 and the drain electrode 175 are formed to be inclined with respect to the substrate 110.

The ohmic contacts 161 and 165 exist only between the lower semiconductor layer 151 and the upper data line 171 and the drain electrode 175 and lower the contact resistance. The linear semiconductor layer 151 has an exposed portion between the source electrode 173 and the drain electrode 175, and is not covered by the data line 171 and the drain electrode 175, and in most places, the linear semiconductor layer ( Although the width of the 151 is smaller than the width of the data line 171, as described above, the width of the 151 is increased at the portion where the gate line 121 meets, thereby increasing the insulation between the gate line 121 and the data line 171.

On the data line 171, the drain electrode 175, the leg metal piece 172, and the exposed portion of the semiconductor 151, an organic material having excellent planarization characteristics and photosensitivity, plasma enhanced chemical vapor deposition (plasma enhanced chemical) A passivation layer 180 made of a low dielectric constant insulating material such as a-Si: C: O, a-Si: O: F, or silicon nitride, which is an inorganic material, is formed by vapor deposition (PECVD). have.

The passivation layer 180 includes a plurality of contact holes 185 and 182 exposing at least a portion of the drain electrode 175 and one end portion of the data line 171, respectively. On the other hand, when the end portion of the gate line 121 also has a contact portion for connecting to an external driving circuit, a plurality of contact holes penetrate the gate insulating layer 140 and the passivation layer 180 to end portions of the gate line 121. Can be exposed.

On the passivation layer 180, a plurality of contact auxiliary members 82 and a sustain wiring connection bridge 194 are formed, as well as a plurality of pixel electrodes 190 having cutouts 191, 192, and 193. The pixel electrode 190, the contact auxiliary member 82, and the sustain wiring connection bridge 194 are formed of a transparent conductive film such as indium tin oxide (ITO) or indium zinc oxide (IZO).

The pixel electrode 190 has a plurality of cutouts 191, 192, and 193, and the cutouts 191, 192, and 193 are horizontal cutouts that are formed in a horizontal direction at positions halfway up and down the pixel electrodes 190. Diagonal cutouts 191 and 193 are formed in diagonal directions in upper and lower portions of the pixel electrode 190 divided into the portion 192. The cutout 192 penetrates from the right side to the left side of the pixel electrode 190, and the inlet is broadly symmetrically extended. Accordingly, the pixel electrode 190 is substantially mirror-symmetrical with respect to a line (a line parallel to the gate line) that bisects the pixel region defined by the intersection of the gate line 121 and the data line 171, respectively.

At this time, the upper and lower oblique cuts 191 and 193 are perpendicular to each other, in order to evenly distribute the direction of the fringe field in four directions. The edge of the pixel electrode 190 overlaps the storage electrodes 133 and 133, and the boundary of the pixel electrode 190 is located outside the boundary of the storage electrodes 133 and 133, but may not be.

In addition, a storage wiring connecting bridge 194 is formed on the same layer as the pixel electrode 190 to connect the storage electrode 133 and the storage electrode line 131 of the pixels adjacent to each other across the gate line 121. The storage wiring connection leg 194 is in contact with the storage electrode 133 and the storage electrode line 131 through the contact holes 183 and 184 formed over the passivation layer 180 and the gate insulating layer 140. The sustain wiring connection leg 194 overlaps the leg metal pieces 172, and these may be electrically connected to each other. The maintenance wiring connection bridge 194 electrically connects the entire maintenance wiring on the lower substrate 110. This holding wiring can be used to repair the defects of the gate line 121 or the data line 171, if necessary, and the leg metal piece 172 is held with the gate line 121 when irradiating a laser for such repair. It is formed to assist the electrical connection of the wiring connection bridge (194).

In addition, the contact auxiliary member 82 is selected as necessary to complement and protect the adhesion between the end of the data line 171 and an external device such as a driving integrated circuit through the contact hole 182.

On the pixel electrode 190, a rubbing alignment layer 11 is formed to align the liquid crystal in a predetermined direction.

In the opposite display panel 200 facing the thin film transistor array panel 100, a black matrix 220 is formed on the upper insulating substrate 210 to prevent light leakage from the pixel edge. The black matrix 220 formed on the opposing display panel 200 is formed not only at each pixel edge but also at the edge of the display area including a plurality of pixels.

Red, green, and blue color filters 230R, 230G, and 230B are formed on the black matrix 220. A planarization film 250 is formed over the color filters 230R, 230G, and 230B, and a common electrode 270 having cutouts 271, 272, and 273 is formed thereon. The common electrode 270 is formed of a transparent conductor such as ITO or IZO.

The common electrode 270 also has a plurality of cutouts 271, 272, and 273, and the cutouts 271, 272, and 273 are gate lines (eg, cutouts 191, 192, and 193 of the pixel electrode 190). It includes an oblique portion and an end portion overlapping the sides of the pixel electrode 190 which are alternately arranged in parallel with the diagonal portions 191 and 193 forming 45 ° with respect to 121. At this time, the end is classified into a longitudinal end part and a horizontal end part.

A column spacer 320 corresponding to the thin film transistor of the thin film transistor array panel 100, that is, the source electrode 173, the drain electrode 175, and the protrusion 154 of the semiconductor layer 15 is formed on the common electrode 270. They are formed in pairs of two. In addition, the column spacer 320 is formed in a pixel in which the red and green color filters 230R and 230G are formed.

An alignment layer 21 is formed on the opposing display panel 200 including the column spacer 320.

When the thin film transistor substrate and the opposing display panel having the above structure are aligned and combined, and a liquid crystal material is injected and vertically aligned therebetween, a basic structure of the liquid crystal display according to the present invention is provided.

When the thin film transistor array panel 100 and the opposing display panel 200 are aligned, the cutouts 191, 192, and 193 of the pixel electrode 190 and the cutouts 271, 272, and 273 of the reference electrode 270 are formed in the pixel area. Split into multiple domains. These domains are classified into four types according to the average long axis direction of the liquid crystal molecules located therein.                     

In the above description, the embodiment of the present invention is applied to a manufacturing method for forming a semiconductor layer and a data line by a photolithography process using different masks. However, the manufacturing method according to the present invention uses a semiconductor layer and data to minimize manufacturing costs. The line may be formed by a photolithography process using one photoresist pattern to have a planar pattern different from that of the thin film transistor array panel of FIGS. 3 to 6. This will be described in detail with reference to the drawings.

FIG. 7 is a layout view of a thin film transistor array panel for a liquid crystal display according to another exemplary embodiment. FIG. 8 is a cross-sectional view taken along the line VIII-VIII′-VIII ″ of FIG. 7.

As shown in Figs. 7 and 8, the layer structure of the thin film transistor array panel for liquid crystal display device according to the present embodiment is generally the same as the layer structure of the thin film transistor array panel for liquid crystal display devices shown in Figs. That is, the plurality of linear semiconductors including the plurality of gate lines 121 including the plurality of gate electrodes 124 is formed on the substrate 110, and the gate insulating layer 140 and the plurality of protrusions 154 thereon. A layer 151, a plurality of linear ohmic contact layers 161 each including a plurality of protrusions 163, and a plurality of island-type ohmic contact layers 165 are sequentially formed. On the ohmic contacts 161 and 165 and the gate insulating layer 140, a plurality of data lines 171 including a plurality of source electrodes 153, a plurality of drain electrodes 175, and a plurality of conductive capacitors 177. ) Is formed and a passivation layer 180 is formed thereon. A plurality of contact holes 182 and 185 are formed in the passivation layer 180 and / or the gate insulating layer 140, and a plurality of pixel electrodes 190 and a plurality of contact assistants 82 are formed on the passivation layer 180. It is.                     

In addition, the data line 171 has a contact portion at the end portion 179 for connecting with the driving circuit, and the end portion 129 of the gate line 121, which is a contact portion, is connected to the gate insulating layer 140 and the passivation layer 180. It is exposed through the contact hole 181 formed, and the end portion of the data line 171 is exposed through the contact hole 182 formed in the passivation layer 180. Each contact hole 182 is connected to the contact auxiliary member 82 formed on the passivation layer 180.

However, unlike the thin film transistor array panel illustrated in FIGS. 3 to 6, the thin film transistor array panel according to the present exemplary embodiment may have a data line 171 and a drain electrode except for the protrusion 154 in which the semiconductor layer 151 is located. 175 and the resistive contact members 161 and 165 below. Specifically, the linear semiconductor layer 151 may include the source electrode 173 and the drain electrode (aside from the data line 171 and the drain electrode 175 and the portions below the ohmic contacts 161 and 165 below). 175) has exposed portions between them.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

As described above, when arranging the column spacer in one position as in the present invention, at least two or more columns may be easily adjusted to easily absorb the step difference of the display panel, thereby uniformly adjusting the cell gap.

Therefore, the cell gap of the liquid crystal display device is maintained uniformly, and the column spacer density in the liquid crystal display device is properly maintained to provide a high quality liquid crystal display device.

Claims (6)

A thin film transistor array panel including a first insulating substrate, a gate line and a data line insulated from and intersecting on the first insulating substrate, a thin film transistor connected to the gate line and the data line, and a pixel electrode connected to the thin film transistor; An opposing display panel facing the thin film transistor array panel and including a second insulating substrate, a color filter formed on the second insulating substrate, and a common electrode formed on the color filter; A liquid crystal filled between the thin film transistor array panel and the opposite display panel; And a plurality of liquid crystal display devices formed at positions corresponding to the thin film transistors on the thin film transistor array panel or the opposing display panel to maintain a constant distance between the two display panels, and formed at least two for each of the thin film transistors. In claim 1, The thin film transistor may include a semiconductor layer formed on the first insulating substrate; A portion overlapping the semiconductor layer and formed to be separated from each other; The drain electrode has a branch split on both sides, such as s. In claim 2, And the branched branches each extending to a portion corresponding to the column spacer. In claim 2, And the source electrode surrounds a branch of the drain electrode. In claim 1, The color filter includes a color filter of red, green, blue, The column spacer is formed on the red and green color filters. In claim 2, The semiconductor layer has the same planar pattern as the source, drain, and data lines except for a predetermined region between the source and drain electrodes.

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