KR20060022763A - Semiconductor package improving a thermal spreading performance - Google Patents

Semiconductor package improving a thermal spreading performance Download PDF

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KR20060022763A
KR20060022763A KR1020040071122A KR20040071122A KR20060022763A KR 20060022763 A KR20060022763 A KR 20060022763A KR 1020040071122 A KR1020040071122 A KR 1020040071122A KR 20040071122 A KR20040071122 A KR 20040071122A KR 20060022763 A KR20060022763 A KR 20060022763A
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semiconductor package
heat dissipation
notch
dissipation characteristics
improved heat
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KR1020040071122A
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Korean (ko)
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KR100640585B1 (en
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김평완
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삼성전자주식회사
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367—Cooling facilitated by shape of device
    • H01L23/3675—Cooling facilitated by shape of device characterised by the shape of the housing
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
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    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
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    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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  • Engineering & Computer Science (AREA)
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Abstract

반도체 패키지의 열방출 특성을 봉지수지의 형상을 통해 개선한 반도체 패키지에 관해 개시한다. 이를 위해 본 발명은 반도체 패키지에서 봉지수지의 표면에 전체 표면적을 늘릴 수 있는 노치(notch) 형상을 형성한다. 이에 따라 반도체 패키지 표면에서 열이 발산될 수 있는 면적이 늘어나 반도체 패키지의 열방출 특성을 개선할 수 있다.A semiconductor package having improved heat dissipation characteristics of a semiconductor package through the shape of an encapsulating resin is disclosed. To this end, the present invention forms a notch shape that can increase the total surface area on the surface of the encapsulation resin in the semiconductor package. As a result, an area where heat can be dissipated on the surface of the semiconductor package is increased, thereby improving heat dissipation characteristics of the semiconductor package.

반도체 패키지, 봉지수지, 열방출 특성, 노치(notch).Semiconductor package, encapsulation resin, heat dissipation characteristics, notch.

Description

열방출 특성을 개선한 반도체 패키지{Semiconductor package improving a thermal spreading performance}Semiconductor package improving a thermal spreading performance

도 1 내지 도 4는 종래 기술에 따른 반도체 패키지를 설명하기 위한 단면도들이다.1 to 4 are cross-sectional views illustrating a semiconductor package according to the related art.

도 5 내지 도 8은 본 발명에 의한 열방출 특성을 개선한 반도체 패키지를 설명하기 위해 도시한 단면도들이다.5 to 8 are cross-sectional views illustrating a semiconductor package having improved heat dissipation characteristics according to the present invention.

도 9 및 도 10은 본 발명에 의한 열방출 특성을 개선한 반도체 패키지의 봉지수지에 형성된 노치(notch)의 형성방법을 설명하기 위해 도시한 단면도들이다.9 and 10 are cross-sectional views illustrating a method of forming a notch formed in an encapsulation resin of a semiconductor package having improved heat dissipation characteristics according to the present invention.

도 11은 본 발명에 의한 열방출 특성을 개선한 반도체 패키지에서 노치(notch)의 형태를 설명하기 위한 단면 형상이다.11 is a cross-sectional view for explaining the shape of a notch in a semiconductor package having improved heat dissipation characteristics according to the present invention.

도 12 내지 도 15는 본 발명에 의한 열방출 특성을 개선한 반도체 패키지의 변형예를 설명하기 위해 도시한 단면도들이다. 12 to 15 are cross-sectional views illustrating a modified example of a semiconductor package having improved heat dissipation characteristics according to the present invention.

* 도면의 주요부분에 대한 부호의 설명 *Explanation of symbols on the main parts of the drawings

100: LOC형 반도체 패키지, 110: 기본 프레임,100: LOC type semiconductor package, 110: basic frame,

120: 반도체 칩, 130: 연결수단,120: semiconductor chip, 130: connection means,

140: 봉지수지, 142: 노치(notch),140: bag resin, 142: notch,

144: 열전도수단, 160: 외부연결단자.144: heat conduction means, 160: external connection terminal.

본 발명은 반도체 패키지에 관한 것으로, 더욱 상세하게는 봉지수지와 관련되어 열방출 특성을 개선하는 반도체 패키지 및 그 제조방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor package, and more particularly, to a semiconductor package and a method for manufacturing the same, which improve heat dissipation characteristics in connection with an encapsulating resin.

반도체 소자는 먼저 반도체 칩의 형태로 가공된 후, 조립 공정(packaging process)을 걸치면서 에폭시 몰드 컴파운드(EMC: Epoxy Mold Compound, 이하 'EMC')와 같은 봉지수지에 반도체 칩이 쌓여짐으로써, 외부의 충격으로부터 반도체 칩이 보호를 받게 된다.The semiconductor device is first processed in the form of a semiconductor chip, and then the semiconductor chip is accumulated in an encapsulation resin such as an epoxy mold compound (EMC) during the packaging process. The semiconductor chip is protected from the impact.

그러나 반도체 칩에 대한 집적화가 높아지면서 반도체 칩은 동작 중에 많은 열을 발생하게 된다. 특히 반도체 칩의 동작속도가 빠르거나, 기능이 전력(power)을 제어하는 역할을 수행할 경우, 반도체 칩에서 발생된 열은 반도체 소자의 기능에도 영향을 미치게 된다. 따라서 반도체 칩에서 발생된 열을 얼마나 효과적으로 외부로 방출하는가 하는 것은 반도체 패키지 제조업자에게 있어 주된 해결 과제가 되고 있다.However, as the integration of semiconductor chips increases, the semiconductor chips generate a lot of heat during operation. In particular, when the operation speed of the semiconductor chip is fast or the function plays a role of controlling power, heat generated in the semiconductor chip also affects the function of the semiconductor device. Therefore, how to effectively dissipate the heat generated from the semiconductor chip to the outside is a major challenge for semiconductor package manufacturers.

도 1 내지 도 4는 종래 기술에 따른 반도체 패키지를 설명하기 위한 단면도들이다.1 to 4 are cross-sectional views illustrating a semiconductor package according to the related art.

도 1 내지 도 4를 참조하면, 도 1은 LOC(Lead On Chip)형 TSOP(Thin Small Out-line Package, 이하'TSOP') 패키지(10)의 단면도이고, 도 2는 일반적인 TSOP(20)의 단면도이고, 도 3은 BOC(Ball On Chip)형 BGA(Ball Grid Array) 패키지 (30)의 단면도이고, 도 4는 FBGA(Flexible Ball Grid Array) 패키지(40)의 단면도를 각각 도시하고 있다.1 to 4, FIG. 1 is a cross-sectional view of a lead on chip (LOC) type thin small out-line package (TSOP) package 10, and FIG. 2 is a view of a general TSOP 20. 3 is a cross-sectional view of a ball on chip (BOC) type ball grid array (BGA) package 30, and FIG. 4 shows a cross-sectional view of a flexible ball grid array (FBGA) package 40, respectively.

각각의 반도체 패키지구조에 있어서 약간의 차이를 보이고 있으나, 기본적으로는 리드프레임 혹은 인쇄회로기판과 같은 기본프레임(12, 22, 32, 42)에 반도체 칩(14, 24, 34, 44)이 골드 와이어(gold wire)와 같은 연결수단(16, 26, 36, 46)을 통해 전기적으로 연결되어 있고, 이러한 반도체 칩(14, 24, 34, 44)은 EMC와 같은 봉지수지(18, 28, 38, 48)에 의해 밀봉되어 있다. 도면의 참조부호 39 및 49는 인쇄회로기판(32, 42)의 표면에 부착된 외부연결단자로서의 솔더볼(solder ball)을 가리킨다.Although there is a slight difference in each semiconductor package structure, the semiconductor chips 14, 24, 34, 44 are basically gold in the basic frames 12, 22, 32, and 42 such as lead frames or printed circuit boards. The semiconductor chips 14, 24, 34, and 44 are electrically connected through connecting means 16, 26, 36, and 46, such as gold wires, and the encapsulation resins 18, 28, and 38, such as EMC. , 48). Reference numerals 39 and 49 in the drawings indicate solder balls as external connection terminals attached to the surfaces of the printed circuit boards 32 and 42.

그러나 종래 기술에 의한 반도체 패키지(10, 20, 30, 40)는 반도체 칩(14, 24, 34, 44)에서 동작중 열을 발생할 경우, 봉지수지(18, 28, 38, 48)의 표면이 평평하기 때문에 열을 외부로 방출하는 면적이 제한적이라는 특징을 지니고 있다.However, when the semiconductor packages 10, 20, 30, and 40 according to the related art generate heat during operation in the semiconductor chips 14, 24, 34, and 44, the surfaces of the encapsulation resins 18, 28, 38, and 48 may be reduced. Because of its flatness, it has a characteristic of limiting the area for dissipating heat to the outside.

본 발명이 이루고자 하는 기술적 과제는 상술한 문제점들을 해결할 수 있도록 봉지수지의 표면 형태를 응용하여 제한된 면적 내에서 높은 열방출 효율을 얻을 수 있는 열방출 특성을 개선한 반도체 패키지를 제공하는데 있다.SUMMARY OF THE INVENTION The present invention has been made in an effort to provide a semiconductor package having improved heat dissipation characteristics in which a high heat dissipation efficiency can be obtained within a limited area by applying a surface shape of an encapsulation resin to solve the above problems.

상기 기술적 과제를 달성하기 위해 본 발명에 의한 열방출 특성을 개선한 반도체 패키지는, 반도체 칩을 탑재할 수 있는 기본 프레임과, 상기 기본 프레임에 연결수단을 통하여 탑재된 반도체 칩과, 상기 반도체 칩 및 기본 프레임을 밀봉하 되 전체 표면적을 늘리는 형태로 만들어진 봉지수지와, 상기 봉지수지가 형성된 반도체 패키지의 일단에 형성된 외부연결단자를 구비하는 것을 특징으로 한다. In order to achieve the above technical problem, a semiconductor package having improved heat dissipation characteristics according to the present invention includes a base frame on which a semiconductor chip can be mounted, a semiconductor chip mounted through connecting means to the base frame, the semiconductor chip and It is characterized in that it comprises an encapsulation resin made in the form of sealing the basic frame to increase the total surface area, and an external connection terminal formed at one end of the semiconductor package in which the encapsulation resin is formed.

본 발명의 바람직한 실시예에 의하면, 상기 기본 프레임은 리드프레임 및 인쇄회로기판 중에서 선택된 어느 하나인 것이 적합하고, 상기 리드프레임은 반도체 칩이 위에 탑재되거나 혹은 아래에 탑재될 수 있고, 상기 연결수단은 와이어, 솔더볼 및 솔더범프 중에서 선택된 어느 하나일 수 있으며, 상기 외부연결단자는 솔더볼 및 리드 중에서 선택된 어느 하나일 수 있다.According to a preferred embodiment of the present invention, the basic frame is preferably any one selected from a lead frame and a printed circuit board, the lead frame may be mounted on or below the semiconductor chip, the connecting means The wire, the solder ball and the solder bumps may be any one selected from, and the external connection terminal may be any one selected from the solder ball and lead.

또한 본 발명의 바람직한 실시예에 의하면, 상기 전체 표면적을 늘리는 형태로 만들어진 봉지수지의 표면은, 상기 봉지수지의 표면에 사각형, 역삼각형, 반구형 및 이들의 혼합형 중에서 선택된 하나의 노치(notch)가 형성된 것이 적합하다.In addition, according to a preferred embodiment of the present invention, the surface of the encapsulation resin made in the form of increasing the total surface area, the notch (notch) selected from the square, inverted triangle, hemispherical and a mixture thereof is formed on the surface of the encapsulation resin Is suitable.

바람직하게는, 상기 노치(notch)는 봉지수지를 형성한 후, 블레이드(blade)에 의해 만들어지거나, 봉지수지를 밀봉하는 몰딩공정에서 몰드 표면에 노치형상을 만들어서 형성하거나, 봉지수지를 형성한 후, 봉지수지 표면에 약품처리를 수행하여 만들 수 있다.Preferably, the notch is formed by a blade after forming the encapsulation resin, or by forming a notch shape on the surface of the mold in a molding process of sealing the encapsulation resin, or after forming the encapsulation resin. It can be made by chemical treatment on the surface of encapsulating resin.

또한 상기 열방출 특성을 개선한 반도체 패키지는 상기 노치의 표면을 채우는 열전도수단을 더 구비할 수 있으며, 이러한 열전도수단은 금속 혹은 이를 포함하는 재질인 것이 적합하다.In addition, the semiconductor package having improved heat dissipation characteristics may further include heat conduction means for filling the surface of the notch, and the heat conduction means is preferably made of a metal or a material including the same.

본 발명에 따르면, 반도체 패키지에서 봉지수지 표면의 형태가 노치를 갖는 3차원 형태이기 때문에 제한된 면적 내에서 보다 열을 효율적으로 외부로 방출함으로 말미암아 반도체 패키지의 열방출 특성을 개선할 수 있다.According to the present invention, since the surface of the encapsulating resin in the semiconductor package is a three-dimensional shape having a notch, heat dissipation characteristics of the semiconductor package can be improved by dissipating heat to the outside more efficiently within a limited area.

이하, 첨부된 도면을 참조하여 본 발명의 바람직한 실시예를 상세히 설명하기로 한다. 그러나, 아래의 상세한 설명에서 개시되는 실시예는 본 발명을 한정하려는 의미가 아니라, 본 발명이 속한 기술분야에서 통상의 지식을 가진 자에게, 본 발명의 개시가 실시 가능한 형태로 완전해지도록 발명의 범주를 알려주기 위해 제공되는 것이다.Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the embodiments disclosed in the following detailed description are not meant to limit the present invention, but to those skilled in the art to which the present invention pertains, the disclosure of the present invention may be completed in a form that can be implemented. It is provided to inform the category.

도 5 내지 도 8은 본 발명에 의한 열방출 특성을 개선한 반도체 패키지를 설명하기 위해 도시한 단면도들이다.5 to 8 are cross-sectional views illustrating a semiconductor package having improved heat dissipation characteristics according to the present invention.

도 5 내지 도 8을 참조하면, 본 발명에 의한 열방출 특성을 개선한 반도체 패키지(100, 200, 300, 400)는, 반도체 칩(120, 220, 320, 420)을 탑재할 수 있는 기본 프레임(110, 210, 310, 410)과, 상기 기본 프레임(110, 210, 310, 410)에 금선(gold wire)과 같은 연결수단(130, 230, 330, 430)을 통하여 탑재된 반도체 칩(120, 220, 320, 420)과, 상기 반도체 칩(120, 220, 320, 420) 및 기본 프레임(110, 210, 310, 410)을 밀봉하되 전체 표면적을 늘리는 형태로 만들어진 밀봉하는 봉지수지(140, 240, 340, 440)와, 상기 봉지수지(140, 240, 340, 440)가 형성된 반도체 패키지의 일단에 형성된 외부연결단자(160, 260, 360, 460)를 포함한다.5 to 8, the semiconductor packages 100, 200, 300, and 400 having improved heat dissipation characteristics according to the present invention may include a basic frame on which the semiconductor chips 120, 220, 320, and 420 may be mounted. The semiconductor chip 120 mounted on the 110, 210, 310, and 410, and through the connecting means 130, 230, 330, and 430 such as a gold wire in the base frame 110, 210, 310, or 410. Encapsulating resins (140, 420) and the semiconductor chips (120, 220, 320, 420) and the base frames (110, 210, 310, 410) to form an encapsulated resin to increase the total surface area. 240, 340, 440, and external connection terminals 160, 260, 360, and 460 formed on one end of the semiconductor package in which the encapsulation resins 140, 240, 340, and 440 are formed.

상기 기본 프레임(110, 210, 310, 410)은 리드프레임(leadframe), 고형(rigid type) 인쇄회로기판 및 휘어질 수 있는 재질(flexible)의 인쇄회로기판이 될 수 있다. 또한 리드프레임을 기본 프레임으로 사용할 경우, 반도체 패키지의 형태에 따라서 반도체 칩(120, 220, 320, 420)을 리드프레임의 위쪽 혹은 아래쪽 방향으로 탑재하는 형태로 변형할 수 있다.The basic frames 110, 210, 310, and 410 may be leadframes, rigid printed circuit boards, and flexible printed circuit boards. In addition, when the lead frame is used as the base frame, the semiconductor chips 120, 220, 320, and 420 may be deformed to be mounted in the up or down direction of the lead frame according to the shape of the semiconductor package.

상기 연결수단(130, 230, 330, 430) 역시 본 실시예에서는 금선(gold wire)을 중심으로 설명하였으나, 기본프레임이 인쇄회로기판 형태인 경우, 금선 대신에 반도체 칩(120, 220, 320, 420)의 본드패드(미도시)에 형성된 솔더볼 혹은 솔더범프(solder bump)를 연결수단으로 사용하는 형태로 변형할 수 있다.The connecting means (130, 230, 330, 430) also described in this embodiment centered on the gold wire (gold wire), but in the case of the basic frame is a printed circuit board form, instead of the gold wire semiconductor chip (120, 220, 320, The solder balls or solder bumps formed on the bond pads (not shown) of 420 may be modified to form a connection means.

상기 외부연결단자(160, 260, 360, 460)는 리드프레임을 기본프레임으로 사용할 경우에는 리드(160, 260)가 외부연결단자의 기능을 수행하며, 기본 프레임을 인쇄회로기판형으로 사용할 경우, 솔더볼(360, 460)이 외부연결단자의 기능을 수행하게 된다.The external connection terminals 160, 260, 360, and 460, when the lead frame is used as the base frame, the leads 160, 260 performs the function of the external connection terminal, when using the base frame as a printed circuit board type, Solder balls (360, 460) to perform the function of the external connection terminal.

상기 봉지수지(140, 240, 340, 440)에 형성된 노치(notch, 142, 242, 342, 442)는 본 발명의 목적을 달성하는 주요한 역할을 수행한다. 즉 종래 기술에 의한 반도체 패키지에서는 봉지수지의 표면이 평평했기 때문에 반도체 패키지 표면을 통하여 열을 방출하는 면적이 제한적이었다.Notches (142, 242, 342, 442) formed in the encapsulation resin (140, 240, 340, 440) plays a major role in achieving the object of the present invention. That is, in the semiconductor package according to the prior art, since the surface of the encapsulation resin was flat, the area for dissipating heat through the semiconductor package surface was limited.

그러나 본 발명에 의한 반도체 패키지(100, 200, 300, 300)는 봉지수지(140, 240, 340, 440)의 표면에 노치(142, 242, 342, 442)를 형성하여 표면 형태를 3차원 입체면으로 적용했기 때문에, 반도체 패키지 표면을 통하여 열을 방출하는 면적이 더욱 늘어나게 된다. 이로 인하여 반도체 칩(120, 220, 320, 420)에서 발생된 열을 보다 효율적으로 외부로 방출할 수 있는 장점이 있다.However, the semiconductor packages 100, 200, 300, and 300 according to the present invention form notches 142, 242, 342, and 442 on the surfaces of the encapsulation resins 140, 240, 340, and 440 to form a three-dimensional solid surface. Since it is applied to the surface, the area for dissipating heat through the surface of the semiconductor package is further increased. As a result, heat generated in the semiconductor chips 120, 220, 320, and 420 may be more efficiently discharged to the outside.

도 9 및 도 10은 본 발명에 의한 열방출 특성을 개선한 반도체 패키지의 봉지수지에 형성된 노치(notch)의 형성방법을 설명하기 위해 도시한 단면도들이다.9 and 10 are cross-sectional views illustrating a method of forming a notch formed in an encapsulation resin of a semiconductor package having improved heat dissipation characteristics according to the present invention.

도 9를 참조하면, 일반적인 TSOP(200)에 블레이드(500)를 사용하여 노치 (243)를 형성한 경우이다. 상기 블레이드(500)는 웨이퍼에서 단위 반도체 칩을 분리할 때 사용하거나, BGA 패키지를 매트릭스 형태로 복수개로 제조한 후, 이를 단위 BGA 패키지로 분리할 때 사용하는 다이아몬드 재질의 원형 톱날을 가리킨다.Referring to FIG. 9, the notch 243 is formed by using the blade 500 in the general TSOP 200. The blade 500 refers to a circular saw blade made of a diamond material used to separate a unit semiconductor chip from a wafer, or to manufacture a plurality of BGA packages in a matrix form and then to separate them into unit BGA packages.

도 10을 참조하면, FBGA 패키지(400)를 몰딩할 때, 몰드 하부(610)와 몰드 상부(600)를 사용하여 내부에 봉지수지가 성형되는 공간(cavity)을 만들고 내부에 액상의 봉지수지를 채워서 성형을 실시한다. 이때, 몰드 상부(600) 금형에 노치(notch) 형태의 음각된 패턴을 형성하여 FBGA 패키지(400)의 봉지수지(440) 상부에 노치(443)를 형성할 수 있다.Referring to FIG. 10, when molding the FBGA package 400, the mold lower 610 and the mold upper 600 are used to create a cavity in which an encapsulation resin is formed and a liquid encapsulation resin therein. Fill and perform molding. In this case, the notch 443 may be formed on the encapsulation resin 440 of the FBGA package 400 by forming a notched pattern in the mold upper 600.

도면에서는 설명되지 않았으나, 전형적인 방법에 의해 봉지수지를 밀봉하는 몰딩공정을 수행한 후, 식각공정에서 사용되는 화학약품 처리에 의해서도 봉지수지 표면에 원하는 형태의 노치(442)를 형성할 수도 있다.Although not illustrated in the drawing, after the molding process of sealing the sealing resin by a typical method, a notch 442 having a desired shape may be formed on the surface of the sealing resin by chemical treatment used in the etching process.

도 11은 본 발명에 의한 열방출 특성을 개선한 반도체 패키지에서 노치(notch)의 형태를 설명하기 위한 단면 형상이다.11 is a cross-sectional view for explaining the shape of a notch in a semiconductor package having improved heat dissipation characteristics according to the present invention.

도 11을 참조하면, (a)의 경우는 사각형상으로 노치를 가리키고, (b)의 경우는 역삼각형 형상의 노치를 가리키고, (c)는 반구형의 노치를 가리키고, (d)의 경우는 사각형상의 노치가 다단으로 응용된 형상을 가리키고, (e)의 경우는 역삼각형 형상의 노치가 다단으로 응용된 경우이며, (f)는 반구형 형상의 노치가 다단으로 형성된 경우를 가리킨다. 이 외에도, 봉지수지 표면 형태를 입체적으로 구성하여 열방출에 필요한 봉지수지 표면적을 늘릴 수 있는 형태이면 다양한 방법으로 변형이 가능하다.Referring to FIG. 11, (a) indicates a notch in the shape of a rectangle, (b) indicates a notch in an inverted triangle shape, (c) indicates a notch in a hemispherical shape, and (d) indicates a rectangle. The notch of the image refers to the shape applied in multiple stages, (e) the case where an inverted triangle notch is applied in multiple stages, and (f) indicates the case where the hemispherical notch is formed in multiple stages. In addition, it is possible to deform in various ways as long as it is possible to increase the surface area of the encapsulation resin required for heat dissipation by three-dimensional configuration of the encapsulation surface.

도 12 내지 도 15는 본 발명에 의한 열방출 특성을 개선한 반도체 패키지의 변형예를 설명하기 위해 도시한 단면도들이다. 12 to 15 are cross-sectional views illustrating a modified example of a semiconductor package having improved heat dissipation characteristics according to the present invention.

도 12 내지 도 15를 참조하면, 상술한 실시예에서 설명된 노치(142, 242, 342, 442)만을 적용하여 반도체 패키지의 열방출 효과를 충분히 높일 수 있으나, 상기 노치(142, 242, 342, 442)의 표면에 열전도율이 높은 수단(144, 244, 344, 444)을 채워 넣음으로써 봉지수지의 표면에서 열이 발산되는 효과를 더욱 높일 수 있다. 이러한 열전도 수단(144, 244, 344, 444)을 열전도율이 높으면서 고강도를 갖는 금속을 사용할 경우에는 반도체 패키지의 강도를 더욱 높일 수 있어 신뢰도 향상에도 도움이 된다. 상기 열전도 수단(144, 244, 344, 444)으로는, 금속 혹은 금속의 합금을 코팅(coating), 프린팅(printing), 침지(dipping) 방식을 통하여 형성할 수 있다.12 to 15, only the notches 142, 242, 342, and 442 described in the above-described embodiments may be applied to sufficiently enhance the heat dissipation effect of the semiconductor package. However, the notches 142, 242, 342, By filling means 144, 244, 344 and 444 with high thermal conductivity on the surface of 442, the effect of heat dissipation on the surface of the encapsulating resin can be further enhanced. When the heat conducting means 144, 244, 344, 444 uses a metal having high thermal conductivity and high strength, the strength of the semiconductor package can be further increased, which also helps to improve reliability. As the heat conduction means 144, 244, 344, and 444, a metal or an alloy of a metal may be formed by coating, printing, or dipping.

본 발명은 상기한 실시예에 한정되지 않으며, 본 발명이 속한 기술적 사상 내에서 당 분야의 통상의 지식을 가진 자에 의해 많은 변형이 가능함이 명백하다.The present invention is not limited to the above embodiments, and it is apparent that many modifications can be made by those skilled in the art within the technical spirit to which the present invention belongs.

따라서, 상술한 본 발명에 따르면, 반도체 패키지에서 봉지수지 표면의 형태가 노치를 갖는 3차원 형태이기 때문에 제한된 면적 내에서 보다 열을 효율적으로 외부로 방출함으로 말미암아 반도체 패키지의 열방출 특성을 개선할 수 있다.Therefore, according to the present invention described above, since the shape of the encapsulating resin surface in the semiconductor package is a three-dimensional shape having a notch, heat dissipation characteristics of the semiconductor package can be improved by dissipating heat to the outside more efficiently within a limited area. have.

Claims (11)

반도체 칩을 탑재할 수 있는 기본 프레임;A base frame on which a semiconductor chip can be mounted; 상기 기본 프레임에 연결수단을 통하여 탑재된 반도체 칩;A semiconductor chip mounted on the basic frame through connecting means; 상기 반도체 칩 및 기본 프레임을 밀봉하되 전체 표면적을 늘리는 형태로 만들어진 봉지수지; 및An encapsulation resin formed to seal the semiconductor chip and the base frame to increase the total surface area; And 상기 봉지수지가 형성된 반도체 패키지의 일단에 형성된 외부연결단자를 구비하는 것을 특징으로 하는 열방출 특성을 개선한 반도체 패키지.And an external connection terminal formed at one end of the semiconductor package in which the encapsulation resin is formed. 제1항에 있어서, The method of claim 1, 상기 기본 프레임은 리드프레임 및 인쇄회로기판 중에서 선택된 어느 하나인 것을 특징으로 열방출 특성을 개선한 반도체 패키지.The base frame is a semiconductor package with improved heat dissipation characteristics, characterized in that any one selected from a lead frame and a printed circuit board. 제2항에 있어서, The method of claim 2, 상기 리드프레임은 반도체 칩이 위에 탑재되거나 혹은 아래에 탑재될 수 있는 엘.오.씨(LOC)형 리드프레임 중에서 선택된 하나인 것을 특징으로 하는 열방출 특성을 개선한 반도체 패키지.The lead frame is a semiconductor package having improved heat dissipation characteristics, characterized in that the semiconductor chip is one selected from among the L. O. C (LOC) lead frame that can be mounted on or below. 제1항에 있어서, The method of claim 1, 상기 연결수단은 와이어, 솔더볼 및 솔더범프 중에서 선택된 어느 하나인 것을 특징으로 하는 열방출 특성을 개선한 반도체 패키지.The connecting means is a semiconductor package with improved heat dissipation characteristics, characterized in that any one selected from wire, solder ball and solder bumps. 제1항에 있어서, The method of claim 1, 상기 전체 표면적을 늘리는 형태로 만들어진 봉지수지의 표면은,The surface of the encapsulation resin made in the form of increasing the total surface area, 상기 봉지수지의 표면에 사각형, 역삼각형, 반구형 및 이들의 혼합형 중에서 선택된 하나의 노치(notch)가 형성된 것을 특징으로 하는 열방출 특성을 개선한 반도체 패키지.The semiconductor package with improved heat dissipation characteristics, characterized in that the notch (notch) selected from the square, inverted triangle, hemispherical and a mixture thereof formed on the surface of the encapsulation resin. 제5항에 있어서, The method of claim 5, 상기 노치(notch)는 봉지수지를 형성한 후, 블레이드(blade)에 의해 만들어진 것을 특징으로 하는 열방출 특성을 개선한 반도체 패키지.The notch is a semiconductor package having improved heat dissipation characteristics, characterized in that formed by a blade after forming the encapsulation resin. 제5항에 있어서, The method of claim 5, 상기 노치(notch)는 봉지수지를 밀봉하는 몰딩공정에서 몰드 표면에 노치형상을 만들어서 형성한 것을 특징으로 하는 열방출 특성을 개선한 반도체 패키지.The notch (notch) is a semiconductor package with improved heat dissipation characteristics, characterized in that formed by forming a notch shape on the mold surface in the molding process for sealing the sealing resin. 제5항에 있어서, The method of claim 5, 상기 노치(notch)는 봉지수지를 형성한 후, 봉지수지 표면에 약품처리를 수행하여 만든 것을 특징으로 하는 열방출 특성을 개선한 반도체 패키지.The notch (notch) is a semiconductor package having improved heat dissipation characteristics, characterized in that after forming the encapsulation resin, a chemical treatment on the surface of the encapsulation resin. 제1항에 있어서, The method of claim 1, 상기 외부연결단자는 솔더볼 및 리드 중에서 선택된 어느 하나인 것을 특징으로 하는 열방출 특성을 개선한 반도체 패키지.The external connection terminal is a semiconductor package with improved heat dissipation characteristics, characterized in that any one selected from solder balls and leads. 제1항에 있어서, The method of claim 1, 상기 열방출 특성을 개선한 반도체 패키지는 상기 노치의 표면을 채우는 열전도수단을 더 구비하는 것을 특징으로 하는 열방출 특성을 개선한 반도체 패키지.The semiconductor package having improved heat dissipation characteristics further includes heat conduction means for filling a surface of the notch. 제10항에 있어서, The method of claim 10, 상기 열전도수단은 금속 혹은 이를 포함하는 재질인 것을 특징으로 하는 열방출 특성을 개선한 반도체 패키지.The thermally conductive means is a semiconductor package with improved heat dissipation characteristics, characterized in that the metal or a material containing the same.
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EP4195256A1 (en) * 2021-12-02 2023-06-14 Qorvo US, Inc. Three-dimensional patterned module exterior surface for improved heat dissipation and method of fabricating

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EP4195256A1 (en) * 2021-12-02 2023-06-14 Qorvo US, Inc. Three-dimensional patterned module exterior surface for improved heat dissipation and method of fabricating

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