KR20060022087A - Multi-domain thin film transistor array panel and liquid crystal display including the same - Google Patents

Abstract

The thin film transistor array panel according to the present invention includes a gate line for transmitting a scan signal, a data line intersecting the gate line and a video signal for transmitting an image signal, a pixel electrode formed for each pixel defined by the gate line and the data line, and a gate connected to the gate line. A thin film transistor including an electrode, a source electrode connected as a part of the data line, and a drain electrode connected to the pixel electrode, and an auxiliary electrode spaced apart from the pixel electrode at a predetermined interval to surround the pixel electrode, wherein the auxiliary electrode overlaps the data line. And a horizontal auxiliary electrode parallel to the electrode and the gate line, wherein the pixel electrode completely covers the front gate line. Accordingly, the thin film transistor array panel according to the present invention is formed such that the gate line is not partially overlapped with the pixel electrode to which the scan signal is applied, but completely overlaps with the rear pixel electrode positioned below the pixel electrode, thereby providing parasitic capacitance Cgs. Since it is not increased and the kickback voltage is not changed, the afterimage caused by the off current can be improved. In addition, since there is no metal layer and a black matrix in the space between the horizontal auxiliary electrode and the pixel electrode, it is possible to cut with a laser when a short circuit occurs between the horizontal auxiliary electrode and the pixel electrode even in a liquid crystal cell state.

Auxiliary electrode, afterimage, repair, parasitic capacitance

Description

MULTI-DOMAIN THIN FILM TRANSISTOR ARRAY PANEL AND LIQUID CRYSTAL DISPLAY INCLUDING THE SAME}

1 is a layout view of a thin film transistor array panel for a liquid crystal display according to an exemplary embodiment of the present invention.

2 is a layout view of an opposing display panel of a liquid crystal display according to an exemplary embodiment of the present invention;

3 is a layout view of a liquid crystal display according to an exemplary embodiment of the present invention;

4 is a cross-sectional view taken along line IV-IV ′ of FIG. 3,

5 is a diagram illustrating a state in which an auxiliary electrode and a pixel electrode of a thin film transistor array panel are short-circuited, according to an exemplary embodiment.

6 is a layout view of a liquid crystal display according to another exemplary embodiment of the present invention.

FIG. 7 is a cross-sectional view taken along line VII-VII ′ of FIG. 6.

<Description of the symbols for the main parts of the drawings>

110: substrate 121, 129: gate line

124: gate electrode 140: gate insulating film

151 and 154: semiconductors 161 and 165: ohmic contact members                 

171 and 179: data line 173: source electrode

175: drain electrode 180: protective film

181, 182, and 185: contact hole 190: pixel electrode

81, 82: contact auxiliary member

199: auxiliary electrode 199a: short circuit

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display panel and a liquid crystal display including the same, and more particularly, to a thin film transistor array panel having a pixel electrode among opposite electrodes and pixel electrodes facing each other, and a liquid crystal display including the same.

The liquid crystal display is one of the most widely used flat panel display devices. The liquid crystal display includes two display panels on which a field generating electrode is formed and a liquid crystal layer interposed therebetween. It is a display device which controls the transmittance | permeability of the light which passes through a liquid crystal layer by rearranging.

Among the liquid crystal display devices, a field generating electrode is provided in each of two display panels. Among them, a liquid crystal display device having a structure in which a plurality of pixel electrodes are arranged in a matrix form on one display panel and one common electrode covering the entire display panel on the other display panel is mainstream. The display of an image in this liquid crystal display device is performed by applying a separate voltage to each pixel electrode. To this end, a thin film transistor, which is a three-terminal element for switching a voltage applied to a pixel electrode, is connected to each pixel electrode, and a gate line for transmitting a signal for controlling the thin film transistor and a data line for transmitting a voltage to be applied to the pixel electrode are provided. Install on the display panel.

However, such a liquid crystal display device has a disadvantage that a narrow viewing angle is important. In order to overcome these disadvantages, various methods for widening the viewing angle have been developed. Among them, liquid crystal molecules are vertically aligned with respect to the upper and lower display panels, and a method of forming a constant incision pattern or protrusion on the pixel electrode and the opposite electrode, which is the opposite electrode. This is becoming potent.

As a method of forming an incision pattern, there is a method of widening the viewing angle by forming an incision pattern on each of the pixel electrode and the opposite electrode and controlling the direction in which the liquid crystal molecules lie down using a fringe field formed by the incision patterns. .

The protrusions are formed by forming protrusions on the pixel electrode and the counter electrode formed on the upper and lower display panels, respectively, to adjust the lying direction of the liquid crystal molecules using an electric field distorted by the protrusions.

In another method, an incision pattern is formed on the pixel electrode formed on the lower panel, and protrusions are formed on the opposite electrode formed on the upper panel, so that the liquid crystal lies down using a fringe field formed by the incision pattern and the projection. There is a way to form a domain by controlling.

In such a liquid crystal display, it is important to secure an aperture ratio of a pixel. For this purpose, the pixel electrode and the data line are arranged to be adjacent to or overlap with each other, whereby the data line to which the data voltage continuously changes with the pixel electrode to which the pixel voltage is applied is transferred. Parasitic capacitances are formed in between, and various defects occur due to such parasitic capacitances. For example, in a photolithography process using an exposure mask smaller than an active area of a substrate in a photolithography process of a liquid crystal display device, a photolithography process is performed by dividing into several blocks and performing an exposure process using an exposure mask. The distance can vary slightly from block to block. As a result, a difference in parasitic capacitance generated between the pixel electrode and the data line on a block basis causes a stitch defect.

In addition, in such a liquid crystal display, an electric field is formed between the data line and the pixel electrode or the counter electrode, and the electric field distorts the orientation of some liquid crystal molecules disposed at the edge of the pixel. Due to the alignment distortion, light leakage occurs around the pixel, which causes a decrease in display characteristics of the liquid crystal display.

In addition, such a liquid crystal display may generate pixel defects in which pixels are always displayed brightly or darkly. It is preferable to pattern the wirings in an arrangement structure that minimizes the defects.

SUMMARY OF THE INVENTION The present invention provides a thin film transistor array panel and a liquid crystal display including the same capable of minimizing a change in parasitic capacitance and distortion of liquid crystal molecules generated between a pixel electrode and a data line.                         

Another object of the present invention is to provide a thin film transistor array panel capable of minimizing pixel defects and easily repairing pixel defects, and a liquid crystal display including the same.

The thin film transistor array panel according to the present invention includes a gate line for transmitting a scan signal, a data line intersecting the gate line to transmit an image signal, a pixel electrode formed for each pixel defined by the gate line and the data line, and the gate line. A thin film transistor including a gate electrode connected to the data line, a source electrode connected to a portion of the data line, and a drain electrode connected to the pixel electrode, and an auxiliary electrode spaced apart from the pixel electrode at a predetermined interval to surround the pixel electrode; The auxiliary electrode includes a vertical auxiliary electrode overlapping the data line and a horizontal auxiliary electrode parallel to the gate line, and the pixel electrode completely covers the front gate line.

In addition, the front end gate line may be a gate line that transmits a scan signal to a front end pixel electrode adjacent to the pixel electrode.

In addition, the auxiliary electrode and the pixel electrode is preferably made of the same layer.

The front gate line preferably overlaps the upper end of the pixel electrode.

In addition, it is preferable to further include a sustain electrode overlapping the pixel electrode to form a storage capacitor.

In addition, the sustain electrode is preferably completely covered by the lower end of the pixel electrode.

In addition, it is preferable that the upper portion of the sustain electrode overlaps the lower end of the pixel electrode.

In addition, it is preferable that the lower portion of the sustain electrode overlaps the upper end of the rear pixel electrode adjacent to the pixel electrode.

The thin film transistor may further include an insulating layer covering the thin film transistor, the gate line, and the data line, and the auxiliary electrode and the pixel electrode may be formed on the insulating layer.

The insulating layer may be formed of an organic insulating material, and the auxiliary electrode and the sustain electrode may be electrically connected to each other.

In addition, it is preferable that the boundary of the auxiliary electrode overlapping the data line completely covers the data line.

In addition, it is preferable that the pixel electrode has domain regulating means substantially at +/- 45 degrees with respect to the gate line.

In addition, the liquid crystal display according to the present invention includes a gate line for transmitting a scan signal, a data line intersecting the gate line to transmit an image signal, a pixel electrode formed for each pixel defined by the gate line and the data line, and the gate. A thin film transistor including a gate electrode connected to a line, a source electrode connected to a portion of the data line, and a drain electrode connected to the pixel electrode, and an auxiliary electrode spaced apart from the pixel electrode at a predetermined interval to surround the pixel electrode; And the auxiliary electrode includes a vertical auxiliary electrode overlapping the data line and a horizontal auxiliary electrode parallel to the gate line, wherein the pixel electrode faces a thin film transistor array panel covering the front gate line and the thin film transistor array panel. Opposite side facing the pixel electrode It is desirable to include a counter panel, the liquid crystal is formed between the TFT array panel and the facing panel having floor.

In addition, the counter electrode and the auxiliary electrode preferably transmits the same signal.

In addition, it is preferable that the liquid crystal contained in the liquid crystal layer has negative dielectric anisotropy and its long axis is vertically oriented with respect to the two display panels.

In addition, the counter electrode and the pixel electrode preferably have domain regulating means for dividing and aligning the liquid crystal molecules of the liquid crystal layer into a plurality of domains, and the domain regulating means preferably has a cutout.

Then, embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like parts are designated by like reference numerals throughout the specification. When a part of a layer, film, region, plate, etc. is said to be "on" another part, this includes not only the other part being "right over" but also another part in the middle. On the contrary, when a part is "just above" another part, there is no other part in the middle.

Next, a multi-domain liquid crystal display according to an exemplary embodiment of the present invention will be described with reference to the drawings.

1 is a layout view showing a structure of a thin film transistor array panel for a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 2 is a layout view showing a structure of an opposing display panel for a liquid crystal display according to an exemplary embodiment of the present invention. 3 is a layout view illustrating a structure of a liquid crystal display according to an exemplary embodiment in which the display panels of FIGS. 1 and 2 are aligned, and FIG. 4 is a line IV-IV 'of the liquid crystal display of FIG. It is a cross-sectional view cut along.

The liquid crystal display is formed of a thin film transistor array panel 100 on the lower side and an upper opposing display panel 200 facing them and liquid crystal molecules oriented almost perpendicularly to the two display panels 100 and 200. It consists of the liquid crystal layer 3 containing. In this case, alignment layers 11 and 21 are formed on each of the display panels 100 and 200, and the alignment layers 11 and 21 may align the liquid crystal molecules of the liquid crystal layer 3 to be perpendicular to the display panels 100 and 200. It is preferred that the vertical alignment mode be, but it may not be. In addition, upper and lower polarizers 12 and 22 are attached to outer surfaces of the upper panel 200 and the lower panel 100, respectively.

The thin film transistor array panel 100 includes a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO), and has cutouts 191, 192, 193, 194, 195, 196, 197, and 198. A pixel electrode 190 is formed, and each pixel electrode 190 is connected to a thin film transistor to receive an image signal voltage. In this case, the thin film transistor is connected to the gate line 121 for transmitting the scan signal and the data line 171 for transmitting the image signal, respectively, to turn on and off the pixel electrode 190 according to the scan signal. . Here, the pixel electrode 190 may not be made of a transparent material in the case of a reflective liquid crystal display, and in this case, the lower polarizer 12 is also unnecessary.

Also, the opposing display panel 200 facing the thin film transistor array panel 100 may include a black matrix 220 and a red, green, and blue color filter 230 to prevent light leakage from the edges of the pixels, and the ITO or IZO. The opposite electrode 270 made of a transparent conductive material is formed. The black matrix 220 may be formed not only in the peripheral portion of the pixel region but also in the portion overlapping the cutouts 271, 272, 273, 274, 275, 276, 277, and 278 of the counter electrode 270. This is to prevent light leakage caused by the cutouts 271, 272, 273, 274, 275, 276, 277, and 278.

Next, the thin film transistor array panel 100 will be described in more detail with reference to FIGS. 1, 3, and 4.

In the thin film transistor array panel 100, a plurality of gate lines 121 may be formed on the lower insulating substrate 110 to transfer gate signals. The gate line 121 mainly extends in the horizontal direction, and a part of each gate line 121 forms a plurality of gate electrodes 124. The gate electrode 124 is formed in the form of a protrusion in the gate line 121, and as shown in the present embodiment, the gate line 121 may have a contact portion for transmitting a gate signal from the outside to the gate line 121. In this case, the end portion 129 of the gate line 121 preferably has a wider width than the other portion, and in the embodiment in which the gate driving circuit is formed on the substrate 110, the gate line 121 is gate driven. It is electrically connected to the output of the circuit.

On the insulating substrate 110, a plurality of storage electrode lines 131 electrically separated from the gate line 121 are formed on the same layer as the gate line 121, and the storage electrode lines 131 may be connected to the drain electrode 175. A sustain electrode 133 that overlaps to form a sustain capacitor. The storage electrode line 131 receives a predetermined voltage such as a common voltage from the outside, and the storage electrode line 131 may be omitted when the storage capacitor generated due to the overlap of the pixel electrode 190 and the gate line 121 is sufficient. In order to maximize the aperture ratio of the pixel, the pixel may be disposed at an edge of the pixel area. The sustain electrode 133 is completely covered by the lower end of the pixel electrode 190.

Each storage electrode line 131 overlaps the cutouts 191, 192, 193, 194, 195, 196, 197, and 198 of the pixel electrode 190, which is formed later, and blocks the light leakage from the pixel. It may include.

The gate line 121 and the storage electrode line 131 are made of metal such as Al, Al alloy, Ag, Ag alloy, Cr, Ti, Ta, Mo, or the like. As shown in FIG. 4, the gate line 121 and the sustain electrode wiring 131 of the present embodiment are formed of a single layer, but have a high physical and chemical properties such as Cr, Mo, Ti, Ta, and the like, and have a low specific resistance. It may be made of a double layer including a metal layer of a series or Ag series. In addition, the gate line 121 and the storage electrode line 131 may be made of various metals or conductors.

The sidewalls of the gate line 121 and the storage electrode line 131 are inclined, and the inclination angle with respect to the horizontal plane is 30 to 80 °.

A gate insulating layer 140 made of silicon nitride (SiNx) or the like is formed on the gate line 121 and the storage electrode wiring 131.

A plurality of drain electrodes 175, including a plurality of data lines 171, are formed on the gate insulating layer 140. Each data line 171 extends mainly in a vertical direction and has a source electrode 173 extending from the data line 171 by extending a plurality of branches toward each drain electrode 175. The contact unit 179 located at one end of the data line 171 transfers an image signal from the outside to the data line 171.

Like the gate line 121, the data line 171 and the drain electrode 175 may be made of a metal including a conductive material such as chromium and aluminum, and may be formed of a single layer or multiple layers.

A plurality of island-like semiconductors 154 are formed below the data line 171 and the drain electrode 175. Each island-like semiconductor 154 made of amorphous silicon extends toward the gate electrode 124, the source electrode 173, and the drain electrode 175, and has a channel portion in which a channel of the thin film transistor is formed. In this case, the island-like semiconductor 154 may be linearly formed along the shape of the data line 171. In addition, most of the island-like semiconductors 154 may be located inside the boundary line of the gate electrode 124.

A plurality of island-like ohmic contacts 163 and 165 are formed between the semiconductor 154 and the data line 171 and the drain electrode 175 to respectively reduce the contact resistance between the two. The ohmic contacts 163 and 165 are made of amorphous silicon doped with silicide or n-type impurities at a high concentration and face each other with respect to the gate electrode 124.

On the data line 171 and the drain electrode 175, a-Si: C: O, a-Si formed by plasma enhanced chemical vapor deposition (PECVD), an organic material having excellent planarization characteristics, and photosensitivity. A protective film 180 made of a low dielectric constant insulating material, such as: O: F, is formed thick. In this case, the passivation layer 180 may include an insulating layer covering the semiconductor 154 exposed between the source electrode 173 and the drain electrode 175, and the insulating layer may be used to stably secure the characteristics of the thin film transistor. It is preferred to consist of silicon. In addition, the passivation layer 180 may be made of an acrylic organic insulating material and may include a color filter including red, green, and blue pigments.

The passivation layer 180 includes a plurality of contact holes 185 and 182 exposing at least a portion of the drain electrode 175 and an end portion 179 of the data line 171, respectively. Meanwhile, the end portion 129 of the gate line 121 also has a contact portion for connecting with an external driving circuit, and the plurality of contact holes 181 pass through the gate insulating layer 140 and the passivation layer 180 to pass through the gate line. Expose the end of (121).

A plurality of data contact assistants 82 and 81 are formed on the passivation layer 180, including a plurality of pixel electrodes 190 having cutouts 191, 192, 193, 194, 195, 196, 197, and 198. . The pixel electrode 190 and the data contact auxiliary members 81 and 82 use a transparent conductor such as indium tin oxide (ITO) or indium zinc oxide (IZO) or an opaque conductor having excellent light reflection characteristics such as aluminum (Al). To form.

The cutouts 191, 192, 193, 194, 195, 196, 197, and 198 formed in the pixel electrode 190 are symmetrical with respect to the horizontal line that divides the pixel electrode 190 up and down, respectively, in a diagonal direction. It is formed. The cutouts 194 and 195 include ends penetrating from the left side to the right side of the pixel electrode 190. Accordingly, the pixel electrode 190 is substantially mirror-symmetrical with respect to a line (a line parallel to the gate line) that bisects the pixel region defined by the intersection of the gate line 121 and the data line 171, respectively.

In this case, the upper and lower cutouts 191, 192, 193, 194, 195, 196, 197, and 198 are perpendicular to each other in the pixel area, in order to evenly distribute the direction of the fringe field in four directions.

In addition, auxiliary electrodes 199a and 199b are formed on the same layer as the pixel electrode 190 to which the common voltage transmitted to the counter electrode 270 of the upper panel 200 is transferred.

The auxiliary electrodes 199a and 199b are formed of a horizontal auxiliary electrode 199b parallel to and not overlapping with the horizontal gate line 121, and a vertical auxiliary electrode 199a overlapping with the vertical data line 191. Has a shape.

The vertical auxiliary electrode 199a completely covers the data line 171 so that the boundary line is positioned outside the boundary line of the data line 171, and the pixel electrode 190 completely covers the front gate line 121a. The front gate line 121a is a gate line that transmits a scan signal to the pixel electrode 190 and a neighboring front pixel electrode 190a.

That is, the gate line 121 does not overlap a part of the pixel electrode 190 to which the scan signal is applied, but is formed to completely overlap the rear pixel electrode 190c positioned below the pixel electrode 190. .

In the thin film transistor array panel according to the exemplary embodiment of the present invention, the vertical auxiliary electrode 199a is disposed closer to the boundary of the pixel electrode 190 than the data line 171, so that the data line 171 and the pixel electrode ( The liquid crystal molecules positioned between 190 are driven by an electric field formed between the vertical auxiliary electrode 199a and the pixel electrode 190, and the electric field is formed to be substantially parallel to the surface of the substrate 110. Therefore, the liquid crystal molecules positioned between the data line 171 and the pixel electrode 190 remain vertically aligned with respect to the two display panels 100 and 200, and thus, the auxiliary electrodes 199a and 199b and the pixel electrode are disposed. The display device may be darkly disposed between the two surfaces 190, and no light leaking may improve the display characteristics of the liquid crystal display. In addition, the width of the black matrix 220 formed on the opposing display panel 200 may be designed to have a minimum width, thereby maximizing the aperture ratio of the pixel.                     

In addition, the vertical auxiliary electrode 199a is disposed closer to the boundary of the pixel electrode 190 than the data line 171, so that an electric field formed between the data line 171 and the pixel electrode 190 is blocked, thereby Coupling capacitance formed between the line 171 and the pixel electrode 190 may not be generated, and thus stitch failure may be prevented.

Meanwhile, in order to block light leakage in the viewing angle direction, the lower end of the pixel electrode is formed to overlap the gate line thereof. However, in this case, the parasitic capacitance Cgs between the drain electrode 175 and the gate electrode 124 is increased to increase the kickback voltage. This is a problem that is also vulnerable to the afterimage caused by the off current (Ioff), especially when using Mo / Al / Mo as the metal wiring.

Therefore, in the exemplary embodiment of the present invention, the pixel electrode 190 is formed so that the pixel electrode 190 completely covers the front gate line 121a. The front gate line 121a is a gate line that transmits a scan signal to the pixel electrode 190 and a neighboring front pixel electrode 190a.

Accordingly, the gate line 121 does not overlap a part of the pixel electrode 190 to which the scan signal is applied, but is formed to completely overlap the rear pixel electrode 190c disposed below the pixel electrode 190. . Therefore, since the parasitic capacitance Cgs does not increase and the kickback voltage does not change, the afterimage caused by the off current Ioff can be improved, especially when Mo / Al / Mo is used as the metal wiring. Stand out.

In addition, the gap between the auxiliary electrodes 199a and 199b and the pixel electrode 190 may be set to a minimum size in which the resolution of the exposure apparatus and the particles do not cause much defect, thereby maximizing the aperture ratio. In other words, when the distance between the auxiliary electrodes 199a and 199b and the pixel electrode 190 is small, short circuits are likely to occur even by particles of small size.

In the portion where the vertical auxiliary electrode 199a overlaps the data line 171, the vertical auxiliary electrode 199a completely covers the data line 171 so that the boundary line of the vertical auxiliary electrode 199a is located outside the boundary line of the data line 171. do.

Therefore, the metal layer and the black matrix do not exist in the space 70 between the vertical auxiliary electrode 199a and the pixel electrode 190 which completely cover the data line 171. Therefore, even if a short circuit occurs between the vertical auxiliary electrode 199a and the pixel electrode 190 even in a liquid crystal cell state in which the upper substrate and the lower substrate are combined, it is possible to cut with a laser.

However, when the horizontal auxiliary electrode 199b is positioned within the boundary line of the gate line 121, the gate 50 is disposed in the space 50 between the horizontal auxiliary electrode 199b overlapping the gate line 121 and the pixel electrode 190. Part of the line 121 is located. Therefore, when a short circuit occurs between the horizontal auxiliary electrode 199b and the pixel electrode 190, the gate line 121 may be damaged when the laser is cut. Thus, the laser is not only cut in the thin film transistor array panel but also in the liquid crystal cell state. It is impossible.

Therefore, in an exemplary embodiment of the present invention, the pixel electrode 190 completely covers the front gate line 121a. Accordingly, the gate line 121 does not overlap a part of the pixel electrode 190 to which the scan signal is applied, but is formed to completely overlap the rear pixel electrode 190c disposed below the pixel electrode 190. . Accordingly, there is no metal layer and a black matrix in the space 50 between the horizontal auxiliary electrode 199b and the pixel electrode 190. Therefore, even if a short circuit 199a (see FIG. 5) occurs between the horizontal auxiliary electrode 199b and the pixel electrode 190 even in the liquid crystal cell state in which the upper substrate and the lower substrate are combined, it is possible to cut by a laser.

In the opposite display panel 200 facing the thin film transistor array panel 100, a black matrix 220 is formed on the upper insulating substrate 210 to prevent light leakage from the pixel edge. The red, green, and blue color filters 230 are formed on the black matrix 220. The planarization film 250 is formed on the entire surface of the color filter 230, and the counter electrode 270 having the cutouts 271, 272, 273, 274, 275, 276, 277, and 278 is formed thereon. It is. The counter electrode 270 is formed of a transparent conductor such as ITO or indium zinc oxide (IZO).

A pair of cutouts 271, 272, 273, 274, 275, 276, 277, and 278 of the counter electrode 270 may have cutouts 191, 192, 193, 194, 195, 196, 197 and 198 include alternately arranged portions that form 45 ° with respect to the gate line 121, and include diagonal portions parallel to each other and end portions overlapping sides of the pixel electrode 190. At this time, the end is classified into a longitudinal end part and a horizontal end part.

When the thin film transistor substrate and the opposing display panel having the above structure are aligned and combined, and a liquid crystal material is injected and vertically aligned therebetween, a basic structure of the liquid crystal display according to the present invention is provided.

When the thin film transistor array panel 100 and the opposing display panel 200 are aligned, the incisions 191, 192, 193, 194, 195, 196, 197, and 198 of the pixel electrode 190 and the opposing electrodes 270 are disposed. Reference numerals 271, 272, 273, 274, 275, 276, 277, and 278 divide the pixel region into a plurality of domains. These domains are classified into four types according to the average major axis direction of the liquid crystal molecules located therein, and each domain is elongated to have a width and a length.

In this case, the cutouts 191, 192, 193, 194, 195, 196, 197, and 198 of the pixel electrode 190 and the cutouts 271, 272, 273, 274, 275, 276, 277 and 278 serve as domain regulating means for splitting and aligning the liquid crystal molecules, and as domain regulating means, projections of inorganic material or organic material on or under the pixel electrode 190 and the counter electrode 270 are used instead of the cutout. In the case of forming, the width is preferably set to 5 µm to 10 µm.

In the liquid crystal display according to the exemplary embodiment of the present invention, the same voltage is applied to the auxiliary electrodes 199a and 199b and the counter electrode 270 so that the driving voltage is applied to the pixel electrode 190 when the liquid crystal display is driven. Even though the liquid crystal molecules between the auxiliary electrodes 199a and 199b and the counter electrode 270 do not move, the liquid crystal molecules maintain the vertical alignment mode which is arranged perpendicular to the display panels 100 and 200. Therefore, portions corresponding to the auxiliary electrodes 199a and 199b are displayed in dark, and light leakage does not occur between neighboring pixel regions, thereby improving display characteristics of the liquid crystal display.

A method of manufacturing a thin film transistor array panel in the liquid crystal display according to the exemplary embodiment of such a structure will be described as follows.

First, a conductive film made of Cr or Mo alloy or the like and a conductive film made of Al or Ag with low resistance or an alloy containing them are stacked on the lower insulating substrate 110 as a single film or a multilayer film by sputtering or the like. The gate line 121 and the storage electrode line 131 are formed by using dry or wet etching in the photolithography process.

Next, the gate insulating layer 140, the hydrogenated amorphous silicon layer, and the amorphous silicon layer doped with a high concentration of n-type impurities such as phosphorus (P) are respectively 1,500 kPa to 5,000 kPa, 500 kPa to 2,000 kPa using chemical vapor deposition. , The resistive contact layer to which the channel portion is connected, and the amorphous silicon island-like semiconductor 154 by successively depositing a thickness of 300 Å to 600 Å and patterning the doped amorphous silicon layer and the amorphous silicon layer by a photolithography process using a mask. To form.

Subsequently, a conductive film made of Cr or Mo alloy or the like or a conductive film made of Al or Ag having a low resistance or an alloy containing the same is deposited to a thickness of 1,500 kPa to 3,000 kPa in a single layer or a multilayer by sputtering or the like. The data line 171 and the drain electrode 175 are formed by patterning by a photolithography process using a mask.

Subsequently, the ohmic contact layer that is not covered by the source electrode 173 and the drain electrode 175 is etched to expose the semiconductor 154 between the source electrode 173 and the drain electrode 175, and the ohmic contact layer separated on both sides ( 163, 165).

Subsequently, a protective film 180 is formed by coating an organic insulating material having excellent planarization characteristics and photosensitivity, and exposing and developing the protective film 180 by a photolithography process using a photomask to form contact holes 181, 182, and 185. To form. At this time, before applying the organic insulating material, silicon nitride or silicon oxide is laminated by a method such as chemical vapor deposition to further form an insulating film covering the semiconductor 154 exposed between the source electrode 173 and the drain electrode 175. It is preferable.

Next, as shown in FIGS. 1, 3, and 4, ITO or IZO is deposited to a thickness of 400 to 500 Å and photo-etched using a mask to assist contact with the pixel electrode 190 and the auxiliary electrodes 199a and 199b. The members 81 and 82 are formed.

In this case, the pixel electrode 190 is formed to completely cover the front gate line 121a, and the gate line 121 does not overlap a part of the pixel electrode 190 to which the scan signal is applied, and the pixel electrode 190 does not overlap. It is formed to completely overlap with the rear pixel electrode 190c positioned below the 190.

Accordingly, since the parasitic capacitance Cgs between the gate electrode 124 and the drain electrode 175 does not increase and the kickback voltage does not change, the afterimage resulting from the off current Ioff can be improved.

In this case, the metal layer and the black matrix do not exist in the space 50 between the horizontal auxiliary electrode 199b and the pixel electrode 190. Therefore, even if a short circuit 199a (see FIG. 5) occurs between the horizontal auxiliary electrode 199b and the pixel electrode 190 even in the liquid crystal cell state in which the upper substrate and the lower substrate are combined, it is possible to cut by a laser.

Meanwhile, in the exemplary embodiment of the present invention, the TFT panel may have a different shape, and one embodiment will be described in detail with reference to the accompanying drawings.                     

FIG. 6 is a layout view of a liquid crystal display according to another exemplary embodiment. FIG. 7 is a cross-sectional view of the liquid crystal display of FIG. 6 taken along the line VII-VII ′.

6 and 7, the layer structure of the thin film transistor array panel of the liquid crystal display according to the present exemplary embodiment is generally the same as the layer structure of the thin film transistor array panel of the liquid crystal display shown in FIGS. 1 to 4. That is, the plurality of gate lines 121 including the plurality of gate electrodes 124 are formed on the substrate 110, and the gate insulating layer, the semiconductor 154, and the ohmic contacts 163 and 165 are formed. A plurality of data lines 171 including a plurality of source electrodes 173 and a plurality of drain electrodes 175 are formed on the ohmic contacts 163 and 165 and the gate insulating layer 140, and the passivation layer 180 is formed thereon. Is formed. A plurality of contact holes 182, 181, and 185 are formed in the passivation layer 180 and / or the gate insulating layer 140, and the pixel electrode 190 and the contact auxiliary members 81 and 82 are formed thereon. .

However, in one embodiment of the present invention, the sustain electrode 133 is completely covered by the lower end of the pixel electrode 190, but in another embodiment of the present invention, the upper portion of the sustain electrode 133 is the pixel electrode 190. ) And the lower part of the sustain electrode 133 overlap the upper end part of the rear pixel electrode 190c adjacent to the pixel electrode 190.

Therefore, another embodiment of the present invention will be higher than the opening ratio. That is, since the storage electrode 133 is positioned below the horizontal auxiliary electrode 199b, the pixel electrode 190 is not blocked by the storage electrode 133, so that the aperture ratio is improved.                     

In this case, the pixel electrode 190 is formed to completely cover the front gate line 121a, and the gate line 121 does not overlap a part of the pixel electrode 190 to which the scan signal is applied. It is formed to completely overlap with the rear pixel electrode 190c positioned below the electrode 190. Accordingly, since the parasitic capacitance Cgs between the gate electrode 124 and the drain electrode 175 does not increase and the kickback voltage does not change, the afterimage resulting from the off current Ioff can be improved.

Meanwhile, although the color filter 230 is disposed on the opposing display panel 200 in the structure of the liquid crystal display device, the color filter 230 may be disposed on the thin film transistor array panel 100. In this case, the color filter 230 may be disposed below the gate insulating layer 140. The protection layer 180 may also be disposed below the protection layer 180.

Meanwhile, in the exemplary embodiment of the present invention, only the liquid crystal display device in the vertical alignment mode in which the liquid crystal molecules are vertically arranged with respect to the two display panels 100 and 200 is described. Twisted nematic mode of spirally twisting arrangement, in-plane switching mode of driving liquid crystal molecules arranged parallel to the display panel by placing the opposite electrode and the pixel electrode on the same display panel, etc. It can be applied to the liquid crystal display device of various methods.

Although the preferred embodiments of the present invention have been described in detail above, those skilled in the art will understand that various modifications and equivalent other embodiments are possible therefrom. Accordingly, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concept of the present invention as defined in the following claims also fall within the scope of the present invention.

The thin film transistor array panel and the liquid crystal display including the same according to the present invention block light leaking between pixels by forming an auxiliary electrode in the same layer as the pixel electrode, and prevent the occurrence of stitch defects to display characteristics of the liquid crystal display. Can improve.

In addition, the gate line is partially overlapped with the corresponding pixel electrode to which the scan signal is applied, and completely overlaps with the next pixel electrode positioned below the pixel electrode, so that the parasitic capacitance Cgs is not increased and the kickback voltage is also changed. Therefore, the afterimage resulting from the off current can be improved.

In addition, since there is no metal layer and a black matrix in the space between the horizontal auxiliary electrode and the pixel electrode, it is possible to cut with a laser when a short circuit occurs between the horizontal auxiliary electrode and the pixel electrode even in a liquid crystal cell state.

Claims (18)

A gate line for transmitting a scan signal, A data line crossing the gate line and transferring an image signal; A pixel electrode formed for each pixel defined by the gate line and the data line; A thin film transistor including a gate electrode connected to the gate line, a source electrode connected to a portion of the data line, and a drain electrode connected to the pixel electrode; An auxiliary electrode spaced apart from the pixel electrode at a predetermined interval to surround the pixel electrode Including, The auxiliary electrode includes a vertical auxiliary electrode overlapping the data line and a horizontal auxiliary electrode parallel to the gate line. And the pixel electrode completely covers a front gate line. In claim 1, The front gate line is a thin film transistor array panel that transmits a scan signal to a front pixel electrode adjacent to the pixel electrode. In claim 1, The thin film transistor array panel of which the auxiliary electrode and the pixel electrode are formed of the same layer. In claim 1, And the front gate line overlaps an upper end of the pixel electrode. In claim 1, And a storage electrode overlapping the pixel electrode to form a storage capacitor. In claim 5, The sustain electrode is completely covered by a lower end of the pixel electrode. In claim 5, An upper side portion of the sustain electrode overlaps a lower end portion of the pixel electrode. In claim 7, And a lower portion of the sustain electrode overlaps an upper end of a rear pixel electrode adjacent to the pixel electrode. In claim 3, An insulating layer covering the thin film transistor, the gate line, and the data line; The auxiliary electrode and the pixel electrode are formed on the insulating layer. In claim 9, The insulating film is a thin film transistor array panel made of an organic insulating material. In claim 5, And the auxiliary electrode and the sustain electrode are electrically connected to each other. In claim 1, And a boundary of the auxiliary electrode overlapping the data line completely covers the data line. In claim 1, And the pixel electrode has domain regulating means substantially at ± 45 degrees with respect to the gate line. A gate line transferring a scan signal, a data line intersecting the gate line and transmitting an image signal, a pixel electrode formed for each pixel defined by the gate line and the data line, a gate electrode connected to the gate line, and the data A thin film transistor including a source electrode connected as a part of a line and a drain electrode connected to the pixel electrode, and an auxiliary electrode spaced apart from the pixel electrode at a predetermined interval to surround the pixel electrode, wherein the auxiliary electrode overlaps the data line. A thin film transistor array panel including a vertical auxiliary electrode and a horizontal auxiliary electrode parallel to the gate line, wherein the pixel electrode completely covers a front gate line; An opposing display panel facing the thin film transistor array panel and having an opposing electrode facing the pixel electrode; The liquid crystal layer formed between the thin film transistor array panel and the opposing display panel. Liquid crystal display comprising a. The method of claim 14, The liquid crystal display device wherein the counter electrode and the auxiliary electrode are transmitted with the same signal. The method of claim 14, The liquid crystal contained in the liquid crystal layer has a negative dielectric anisotropy, and the long axis of the liquid crystal is vertically aligned with respect to the two display panels. The method of claim 14, And the counter electrode and the pixel electrode have domain regulating means for dividing and aligning the liquid crystal molecules of the liquid crystal layer into a plurality of domains. The method of claim 14, And said domain regulating means is a cutout.

Images