KR20060013912A - Liquid crystal display device and method of fabricating thereof - Google Patents

Abstract

The liquid crystal display of the present invention and its manufacturing method simultaneously pattern the gate electrode, the gate line and the data line, and simultaneously connect the disconnection connection electrode, the source / drain electrode and the pixel electrode by using diffraction exposure and lift off processes. Providing a substrate by reducing the number of masks by forming to simplify the manufacturing process; Forming an active pattern on the substrate, the active pattern being divided into a source region, a drain region, and a channel region; Forming a first insulating film on the entire surface of the substrate; Forming a gate electrode, a gate line, and a data line on the substrate at the same time, wherein the gate line and the data line intersect to define a pixel region, and at the intersection, disconnect the gate line or data line; Forming a second insulating film on the entire surface of the substrate, forming a source electrode connected to the source region and a drain electrode connected to the drain region on the substrate, and simultaneously connecting the disconnected gate line or data line to the connection electrode; Forming a step.

Low mask, diffraction exposure, lift off

Description

Liquid crystal display device and manufacturing method therefor {LIQUID CRYSTAL DISPLAY DEVICE AND METHOD OF FABRICATING THEREOF}

1 is a plan view showing a part of an array substrate of a general liquid crystal display device.

2A to 2F are cross-sectional views sequentially illustrating a manufacturing process along the line II ′ of the liquid crystal display shown in FIG. 1.

3 is a plan view illustrating a portion of an array substrate of a liquid crystal display according to a first exemplary embodiment of the present invention.

4A through 4C are exemplary views sequentially illustrating a manufacturing process along line III-III ′ of the liquid crystal display shown in FIG. 3.

5A to 5E are cross-sectional views specifically illustrating diffraction exposure and lift-off processes for forming the disconnection connection electrode, the source / drain electrode, and the pixel electrode in FIG. 4C.

6 is a plan view illustrating a portion of an array substrate of a liquid crystal display according to a second exemplary embodiment of the present invention.

7A to 7C are exemplary views sequentially illustrating a manufacturing process along a line VI-VI ′ of the liquid crystal display shown in FIG. 6.

8 is a plan view illustrating a portion of an array substrate of a liquid crystal display according to a third exemplary embodiment of the present invention.

9A to 9C are exemplary views sequentially illustrating a manufacturing process along the line VIII-VIII ′ of the liquid crystal display shown in FIG. 8.

10A to 10C are plan views sequentially illustrating a manufacturing process of the liquid crystal display shown in FIG. 8.

11A to 11D are cross-sectional views illustrating a process of simultaneously forming an active pattern and a storage wiring by using first diffraction exposure in FIG. 9A.

12A to 12E are cross-sectional views specifically illustrating a second diffraction exposure and a lift-off process for forming a disconnection connection electrode, a source / drain electrode, and a pixel electrode in FIG. 9C;

** Explanation of symbols for main parts of drawings **

110, 210, 310: array substrate 121, 221, 321: gate electrode

122,222,322 Source electrodes 123,223,323 Drain electrodes

120A, 220A, 320A: Active pattern 124A, 224A, 324A: Source region

124B, 224B, 324B: Drain area 124C, 224C, 324C: Channel area

180A, 280A, 380A: Pixel electrode 180B, 280B, 380B: Connecting electrode

330B: first storage electrode 330C: storage line

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device and a method for manufacturing the same, and more particularly, to a liquid crystal display device having a sufficient storage capacity and at the same time reducing the number of masks used in the production of a polycrystalline silicon thin film transistor, thereby simplifying a manufacturing process and a manufacturing method thereof. It is about a method.

Recently, with increasing interest in information display and increasing demand for using a portable information carrier, a lightweight flat panel display (FPD), which replaces a conventional display device, a cathode ray tube (CRT), is used. The research and commercialization of Korea is focused on. In particular, the liquid crystal display (LCD) of the flat panel display device is an image representing the image using the optical anisotropy of the liquid crystal, is excellent in resolution, color display and image quality, and is actively applied to notebooks or desktop monitors have.

The liquid crystal display is largely composed of a color filter substrate as a first substrate, an array substrate as a second substrate, and a liquid crystal layer formed between the color filter substrate and the array substrate.

In this case, a thin film transistor (TFT) is generally used as a switching element of the liquid crystal display, and an amorphous silicon thin film or a polycrystalline silicon thin film is used as a channel layer of the thin film transistor. use.

On the other hand, the manufacturing process of the liquid crystal display device basically requires a number of mask processes (ie, photolithography process) for the fabrication of an array substrate including a thin film transistor, reducing the number of mask processes in terms of productivity A method is required.

Hereinafter, a structure of a general liquid crystal display device will be described in detail with reference to FIG. 1.

FIG. 1 is a plan view showing a part of an array substrate of a general liquid crystal display device. In an actual liquid crystal display device, N gate lines and M data lines cross each other, and there are N × M pixels. Only pixels are shown.

As shown in the drawing, a gate line 16 and a data line 17 are formed on the array substrate 10 to be arranged vertically and horizontally on the substrate 10 to define a pixel area. In addition, a thin film transistor as a switching element is formed in an intersection region of the gate line 16 and the data line 17, and a pixel electrode 18 is formed in each pixel region.

In this case, the thin film transistor includes a gate electrode 21 connected to the gate line 16, a source electrode 22 connected to the data line 17, and a drain electrode 23 connected to the pixel electrode 18. The thin film transistor is supplied to a first insulating film (not shown), a second insulating film (not shown), and the gate electrode 21 to insulate the gate electrode 21 and the source / drain electrodes 22 and 23. The active pattern 24 forms a conductive channel between the source electrode 22 and the drain electrode 23 by the gate voltage.                         

In this case, the source electrode 22 is electrically connected to the source region of the active pattern 24 through the first contact hole 40A formed in the first insulating film and the second insulating film, and the drain electrode 23 is the active pattern. It is electrically connected to the drain region of (24). In addition, a third insulating film (not shown) having a second contact hole 40B is formed on the drain electrode 23, so that the drain electrode 23 and the pixel electrode 18 are formed through the second contact hole 40B. This is to be electrically connected.

Hereinafter, a manufacturing process of the liquid crystal display device configured as described above will be described in detail with reference to FIGS. 2A to 2F.

2A through 2F are cross-sectional views sequentially illustrating a manufacturing process along the line II ′ of the liquid crystal display shown in FIG. 1, wherein the illustrated thin film transistor represents a polycrystalline silicon thin film transistor using polycrystalline silicon as an active layer. have.

First, as shown in FIG. 2A, an active pattern 24 made of a polycrystalline silicon layer is formed on a substrate 10 using a photolithography process.

Next, as illustrated in FIG. 2B, the first insulating film 15A and the conductive metal material are sequentially deposited on the entire surface of the substrate 10 on which the active pattern 24 is formed, and then the photolithography process is used to conduct the conductive material. By selectively patterning a metal material, the gate electrode 21 having the first insulating layer 15A interposed therebetween is formed on the active pattern 24.

Thereafter, a high concentration of impurity ions are implanted into a predetermined region of the active pattern 24 using the gate electrode 21 as a mask to form source / drain regions 24A and 24B of p + or n +. The source / drain regions 24A and 24B are formed for ohmic contact with the source / drain electrodes to be described later.

Next, as shown in FIG. 2C, after depositing the second insulating film 15B on the entire surface of the substrate 10 on which the gate electrode 21 is formed, the first insulating film 15A and the first insulating film 15A may be formed through a photolithography process. A portion of the second insulating layer 15B is removed to form the first contact hole 40A exposing the source / drain regions 24A and 24B.

2D, a source electrode connected to the source region 24A through the first contact hole 40A using a photolithography process after depositing a conductive metal material on the entire surface of the substrate 10. 22 and a drain electrode 23 connected to the drain region 24B are formed. In this case, a part of the conductive metal layer constituting the source electrode 22 extends in one direction to be connected to the data line 17.

Next, as shown in FIG. 2E, the second contact hole exposing a part of the drain electrode 23 by using a photolithography process after depositing a third insulating film 15C on the entire surface of the substrate 10. 40B).

Finally, as shown in FIG. 2F, a transparent conductive material is deposited on the entire surface of the substrate 10 on which the third insulating film 15C is formed, and then drained through the second contact hole 40B using a photolithography process. The pixel electrode 18 connected to the electrode 23 is formed.

As described above, in manufacturing a liquid crystal display device including a polycrystalline silicon thin film transistor, a total of six photos are used to pattern an active pattern, a gate electrode, a first contact hole, a source / drain electrode, a second contact hole, and a pixel electrode. Lithography process is required.                         

The photolithography process is a series of processes for transferring a pattern drawn on a mask onto a substrate on which a thin film is deposited to form a desired pattern. The photolithography process includes a plurality of processes such as photoresist coating, exposure, and development. As a result, many photolithography processes have many problems, such as lowering the production yield and increasing the probability of defects in the formed thin film transistors.

In particular, a mask designed to form a pattern is very expensive, and as the number of masks applied to the process increases, the manufacturing cost of the liquid crystal display device increases in proportion.

The present invention has been made to solve the above-mentioned problem, by simultaneously patterning a gate electrode, a gate line and a data line, and simultaneously forming a disconnection connection electrode, a source / drain electrode, and a pixel electrode using a diffraction exposure and a lift-off process. It is an object of the present invention to provide a liquid crystal display device and a method of manufacturing the same by reducing the number of manufacturing processes and cost.

In addition, another object of the present invention is to form an active pattern using diffraction exposure and to form a storage wiring of a metal layer, thereby ensuring sufficient storage capacity and driving a line inversion, and a method of manufacturing the same. To provide.

Further objects and features of the present invention will be described in the configuration and claims of the invention which will be described later.

In order to achieve the above object, the manufacturing method of the liquid crystal display device of the present invention comprises the steps of providing a substrate, forming an active pattern divided into a source region, a drain region and a channel region on the substrate, (1) forming an insulating film, and simultaneously forming a gate electrode, a gate line, and a data line on the substrate, wherein the gate line and the data line intersect to define a pixel region; and at the intersection, the gate line or data line is disconnected. Forming a second insulating film on the entire surface of the substrate; and forming a source electrode connected to the source region and a drain electrode connected to the drain region on the substrate, and simultaneously connecting the disconnected gate line or data line. Forming a connection electrode.

In addition, another method of manufacturing a liquid crystal display device according to the present invention includes providing a substrate divided into a first region and a second region, forming an active pattern in the first region of the substrate, and forming a storage wiring in the second region. Forming a first insulating film on the entire surface of the substrate, simultaneously forming a gate electrode, a gate line, and a data line on the substrate, wherein the gate line and the data line intersect to define a pixel region; Or disconnecting the data line, forming a second insulating film on the entire surface of the substrate, and forming a source electrode connected to the source region and a drain electrode connected to the drain region on the substrate. Forming a connection electrode connecting the line or the data line.                     

In addition, the liquid crystal display of the present invention is a substrate, an active pattern consisting of a silicon layer on the substrate and a storage wiring consisting of a first conductive film, a first insulating film deposited on the entire surface of the substrate, and simultaneously patterned on the substrate, and a second conductive A gate electrode, a gate line and a data line formed of a film and a third conductive film, a second insulating film formed on the entire surface of the substrate, and a source electrode formed on the substrate and connected to a source region through the contact hole; And a drain electrode connected to the drain region.

Hereinafter, exemplary embodiments of a liquid crystal display device and a method of manufacturing the same according to the present invention will be described in detail with reference to the accompanying drawings.

3 is a plan view showing a portion of an array substrate of a liquid crystal display according to an exemplary embodiment of the present invention, and particularly, one pixel including a thin film transistor.

In an actual liquid crystal display device, N gate lines and M data lines cross each other, and there are NxM pixels, but for the sake of simplicity, only the nxm-th pixel is shown in the drawing.

In this embodiment, the polycrystalline silicon thin film transistor using the polycrystalline silicon thin film as the channel layer is described as an example, but the present invention is not limited thereto, and an amorphous silicon thin film may be used as the channel layer of the thin film transistor.

As shown in the figure, a gate line 116 and a data line 117 are formed on the array substrate 110 to be arranged vertically and horizontally on the substrate 110 to define a pixel area. In addition, a thin film transistor, which is a switching element, is formed in an intersection area of the gate line 116 and the data line 117, and is connected to the thin film transistor in the pixel area and is connected to a common electrode of a color filter substrate (not shown). A pixel electrode 180A for driving a liquid crystal (not shown) is formed.

The thin film transistor includes a gate electrode 121 connected to the gate line 116, a source electrode 122 connected to the data line 117, and a drain electrode 123 connected to the pixel electrode 180A. In addition, the thin film transistor is supplied to a first insulating film (not shown), a second insulating film (not shown), and the gate electrode 121 to insulate the gate electrode 121 and the source / drain electrodes 122 and 123. The active pattern 120A forms a conductive channel between the source electrode 122 and the drain electrode 123 by the gate voltage.

In this case, the gate line 116 and the data line 117 are simultaneously patterned to be formed on the same layer in order to reduce the mask process used in fabrication of the thin film transistor, so that the gate line 116 and the data line ( In order to prevent a short circuit at an intersection where 117 intersects, a predetermined area of the data line 117 of the intersection is disconnected.

Meanwhile, a pair of first contact holes 140A exposing a portion of the source / drain regions of the active pattern 120A and portions of both ends of the disconnected data line 117 may be formed in the first insulating film and the second insulating film. The second contact hole 140B and the third contact hole 140C are formed to be exposed, and a part of the source electrode 122 is electrically connected to the source region through the first contact hole 140A, and the drain Part of the electrode 123 is electrically connected to the drain region. In addition, another portion of the source electrode 122 forms a disconnection connection electrode 180B and is connected to the lower end of the disconnected data line 117 through the second contact hole 140B of the n × m-th pixel part. At the same time, the third contact hole 140C is electrically connected to the upper end of the disconnected data line 117 of the (n + 1) xm-th pixel portion. In addition, another portion of the drain electrode 123 extends toward the pixel region to constitute the pixel electrode 180A.

As described above, in the present embodiment, the gate electrode 121, the gate line 116, and the data line 117 are simultaneously formed on the same layer, thereby reducing the number of masks used for fabricating the thin film transistor. At the intersection where the gate line 116 and the data line 117 intersect, a process of disconnecting the data line 117 of the intersection and forming source / drain electrodes 122 and 123 in a later process to prevent a short circuit. At the same time, the disconnection connection electrode 180B is simultaneously formed to connect the disconnected data line 117.

In the present embodiment, the source / drain electrodes 122 and 123, the pixel electrode 180A, and the disconnection connection electrode 180B are simultaneously patterned in one mask process by using diffraction exposure and lift-off processes. In addition to the above-described process of simultaneously forming the gate electrode 121, the gate line 116 and the data line 117, the manufacturing process of the liquid crystal display device of the present invention is simplified. It will be described in detail through the manufacturing process.

4A to 4C are exemplary views sequentially illustrating a manufacturing process along line III-III ′ of the liquid crystal display shown in FIG. 3.                     

As shown in FIG. 4A, an active pattern 120A made of a silicon layer is formed on a substrate 110 made of a transparent insulating material such as glass.

In this case, after forming a buffer film formed of a silicon oxide film (SiO ₂ ) on the substrate 110, a silicon layer may be formed on the buffer film. The buffer layer serves to block impurities such as sodium (natrium) from the glass substrate 110 from penetrating into the upper layer during the process.

The silicon layer may be formed of an amorphous silicon thin film or a crystallized silicon thin film. However, in the present embodiment, a thin film transistor is formed using the crystallized silicon thin film. In this case, the polycrystalline silicon thin film may be formed by depositing an amorphous silicon thin film on the substrate 110 and using various crystallization methods.

First, an amorphous silicon thin film may be formed by depositing in various ways, and representative methods of depositing the amorphous silicon thin film include a low pressure chemical vapor deposition (LPCVD) method and a plasma enhanced chemical vapor deposition (Plasma Enhanced). Chemical Vapor Deposition (PECVD) method.

Subsequently, crystallization is performed after a dehydrogenation process for removing hydrogen atoms present in the amorphous silicon thin film. At this time, as a method of crystallizing the amorphous silicon thin film, a solid phase crystallization (SPC) method for thermally treating the amorphous silicon thin film in a high temperature furnace and an excimer laser annealing (ELA) method using a laser are used. have.

On the other hand, the laser crystallization is mainly used for the excimer laser annealing method using a pulse-type laser, but recently sequential horizontal crystallization (Sequential Lateral) to significantly improve the crystallization characteristics by growing the grain (horizontal) in the horizontal direction Solidification (SLS) method is being studied.

The sequential horizontal crystallization takes advantage of the fact that grain grows in a direction perpendicular to the interface at the interface between the liquid phase silicon and the solid phase silicon, and appropriately controls the size of the laser energy and the irradiation range of the laser beam. It is a crystallization method that can improve the size of the silicon grain by controlling the side growth of the grain by a predetermined length.

Thereafter, the first insulating film 115A, the first conductive film, and the second conductive film, which are gate insulating films, are sequentially formed on the entire surface of the substrate 110.

In this case, the first conductive layer uses a transparent conductive material having excellent transmittance such as indium tin oxide (ITO) or indium zinc oxide (IZO) for forming a pixel electrode. The second conductive layer may include aluminum (Al), aluminum alloy, tungsten (W), copper (Cu), and chromium (Cr) to form a gate electrode, a gate line, and a data line. ), A low resistance opaque conductive material such as molybdenum (Mo) may be used.

Next, as illustrated in FIG. 4B, the gate electrode 121, the gate line 116, the data line 117, and the first conductive layer are selectively patterned by using a photolithography process. One pixel electrode 150B is formed.

In this case, the gate electrode 121 is composed of a first gate electrode pattern 150A made of a transparent first conductive film and a second gate electrode pattern 160A made of an opaque second conductive film. The pixel electrode pattern 160B made of an opaque second conductive film having the same shape as the first pixel electrode 150B remains on the first pixel electrode 150B.

In addition, the gate line 116 includes a first gate line pattern 150C made of a transparent first conductive film and a second gate line pattern 160C made of an opaque second conductive film, and the data line 117. ) Is composed of a first data line pattern 150D made of a transparent first conductive film and a second data line pattern 160D made of an opaque second conductive film. At this time, the data line 117 has a data line 117 of a predetermined region crossing the gate line 116 to prevent a short circuit at an intersection where the gate line 116 and the data line 117 intersect. The groove 170 for disconnecting the wires is formed.

Meanwhile, in the present embodiment, the gate electrode 121, the gate line 116, and the data line 117 are formed as the double metal layer as described above, but the present invention is not limited thereto. The single metal layer may be formed of a transparent or opaque conductive material. The gate electrode 121, the gate line 116, and the data line 117 may be formed.

Thereafter, impurity ions are implanted into a predetermined region of the active pattern 120A using the gate electrode 121 as a mask to form a source region 124A and a drain region 124B, which are ohmic contact layers. In this case, the gate electrode 121 serves as an ion stopper to prevent the dopant from penetrating into the channel region 124C of the active pattern 120A.

The electrical characteristics of the active pattern 120A are changed according to the type of dopant to be implanted. If it is a group element, it operates as an N-type thin film transistor.

In this case, a process of activating the dopant implanted after the ion implantation process may be performed.

Next, as shown in FIG. 4C, a second insulating film 115B is deposited on the entire surface of the substrate 110 on which the gate electrode 121, the gate line 116, and the data line 117 are formed, and then diffraction exposure and A disconnection connection electrode connecting the source / drain electrodes 122 and 123 connected to the source / drain regions 124A and 124B and the disconnected data line 117 in one photolithography process through a lift-off process ( 180B).

The second insulating layer 115B may be formed of a transparent organic insulating material such as benzocyclobutene (BCB) or acrylic resin (resin) for high opening ratio.

At this time, a part of the drain electrode 123 extends toward the pixel region to constitute the second pixel electrode 180A, and the source / drain electrodes 122 and 123 and the second pixel electrode 180A and the disconnection connection electrode 180B may reduce the number of mask processes by simultaneously forming a transparent conductive material, which will be described in detail with reference to the accompanying drawings.

5A through 5E are cross-sectional views specifically illustrating diffraction exposure and lift-off processes for forming a disconnection connection electrode, a source / drain electrode, and a pixel electrode in FIG. 4C.

As shown in FIG. 5A, after forming the photosensitive film 170 made of a photosensitive material such as a photoresist on the entire surface of the substrate 110 on which the second insulating film 115 is formed, the diffraction mask ( Light is selectively irradiated to the photosensitive film 170 through 180.

In this case, in the case of using the positive photoresist as in the present embodiment, the diffraction mask 180 is applied with a blocking region A1 for blocking all of the irradiated light and a slit pattern to block only a part of the light. A transmissive area A3 is formed to transmit all of the light, and only light transmitted through the mask 180 is irradiated to the photosensitive film 170.

Subsequently, after developing the photosensitive film 170 exposed through the diffraction mask 180, as shown in FIG. 5B, light is blocked or partially blocked through the blocking area A1 and the slit area A2. The photoresist patterns 170A and 170B having a predetermined thickness remain in the region, and the photoresist layer 170 is completely removed in the transmission region A3 through which all the light is transmitted, thereby exposing the surface of the second insulating layer 115B.

In this case, the second photoresist pattern 170B formed through the slit region A2 is thinner than the first photoresist pattern 170A formed in the blocking region A1, and all light is transmitted through the transmission region A3. The photoresist film 170 is completely removed in the region because the positive photoresist is used, and the present invention is not limited thereto, and a negative photoresist may be used.

Next, when the first photoresist film pattern 170A and the second photoresist film pattern 170B formed as described above are used as masks and the second insulating film 115B and the first insulating film 115A formed thereunder are removed, the active pattern A pair of first contact holes 140A exposing a portion of the source / drain regions 124A and 124B of 120A is formed, and data is disconnected when the second insulating film 115B and the second conductive film are selectively removed. The second contact hole 140B and the third contact hole 140C exposing portions of both ends of the line 117 (in detail, the first data line pattern 150D constituting the disconnected data line 117). At the same time, the opaque pixel electrode pattern 160B remaining on the pixel electrode 150B is removed to expose the first pixel electrode 150B made of a transparent second conductive film. In this case, instead of using a separate mask, the pixel electrode pattern is formed in the pixel area in the process of forming the contact holes 140A to 140C, and then the etching process of the second insulating film 115B and the second conductive film is performed without using a mask. To proceed.

In this case, when the gate electrode 121, the gate line 116, and the data line 117 are formed of a double metal layer made of a transparent conductive material and an opaque conductive material as in the present embodiment, the pixel region in which the image is displayed as described above. The opaque conductive film (ie, the pixel electrode pattern 160B made of the second conductive film) must be removed. However, when the transparent metal material is formed of a single metal layer, it is not necessary to proceed with the removal of the conductive film in the pixel region.                     

In this embodiment, the first pixel electrode 150B constituting the pixel electrode is formed by leaving a transparent first conductive film in the pixel region. However, the source / drain electrode and the disconnection line are made of a transparent conductive material through a lift-off process to be described later. Since the second connection electrode and the pixel electrode are formed, the first conductive layer may also be removed to improve the transparency of the pixel region.

Subsequently, when the ashing process is performed to remove a portion of the photoresist patterns 170A and 170B, as shown in FIG. 5C, a diffraction exposure is formed on a predetermined region where a source / drain electrode and a disconnection connection electrode are to be formed. The second photoresist layer pattern 170B of the applied slit region A2 is completely removed to expose the surface of the second insulating layer 115B.

In this case, the first photoresist pattern 170A is a third photoresist pattern 170A 'having the thickness of the second photoresist pattern 170B removed, so that the conductive layer does not need to be formed to correspond to the blocking region A1. Only the upper part of the predetermined area remains.

Subsequently, as illustrated in FIG. 5D, the third conductive layer 180 is formed of a transparent conductive material over the entire surface of the substrate 110 including the remaining third photoresist pattern 170A '.

At this time, the slit region A2 (that is, the predetermined region in which the source / drain electrode and the disconnection connection electrode are formed) and the transmission region A3 (that is, the contact hole, in which the photoresist pattern 170A 'is not left below) are formed. The third conductive layer 180 of the 140A to 140C and the predetermined region in which the pixel electrode is formed is not removed through the lift-off process to be described later, and remains in the source / drain region connected to the source / drain regions 124A and 124B. A disconnection connecting electrode connecting an electrode and both ends of the disconnected data line 117 and a pixel electrode connected to the drain electrode are formed.                     

That is, as shown in FIG. 5E, the third photoresist layer pattern 170A 'on which the third conductive layer 180 is deposited is lifted off to remain in portions other than the slit region A2 and the transmission region A3. The third photoresist pattern 170A 'and the third conductive layer 180 formed on the third photoresist pattern 170A' are removed together. At this time, the source / drain electrodes 122 connected to the source / drain regions 124A and 124B without remaining the third conductive layer 180 are not removed in the slit region A2 in which the third photoresist pattern 170A 'does not remain. And a disconnection part connecting electrode 180B connecting the both ends of the disconnected data line 117 and the second pixel electrode 180A connected to the drain electrode 123.

In this case, the third conductive layer 180 constituting the second pixel electrode 180A is formed of a transparent conductive material as described above to form the pixel electrode together with the first pixel electrode 150B formed of the first conductive layer. A part of the source electrode 122 is connected to a disconnection part connecting both ends of the data line 117 disconnected through the third conductive layer 180 formed in the second contact hole and the third contact hole. The electrode 180B is formed.

The lift-off process is a process of forming a conductive film on a photosensitive material such as a photoresist to a predetermined thickness and then depositing it in a solution such as a stripper to remove the photosensitive material on which the metal material is deposited, simultaneously with the metal material. At this time, the conductive film in the region in which the photosensitive material is not left below is not removed, and thus, the source / drain electrode, the disconnection part connecting electrode, and the pixel electrode are formed as in the present embodiment.

Meanwhile, in the present embodiment, a case in which the data line of the intersection portion where the gate line and the data line intersect is disconnected in order to prevent the gate line and the data line from crossing and shorting, but the present invention is not limited thereto. The gate line of the intersection may be disconnected, which will be described in detail with reference to the second embodiment.

6 is a plan view illustrating a portion of an array substrate of a liquid crystal display according to a second exemplary embodiment of the present invention.

In this case, in the liquid crystal display of the present embodiment, the gate line of the intersection part is disconnected at the intersection where the gate line and the data line intersect, and the disconnection part simultaneously patterned in the process of forming the source / drain electrode and the pixel electrode in a later process. Except that the disconnected gate line is connected via a connection electrode, it is the same configuration as the liquid crystal display device of the first embodiment.

As shown in the figure, a gate line 216 and a data line 217 are formed on the array substrate 210 to be vertically and horizontally arranged on the substrate 210 to define a pixel area. In addition, a thin film transistor, which is a switching element, is formed in an intersection area of the gate line 216 and the data line 217, and is connected to the thin film transistor in the pixel area and is connected to a common electrode of a color filter substrate (not shown). In addition, a pixel electrode 280A for driving a liquid crystal (not shown) is formed.

The thin film transistor includes a gate electrode 221 connected to the gate line 216, a source electrode 222 connected to the data line 217, and a drain electrode 223 connected to the pixel electrode 280A. In addition, the thin film transistor is supplied to a first insulating film (not shown), a second insulating film (not shown), and the gate electrode 221 for insulating the gate electrode 221 and the source / drain electrodes 222 and 223. The active layer 220A forms a conductive channel between the source electrode 222 and the drain electrode 223 by the gate voltage.

In this case, the gate line 216 and the data line 217 are simultaneously patterned and formed on the same layer in order to reduce the mask process used for fabrication of the thin film transistor. In the present embodiment, the gate line 216 and the data line 217 are formed on the same layer. In order to prevent a short circuit at an intersection where the lines 217 intersect, a predetermined region of the gate line 216 of the intersection is disconnected.

Meanwhile, a second pair of first contact holes 240A exposing a portion of the source / drain regions of the active layer 220A and a portion of the data line 217 are exposed in the first insulating film and the second insulating film. A pair of third contact holes 240C exposing a contact hole 240B and a part of both ends of the disconnected gate line 216 are formed, and the source electrode (240A) is formed through the first contact hole 240A. A portion of the 222 is electrically connected to the source region and a portion of the drain electrode 223 is electrically connected to the drain region. The other part of the source electrode 222 is electrically connected to the data line 217 through the second contact hole 240B, and the other part of the drain electrode 223 extends toward the pixel area to extend the pixel electrode. 280A. In addition, the disconnection connection electrode 280B is connected to the right end of the disconnected gate line 216 of the nx (m-1) -th pixel portion and the disconnected gate line 216 of the nxm-th pixel portion through the third contact hole 240C. The left end of) is electrically connected.

As described above, in the present embodiment, the gate electrode 221, the gate line 216, and the data line 217 are simultaneously formed on the same layer, thereby reducing the number of masks used for fabricating the thin film transistor. Likewise, at the intersection where the gate line 216 and the data line 217 intersect, the gate line 216 of the intersection is disconnected to prevent a short circuit, and the source / drain electrodes 222 and 223 are formed later. In the process, the disconnection gate electrode 280B is simultaneously formed to connect the disconnected gate line 216, which will be described in detail through the following manufacturing process of the liquid crystal display device.

7A to 7C are exemplary views sequentially illustrating a manufacturing process along the line VI-VI ′ of the liquid crystal display shown in FIG. 6.

As shown in FIG. 7A, an active pattern 220A made of a silicon layer is formed on a substrate 210 made of a transparent insulating material such as glass.

Thereafter, a first insulating film 215A, a first insulating film, and a second conductive film, which are gate insulating films, are sequentially formed on the entire surface of the substrate 210.

In this case, the first conductive layer uses a transparent conductive material having excellent transmittance such as indium tin oxide or indium zinc oxide to form a pixel electrode, and the second conductive layer comprises a gate electrode, a gate line, and a data line. Low resistance opaque conductive materials such as aluminum, aluminum alloys, tungsten, copper, chromium, molybdenum and the like may be used for construction.

Next, as shown in FIG. 7B, the gate electrode 221, the gate line 216, the data line 217, and the first conductive film are selectively patterned by using a photolithography process. One pixel electrode 250B is formed.                     

In this case, the gate electrode 221 is composed of a first gate electrode pattern 250A made of a transparent first conductive film and a second gate electrode pattern 260A made of an opaque second conductive film. The pixel electrode pattern 260B made of an opaque second conductive film having the same shape as the first pixel electrode 250B remains on the first pixel electrode 250B.

In addition, the gate line 216 includes a first gate line pattern 250C made of a transparent first conductive film and a second gate line pattern 260C made of an opaque second conductive film, and the data line 217. ) Is composed of a first data line pattern 250D made of a transparent first conductive film and a second data line pattern 260D made of an opaque second conductive film. In this case, the gate line 216 has a gate line 216 of a predetermined region crossing the data line 217 to prevent a short circuit at an intersection where the gate line 216 and the data line 217 intersect. A groove 270 for disconnecting the wires is formed.

Thereafter, impurity ions are implanted into a predetermined region of the active pattern 220A using the gate electrode 221 as a mask to form a source region 224A and a drain region 224B, which are ohmic contacts.

Next, as shown in FIG. 7C, a second insulating film 215B is deposited on the entire surface of the substrate 210 on which the gate electrode 221, the gate line 216, and the data line 217 are formed. A disconnection connection electrode connecting the source / drain electrodes 222 and 223 connected to the source / drain regions 224A and 224B and the disconnected gate line 216 in one photolithography process through a lift-off process ( 280B) (see FIGS. 5A to 5E of the first embodiment).

In this case, a part of the drain electrode 223 extends toward the pixel region to constitute the second pixel electrode 280A, and the source / drain electrodes 222 and 223 and the second pixel electrode 280A and the disconnection connection electrode 280B may reduce the number of mask processes by simultaneously forming a transparent conductive material.

As described above, in the manufacturing process of the liquid crystal display device according to the first and second embodiments, the diffraction exposure and the lift-off are performed in the process of simultaneously patterning the gate electrode, the gate line, and the data line, and forming the source / drain electrode in the subsequent process. By simultaneously forming the disconnection connection electrode connecting the disconnected gate line or data line through the process, it is possible to reduce two mask processes compared to the conventional manufacturing process. As a result, an increase in yield and a reduction in manufacturing cost are provided due to the simplification of the manufacturing process.

On the other hand, in general, the pixel electrode of the array substrate forms a liquid crystal capacitor together with the common electrode of the color filter substrate. The voltage applied to the liquid crystal capacitor is not maintained until the next signal is input and leaks away. Therefore, in order to maintain the applied voltage, a storage capacitor must be connected to the liquid crystal capacitor.

The storage capacitor has effects such as stabilization of gray scale display, reduction of flicker and afterimage, in addition to signal retention, and an embodiment of the liquid crystal display device of the present invention including the storage capacitor as described above. The following is the description.

FIG. 8 is a plan view illustrating a portion of an array substrate of a liquid crystal display according to a third exemplary embodiment of the present invention, and illustrates an array substrate having a storage capacitor formed in the center of a pixel area.

In this case, the third embodiment has the same configuration as the liquid crystal display of the first embodiment shown in FIG. 3 except for the storage capacitor.

That is, as shown in the figure, a gate line 316 and a data line 317 are formed on the array substrate 310 to be vertically and horizontally arranged on the substrate 310 to define a pixel area. In addition, a thin film transistor as a switching element is formed in an intersection region of the gate line 316 and the data line 317, and a pixel electrode 380A connected to the thin film transistor is formed in the pixel region.

The thin film transistor includes a gate electrode 321 connected to the gate line 316, a source electrode 322 connected to the data line 317, and a drain electrode 323 connected to the pixel electrode 380A. The thin film transistor is supplied to a first insulating film (not shown), a second insulating film (not shown), and the gate electrode 321 for insulating the gate electrode 321 and the source / drain electrodes 322 and 323. The active pattern 320A forms a conductive channel between the source electrode 322 and the drain electrode 323 by the gate voltage.

As in the first embodiment described above, at the intersection where the gate line 316 and the data line 317 intersect, the data line 317 of the intersection is disconnected to prevent a short circuit, and a source / drain electrode of a later process ( In the process of forming the 322 and 323, the disconnection part connection electrode 380B is simultaneously formed to connect the disconnected data line 317.

In this case, the storage line 330C is formed in a direction parallel to the gate line 316, and the storage line 330C overlaps the pixel electrode 380A in the pixel area to form a storage capacitor. Together with 330B, storage wirings 330B and 330C are configured. That is, the first storage electrode 330B forms a storage capacitor with the pixel electrode 380A, which is a transparent electrode, with a first insulating film interposed therebetween.

The storage wirings 330B and 330C of the present embodiment may be formed of a conductive metal layer and may be applied to a line inversion driving method requiring low resistance as well as dot inversion. Since the pattern is formed at the same time as the pattern 320A, an additional mask process is not required. This will be described in detail through the following manufacturing process of the liquid crystal display device.

9A to 9C are cross-sectional views sequentially illustrating a manufacturing process along a line VIII-VIII ′ of the liquid crystal display shown in FIG. 8, and FIGS. 10A to 10C illustrate a manufacturing process of the liquid crystal display shown in FIG. 8. Top view.

9A and 10A, an active pattern 320A and a storage wiring (that is, a first storage electrode 330B and a storage line) to be used as a channel layer on a substrate 310 made of a transparent insulating material such as glass. 330C)).

The storage wirings 330B and 330C including the first storage electrode 330B are diffracted exposure (ie, a diffraction mask or a half-tone mask) when the active pattern 320A is formed. By applying this can be formed simultaneously without the addition of a mask process, which will be described in detail as follows.

11A to 11D are cross-sectional views specifically illustrating a process of simultaneously forming an active pattern and a storage wiring by using the first diffraction exposure in FIG. 9A.

First, as shown in FIG. 11A, a silicon layer 320 to be used as a channel layer is formed on a substrate 310 made of a transparent insulating material such as glass.

Thereafter, a first conductive layer 330 for forming the storage wirings 330B and 330C is formed on the silicon layer 320. The first conductive layer 330 may be formed of a low resistance conductive material such as aluminum, aluminum alloy, tungsten, copper, chromium, molybdenum, or the like.

Next, as shown in FIG. 11B, after the photosensitive film 370 is formed on the substrate 310 on which the silicon layer 320 and the first conductive film 330 are sequentially formed, the diffraction mask of the present embodiment ( Light is selectively irradiated to the photosensitive film 370 through 380.

At this time, the diffraction mask 380 used in the present embodiment is applied with a blocking area A1 for blocking all of the irradiated light and a slit pattern to block only part of the light, and a transmission area for transmitting all of the light (A3). ) Is provided, and only light transmitted through the mask 380 is irradiated to the photosensitive film 370.

Subsequently, after the photosensitive film 370 exposed through the diffraction mask 380 is developed, as shown in FIG. 11C, light is blocked or partially blocked through the blocking area A1 and the slit area A2. The photoresist patterns 370A and 370B having a predetermined thickness remain in the region, and the photoresist layer 170 is completely removed in the transmission region A3 through which all the light is transmitted, thereby exposing the surface of the first conductive layer 330.

In this case, the second photoresist pattern 370B formed through the slit region A2 is formed to be thinner than the first photoresist pattern 370A formed in the blocking region A1 and the light is blocked through the transmission region A3. The photoresist film 370 is completely removed. This is because a positive photoresist is used, and the present invention is not limited thereto, and a negative photoresist may be used.

Next, when the first photosensitive film pattern 370A and the second photosensitive film pattern 370B formed as described above are used as masks, the first conductive film 330 and the silicon layer 320 formed thereunder are selectively removed. The active pattern 320A and the first storage electrode 330B are patterned on the array substrate 310.

In this case, the first conductive layer pattern 330A patterned in the same shape remains on the active pattern 320A formed of the silicon layer, and the first conductive layer pattern 330A remaining on the active pattern 320A is It may be removed through an ashing process and an etching process to be described later.

That is, when the ashing process of removing a part of the photoresist patterns 370A and 370B is performed, as shown in FIG. 11D, the active pattern 320A, that is, the slit region A2 to which diffraction exposure is applied, is formed. The second photoresist layer pattern 370B is completely removed to expose the surface of the first conductive layer pattern 330A.

In this case, the first photoresist pattern 370A is a third photoresist pattern 370A 'having the thickness of the second photoresist pattern 370B removed, and the first storage electrode 330B corresponding to the blocking region A1. ) Will remain on top only.

Thereafter, the first conductive layer pattern 330A on the active pattern 320A is selectively removed using the remaining third photoresist layer pattern 370A 'as a mask.

After removing the third photoresist pattern 370A ′ remaining on the first storage electrode 330B, as shown in FIG. 9A, an active pattern formed of a silicon layer on the array substrate 310 is formed. The first storage electrode 330B formed of 320A and the first conductive layer is formed. That is, the active pattern 320A and the storage wirings 330B and 330C can be simultaneously formed in one photolithography process using diffraction exposure.

Meanwhile, the storage wirings 330B and 330C of the present embodiment may be formed of a low resistance metal layer, and thus may be applied to a line inversion driving method requiring low resistance as well as dot inversion as described above.

In addition, the pixel electrode 350B forms a storage capacitor through the first insulating layer 315A by overlapping a portion of the lower first storage electrode 330B with a first insulating layer 315A interposed therebetween. Since 315A is interposed, sufficient capacitor capacity can be ensured.

Thereafter, a first insulating film 315A, a first insulating film, and a second conductive film, which are gate insulating films, are sequentially formed on the entire surface of the substrate 310.

In this case, the first conductive layer may be formed of a transparent conductive material having excellent transmittance such as indium tin oxide or indium zinc oxide, and the second conductive layer may include aluminum for forming a gate electrode, a gate line, and a data line. Low resistance opaque conductive materials such as aluminum alloy, tungsten, copper, chromium, molybdenum and the like can be used.

Next, as shown in FIGS. 9B and 10B, the gate electrode 321, the gate line 316, and the data line 317 are selectively patterned by selectively patterning the first conductive layer and the second conductive layer using a photolithography process. ) And pixel electrode patterns 350B and 360B.

In this case, the gate electrode 321 includes a first gate electrode pattern 350A made of a transparent first conductive film and a second gate electrode pattern 360A made of an opaque second conductive film.

In addition, the gate line 316 includes a first gate line pattern 350C made of a transparent first conductive film and a second gate line pattern 360C made of an opaque second conductive film, and the data line 317. ) Is composed of a first data line pattern 350D made of a transparent first conductive film and a second data line pattern 360D made of an opaque second conductive film. In this case, the data line 317 has a data line 317 of a predetermined region crossing the gate line 316 to prevent a short circuit at an intersection where the gate line 316 and the data line 317 intersect. A groove 370 for disconnecting the wires is formed.

Meanwhile, in the present exemplary embodiment, the gate electrode 321, the gate line 316, and the data line 317 are formed as the double metal layer, but the present invention is not limited thereto. The single metal layer may be formed of a transparent or opaque conductive material. The gate electrode 321, the gate line 316, and the data line 317 may be formed.

Thereafter, impurity ions are implanted into a predetermined region of the active pattern 320A using the gate electrode 321 as a mask to form a source region 324A and a drain region 324B, which are ohmic contacts.

Next, as illustrated in FIGS. 9C and 10C, after the second insulating layer 315B is deposited on the entire surface of the substrate 310 on which the gate electrode 321, the gate line 316, and the data line 317 are formed. Disconnection unit connecting the source / drain electrodes 322 and 323 connected to the source / drain regions 324A and 324B and the disconnected data line 317 in one photolithography process through diffraction exposure and lift-off process. The connecting electrode 380B is formed.

In this case, a part of the drain electrode 323 extends toward the pixel region to constitute the pixel electrode 380A, and the source / drain electrodes 322 and 323, the pixel electrode 380A, and the disconnection part connecting electrode 380B By simultaneously forming a transparent conductive material, the number of mask processes can be reduced, which will be described in detail with reference to the accompanying drawings.

12A to 12E are cross-sectional views specifically illustrating a second diffraction exposure and a lift-off process for forming a disconnection part connection electrode, a source / drain electrode, and a pixel electrode in FIG. 9C.

As shown in FIG. 12A, after the photoresist film 470 is formed on the entire surface of the substrate 310 on which the second insulating film 315 is formed, the photoresist film 470 is selectively selected through the diffraction mask 480 of the present embodiment. Irradiate light with

In this case, in the case of using a positive photoresist as in the present embodiment, the diffusing mask 480 is provided with a blocking region A1 for blocking all of the irradiated light and a slit pattern for transmitting only a portion of the light. And a transmission region A1 through which all of the light is transmitted, and only the light passing through the mask 480 is irradiated onto the photosensitive film 470.

Subsequently, after the photosensitive film 470 exposed through the diffraction mask 480 is developed, as shown in FIG. 12B, light is blocked or partially blocked through the blocking area A1 and the slit area A2. The photoresist patterns 470A and 470B having a predetermined thickness remain in the region, and the photoresist layer 470 is completely removed in the transmission region A3 through which all the light is transmitted, thereby exposing the surface of the second insulating layer 315B.

In this case, the second photoresist pattern 470B formed through the slit region A2 is formed to be thinner than the first photoresist pattern 470A formed in the blocking region A1 and the light is blocked through the transmission region A3. The photosensitive film 470 is completely removed. This is because a positive photoresist is used, and the present invention is not limited thereto, and a negative photoresist may be used.

Next, if the first photoresist pattern 470A and the second photoresist pattern 470B formed as described above are used as masks and the second insulating film 315B and the first insulating film 315A formed thereunder are removed, the active pattern A pair of first contact holes 340A exposing portions of the source / drain regions 324A and 324B of 320A are formed, and the second insulating film 315B, the second conductive film, and the first conductive film are selectively removed. The second contact hole 340B and the third contact hole 340C exposing portions of both ends of the disconnected data line 317 (in detail, an inner side surface of the disconnected data line 317) are formed. At the same time, the pixel electrode patterns 350B and 360B remaining in the pixel region are removed to expose the first insulating layer 315A.

In this embodiment, unlike the first and second embodiments, the first conductive film in the pixel region is also removed to expose the surface of the first insulating film 315A. Since the pixel electrode is formed in the process of forming the source / drain electrode and the disconnection part connecting electrode with the transparent conductive material, the transparency of the pixel region is improved as compared with the first and second embodiments.

Subsequently, when the ashing process is performed to remove a portion of the photoresist patterns 470A and 470B, as shown in FIG. 12C, a diffraction exposure is formed on a predetermined region where a source / drain electrode and a disconnection connection electrode are to be formed. The second photoresist pattern 470B of the applied slit region A2 is completely removed to expose the surface of the second insulating layer 315B.

In this case, the first photoresist pattern 470A is a third photoresist pattern 470A 'having the thickness of the second photoresist pattern 470B removed, so that the conductive layer does not need to be formed to correspond to the blocking region A1. Only the upper part of the predetermined area remains.

Thereafter, as shown in FIG. 12D, the third conductive layer 380 is formed of a transparent conductive material over the entire surface of the substrate 310 including the remaining third photoresist pattern 470A '.

At this time, the slit region A2 (that is, a predetermined region in which the source / drain electrode and the disconnection electrode are formed) and the transmissive region A3 (that is, the contact region where no photoresist pattern 470A 'remains) (440A to 440C and the predetermined region where the pixel electrode is formed), the third conductive layer 380 remains unremoved through a lift-off process to be described later and remains source / drain connected to the source / drain regions 324A and 324B. A disconnection connection electrode connecting the electrodes and both ends of the disconnected data line 317 and a pixel electrode connected to the drain electrode are formed.

That is, as shown in FIG. 12E, the third photoresist pattern 470A 'on which the third conductive layer 380 is deposited is lifted off to remain in portions other than the slit region A2 and the transmission region A3. The third photoresist pattern 470A 'and the third conductive layer 380 formed on the third photoresist pattern 470A' are removed together. In this case, the source / drain electrode 322 connected to the source / drain regions 324A and 324B without remaining the third conductive layer 380 is not removed in the slit region A2 in which the third photoresist pattern 470A 'does not remain. And a disconnection part connecting electrode 380B connecting the both ends of the disconnected data line 317 and a pixel electrode 380A connected to the drain electrode 323.

In this case, a part of the source electrode 322 is a disconnection connection electrode connecting the both ends of the data line 317 disconnected through the third conductive layer 380 formed in the second contact hole and the third contact hole ( 380B).

A portion of the pixel electrode 380A overlaps with the first storage electrode 330B formed at the lower portion of the pixel region to form a storage capacitor with the first insulating layer 315A therebetween.

As described above, in the present embodiment, when the active pattern is formed, the first storage electrode for the capacitor is formed of a metal material using diffraction exposure, thereby ensuring sufficient capacitor capacity without an additional mask process.                     

In particular, since the first storage electrode and the storage line are formed of a low resistance metal material, the first storage electrode and the storage line may be applied to a line inversion driving method requiring low resistance as well as dot inversion.

Many details are set forth in the foregoing description but should be construed as illustrative of preferred embodiments rather than to limit the scope of the invention. Therefore, the invention should not be defined by the described embodiments, but should be defined by the claims and their equivalents.

As described above, the liquid crystal display device and the method of manufacturing the same according to the present invention are characterized in that the disconnected gate line or data line in the process of patterning the gate electrode, the gate line and the data line at the same time and forming a source / drain electrode in a later process. Simultaneous formation of the connecting electrode for connecting disconnection reduces the number of masks used in the manufacture of thin film transistors, thereby reducing the manufacturing process and cost.

In addition, the present invention by using the diffraction exposure to form the active pattern and the storage wiring at the same time it is possible to ensure a stable storage capacity without an additional mask process.

Claims (31)

Providing a substrate; Forming an active pattern on the substrate, the active pattern being divided into a source region, a drain region, and a channel region; Forming a first insulating film on the entire surface of the substrate; Forming a gate electrode, a gate line, and a data line on the substrate at the same time, wherein the gate line and the data line intersect to define a pixel region, and at the intersection, disconnect the gate line or data line; Forming a second insulating film on the entire surface of the substrate; And Forming a source electrode connected to the source region and a drain electrode connected to the drain region on the substrate and simultaneously forming a connection electrode connecting the disconnected gate line or data line to the source region; . The method of claim 1, wherein the forming of the gate electrode, the gate line, and the data line is performed. Sequentially forming a first conductive film and a second conductive film on the substrate; And Patterning the second conductive film and the first conductive film to form a gate electrode, a gate line, and a data line formed of a double metal layer of the first conductive film and the second conductive film, wherein the liquid crystal display device is manufactured. Way. The method of claim 2, wherein the first conductive layer is formed of a transparent conductive material and the second conductive layer is formed of an opaque conductive material. The method of claim 2, wherein the forming of the gate electrode, the gate line, and the data line is performed by patterning the second conductive layer and the first conductive layer in the pixel region, wherein the second conductive layer is formed of a double metal layer of the first conductive layer and the second conductive layer. A method of manufacturing a liquid crystal display device comprising the step of forming a pixel electrode. The method of claim 1, wherein the forming of the source electrode, the drain electrode, and the connection electrode is performed. Forming a photoresist film on the second insulating film; A first photosensitive film pattern having a first thickness is formed in the first region by applying a mask having a first transmission region for transmitting all the light, a second transmission region for transmitting only a part of the light, and a blocking region for blocking the light, thereby forming a first photoresist pattern having a first thickness. Forming a second photoresist pattern having a second thickness in the region; By using the first photoresist pattern and the second photoresist pattern as masks, a pair of first contact holes for exposing a portion of the source / drain region is formed by removing a portion of the second insulating layer and the first insulating layer, and forming the first contact hole. Removing a portion of the second insulating layer and the second conductive layer to form a second contact hole and a third contact hole exposing portions of both ends of the disconnected data line; Completely removing the second photoresist pattern and simultaneously removing a portion of the first photoresist pattern to form a third photoresist pattern having a third thickness; Forming a third conductive layer on the entire surface of the substrate including the contact hole; The third conductive layer on the third photoresist layer pattern is removed together with the third photoresist layer pattern, and the remaining third conductive layer forms a source electrode connected to a source region and a drain electrode connected to a drain region. And forming a connection electrode for connecting the data lines. The method of claim 1, wherein the forming of the source electrode, the drain electrode, and the connection electrode is performed. Forming a photoresist film on the second insulating film; A first photosensitive film pattern having a first thickness is formed in the first region by applying a mask having a first transmission region for transmitting all the light, a second transmission region for transmitting only a part of the light, and a blocking region for blocking the light, thereby forming a first photoresist pattern having a first thickness. Forming a second photoresist pattern having a second thickness in the region; The first photoresist pattern and the second photoresist pattern are used as masks to form a pair of first contact holes exposing a portion of the source / drain region by removing a portion of the second insulating layer and the first insulating layer, and Removing a portion of the second insulating layer and the second conductive layer to form a second contact hole exposing a portion of the data line, and forming a pair of third contact holes exposing portions of both ends of the disconnected gate line; ; Completely removing the second photoresist pattern and simultaneously removing a portion of the first photoresist pattern to form a third photoresist pattern having a third thickness; Forming a third conductive layer on the entire surface of the substrate including the contact hole; The third conductive layer on the third photoresist layer pattern is removed together with the third photoresist layer pattern, and the remaining third conductive layer forms a source electrode connected to a source region and a drain electrode connected to a drain region. And forming a connection electrode connecting the gate lines to each other. The liquid crystal display device of claim 5 or 6, wherein the third photoresist film pattern on which the photoresist film pattern remains and the third conductive film on the third photoresist film pattern are removed together using a lift-off process. Way. The method of claim 5 or 6, wherein the diffraction mask is a diffraction pattern is formed in a second transmission region that transmits only a portion of the light to form a second photosensitive film pattern of a second thickness thinner than the first thickness on the second region A method of manufacturing a liquid crystal display device, characterized in that. The method of claim 5, wherein contact holes are formed in the third region where the photoresist patterns do not remain, using the photoresist patterns as a mask, and a portion of the second insulating layer and the second conductive layer of the pixel region are removed. A method of manufacturing a liquid crystal display device, comprising forming a first pixel electrode made of a first conductive film. The method of claim 5 or 6, wherein the first photosensitive film pattern having a first thickness is formed in the first region where the source / drain electrodes, the connection electrode, and the pixel electrode are not formed by applying the diffraction mask. Method of manufacturing a liquid crystal display device. The second photosensitive film pattern of claim 5 or 6, wherein the second photoresist layer pattern having a second thickness is formed in the second region where the source / drain electrode and the connection electrode except the contact hole region are formed by applying the diffraction mask. Method of manufacturing a liquid crystal display device. The method of claim 1, wherein the forming of the active pattern is performed. Forming a silicon layer on the entire surface of the substrate; Forming a first conductive film on the silicon layer; Applying a diffraction mask to form a first photoresist pattern having a first thickness in a first region, and forming a second photoresist pattern having a second thickness in a second region; By selectively removing the first conductive layer and the silicon layer using the first photoresist layer pattern and the second photoresist layer pattern as a mask, a storage wiring formed of the first conductive layer is formed in the first region, and the silicon layer is formed in the second region. Forming an active pattern; Completely removing the second photoresist pattern and simultaneously removing a portion of the first photoresist pattern to form a third photoresist pattern having a third thickness; And And removing the first conductive film remaining on the active pattern using the third photoresist pattern as a mask. The method of claim 12, wherein forming the first photoresist pattern and the second photoresist pattern Applying a photosensitive film on the first conductive film; Irradiating light to the photosensitive film through a diffraction mask provided with a first transmission region for transmitting all the light, a second transmission region for transmitting only a part of the light, and a blocking region for blocking the light; And Developing a photoresist film irradiated with light through the mask to form a photoresist pattern on the first conductive layer, wherein a first photoresist pattern having a first thickness is formed in a first region, and a second thickness having a second thickness in a second region; 2. A method of manufacturing a liquid crystal display device comprising the step of forming a photosensitive film pattern. The method of claim 13, wherein the diffraction mask is a diffraction pattern is formed in a second transmissive region that transmits only a portion of the light to form a second photosensitive film pattern of a second thickness thinner than the first thickness on the second region. Method of manufacturing a liquid crystal display device. The method of claim 13, wherein the removing of the second photoresist pattern comprises a ashing process to completely remove the second photoresist. The method of claim 15, wherein a part of the first photoresist pattern is removed by the ashing process to form a third photoresist pattern having a third thickness by removing a portion of the first photoresist pattern. . The method of claim 12, wherein the storage wiring comprises a storage electrode formed under the pixel electrode and overlapping the pixel electrode. 18. The method of claim 17, wherein the storage electrode forms a pixel electrode and a storage capacitor with a first insulating layer interposed therebetween. The liquid crystal display of claim 1, further comprising forming source and drain regions by implanting impurity ions into a predetermined region of the active pattern using the gate electrode as a mask after forming the gate electrode. Method of manufacturing the device. Providing a substrate divided into a first region and a second region; Forming an active pattern in a first region of the substrate and forming a storage wiring in a second region; Forming a first insulating film on the entire surface of the substrate; Forming a gate electrode, a gate line, and a data line on the substrate at the same time, wherein the gate line and the data line intersect to define a pixel region, and at the intersection, disconnect the gate line or data line; Forming a second insulating film on the entire surface of the substrate; And Forming a source electrode connected to the source region and a drain electrode connected to the drain region on the substrate and simultaneously forming a connection electrode connecting the disconnected gate line or data line to the source region; . The method of claim 20, wherein the forming of the active pattern and the storage wiring is performed. Forming a silicon layer on the entire surface of the substrate; Forming a first conductive film on the silicon layer; Applying a diffraction mask to form a first photoresist pattern having a first thickness in the first region and forming a second photoresist pattern having a second thickness in the second region; By selectively removing the first conductive film and the silicon layer using the first photoresist pattern and the second photoresist pattern as a mask, a storage wiring formed of the first conductive film is formed in the first region, and the silicon layer is formed in the second region. Forming an active pattern; Completely removing the second photoresist pattern and simultaneously removing a portion of the first photoresist pattern to form a third photoresist pattern having a third thickness; And And removing the first conductive film remaining on the active pattern using the third photoresist pattern as a mask. Board; A storage wiring including an active pattern formed of a silicon layer and a first conductive layer on the substrate; A first insulating film deposited over the substrate; A gate electrode, a gate line, and a data line simultaneously patterned on the substrate, the gate electrode comprising a second conductive layer and a third conductive layer; A second insulating film formed on the entire surface of the substrate and having contact holes formed therein; And And a source electrode formed on the substrate and connected to a source region through the contact hole, and a drain electrode connected to a drain region. 23. The liquid crystal display device according to claim 22, wherein the storage wiring comprises a double layer in which a first conductive film is formed on the same silicon layer as the active pattern. The liquid crystal display device of claim 23, wherein the storage line comprises a storage electrode formed under the pixel electrode and overlapping the pixel electrode. 25. The liquid crystal display device of claim 24, wherein the storage electrode constitutes the pixel electrode and the storage capacitor with a first insulating layer therebetween. 23. The liquid crystal display device according to claim 22, further comprising a first pixel electrode made of the second conductive film. 23. The liquid crystal display of claim 22, wherein the gate line and the data line are formed on the same layer so that the gate line or the data line is disconnected. 28. The liquid crystal display device according to claim 27, further comprising a connection electrode connecting the disconnected gate line or data line to the same material as the source / drain electrode. 29. The liquid crystal display device according to claim 28, wherein the source / drain electrode and the connection electrode are made of a transparent conductive material. 28. The semiconductor device of claim 27, wherein the contact holes are formed by removing a portion of the second insulating layer and the first insulating layer to expose a portion of the source / drain region. And a second contact hole and a third contact hole exposing a part of both ends of the disconnected data line by removing a part thereof. 28. The method of claim 27, wherein the contact holes remove a portion of the first insulating layer and a portion of the second insulating layer and the second conductive layer to expose a portion of the source / drain region by removing a portion of the second insulating layer and the first insulating layer. And a second contact hole exposing a part of the data line and a third contact hole exposing a part of both ends of the disconnected gate line.

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