KR20060012379A - Semiconductor device package and method for manufacturing the same - Google Patents

Abstract

The present invention relates to a semiconductor device package in which a varistor having excellent surge protection and antistatic characteristics is integrally formed with a light emitting diode, and a method of manufacturing the same. The present invention relates to a substrate 5 and a lower portion of the substrate, the at least one first internal electrode ( 13 and the at least one second internal electrode 14 are mounted on the varistor portion 1 alternately stacked via the varistor material layer 10 and the substrate, and the first terminal and the second terminal are connected to each other. And a first external electrode 3, a second external electrode 4, and a first external electrode, a first internal electrode, and a first terminal are electrically connected. The second external electrode, the second internal electrode, and the second terminal are electrically connected to each other, and a semiconductor device package and a method of manufacturing the same are provided.

Varistors, Light Emitting Diodes, Package

Description

Semiconductor device package and its manufacturing method {SEMICONDUCTOR DEVICE PACKAGE AND METHOD FOR MANUFACTURING THE SAME}

1 is a cross-sectional view of a semiconductor device package according to the present invention,

2 is a perspective view showing a part of a varistor part in which a first internal electrode and a second internal electrode are formed according to the present invention;

3 is a top plan view of a semiconductor device package according to an embodiment of the present invention;

4 is a bottom view of a semiconductor device package according to an embodiment of the present invention;

5 is a circuit diagram of a varistor integrated light emitting diode according to the present invention;

6 is a flowchart illustrating a method of manufacturing a semiconductor device package according to an embodiment of the present invention.

<Description of the symbols for the main parts of the drawings>

1: Varistor part 2: Light emitting diode

3: first external electrode 4: second external electrode

5: alumina substrate 6: mold part

10: varistor material layer 13: first internal electrode

14: second internal electrode 21, 22: connection wire

100: varistor 200: light emitting diode

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device package and a method of manufacturing the same, and more particularly, to a semiconductor device package and a method of manufacturing the same, in which a varistor having excellent surge protection and antistatic properties is integrally formed with a light emitting diode.

Recently, the application fields of light emitting diodes (LEDs) are rapidly increasing in LCD backlights, terminal keypads, camera phone flashlights, automobiles, etc., and in the future, the light emitting diodes may have infinite applications in fields such as lighting requiring high brightness. Therefore, many researches and developments regarding light emitting diodes have been made.

A light emitting diode is a diode that emits light by its energy when electrons in the conduction band transition to recombine with holes in the valence band when a forward voltage is applied to the electrode. Compounds such as gallium arsenide, gallium phosphide, gallium arsenide, and gallium nitride It consists mainly of semiconductors. As described above, the light emitting diode is widely used because of its advantages such as low power, high efficiency, high brightness, and long life, but on the other hand, it is vulnerable to static electricity or reverse voltage.

Conventionally, in order to improve the constant voltage characteristics of such a light emitting diode, a constant voltage diode (zener diode) is connected in parallel to prevent static electricity and packaged integrally in the light emitting diode package, or a separate small compact having excellent surge protection and antistatic characteristics. A chip varistor was connected in parallel with a light emitting diode and mounted on a substrate.

However, the conventional method of packaging a light emitting diode integrally with a zener diode, which is a separate component, or in parallel with a chip varistor, which is a separate passive component, is mounted, and thus, space is limited and the number of processes is increased according to an additional process. And there is a problem such as an increase in the size, manufacturing cost increases due to additional component mounting.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-described problems, and an object of the present invention is to package a varistor integrally with a light emitting diode to reduce the size, to eliminate the need for a separate component mounting process, to reduce space constraints, It is possible to reduce the effort, and at the same time to provide a light emitting diode package having excellent withstand voltage characteristics and a method of manufacturing the same.

The inventors of the present invention provide a light emitting diode having excellent withstand voltage characteristics, the disadvantages of the conventional manufacturing method, that is, the cost of packaging a separate Zener diode with a light emitting diode, the cost of mounting a separate chip varistor in parallel to the substrate, In order to solve the space problem and the like, the varistor material having excellent antistatic properties is pasted, printed on an alumina substrate having excellent reliability and mass production, and formed into a varistor, and then the light emitting diodes are packaged therein. It was.

A semiconductor device package according to the present invention includes a substrate, a varistor portion formed under the substrate, and at least one first internal electrode and at least one second internal electrode alternately stacked via a varistor material layer; A semiconductor device mounted on the substrate and having a first terminal and a second terminal, the first external electrode, the second external electrode, the first external electrode, the first internal electrode, and the first terminal It is electrically connected, and the 2nd external electrode, the 2nd internal electrode, and the 2nd terminal are electrically connected.

In addition, the semiconductor device package according to the present invention preferably further comprises a mold portion for molding the semiconductor device and the upper surface of the substrate from the surface on which the semiconductor device on the substrate is formed. Moreover, it is preferable that a semiconductor element is a light emitting diode.

In addition, the semiconductor device package according to the present invention, the first external electrode includes a first upper electrode formed on the substrate and a first side electrode formed on the side of the substrate, the first upper electrode is connected to the first terminal The first side electrode is connected to the first internal electrode, and the second external electrode includes a second upper electrode formed on an upper portion of the substrate and a second side electrode formed on a side of the substrate, and the second upper electrode is formed of a first upper electrode. It is preferable that it is connected to two terminals, and the 2nd side electrode will be connected with the 2nd internal electrode. The first external electrode may further include a first lower electrode formed under the varistor portion on the lower side of the substrate, and the second external electrode further includes a second lower electrode formed under the varistor portion on the lower side of the substrate. More preferably.

In the method of manufacturing a semiconductor device package according to the present invention, the steps of forming an internal electrode and forming a varistor material layer on one surface of the substrate are repeated, and the first internal electrode and the second internal electrode are interposed with the varistor material layer. By alternately stacking, a varistor part forming step of forming a varistor part on one surface of the substrate, an upper electrode forming step of forming a first upper electrode and a second upper electrode on the other surface of the substrate, and dividing the substrate in a row, By forming the first side electrode and the second side electrode on both side surfaces of the divided substrate, the first upper electrode and the first side electrode are connected to form a first external electrode, and the second upper electrode and the second side electrode. An external electrode forming step of connecting the electrodes to form a second external electrode, mounting a semiconductor device on the other surface of the substrate, and electrically connecting two electrodes of the semiconductor device to the first upper electrode and the second upper electrode, A semiconductor device mounting step, a molding step of molding the mounted semiconductor device, and cutting the substrate to the size of the semiconductor device package unit to manufacture a semiconductor device package.

In addition, the method of manufacturing a semiconductor device package according to the present invention may further include forming a lower electrode on the upper surface of the varistor portion formed on the other surface of the substrate to form a first lower electrode and a second lower electrode. The first external electrode may further include a first lower electrode, and the second external electrode may further include a second lower electrode. In addition, the first side electrode and the second side electrode is preferably formed by dipping both sides of the divided substrate to the metal paste.

In addition, in the method of manufacturing a semiconductor device package according to the present invention, it is preferable that the step of forming the varistor material layer is performed by printing a varistor paste containing ZnO having a solid content of 60-70 wt%.

In the method of manufacturing a semiconductor device package according to the present invention, a varistor including a ZnO having a solid content of 60-70 wt% by forming an internal electrode by printing and drying a metal paste containing silver / palladium on one surface of a substrate. The paste is printed and dried to form a varistor material layer, and the first internal electrode and the second internal electrode are alternately laminated through the varistor material layer to form a varistor part on one surface of the substrate and sintered. A varistor portion forming step, an upper electrode forming step of printing a silver paste on the other surface of the substrate to form an electrode pattern for mounting the first upper electrode, the second upper electrode, and the semiconductor element, and a varistor portion formed on the other surface of the substrate A lower electrode forming step of forming a first lower electrode and a second lower electrode by printing a silver paste on the upper surface; and dividing the substrate by dividing the substrate in a row. The first upper electrode, the first side electrode, and the first lower electrode are connected to form a first external electrode by dipping both side surfaces of the first and second side electrodes by dipping the silver paste. An external electrode forming step of connecting the second upper electrode, the second side electrode, and the second lower electrode to form a second external electrode, and mounting the semiconductor element on an electrode pattern for mounting the semiconductor element; A semiconductor element mounting step of connecting the electrode, the first upper electrode and the second upper electrode, respectively by a connection wire, a molding step of molding the mounted semiconductor element, and cutting the substrate into the size of the semiconductor element package unit Manufacturing the package.

Moreover, in the manufacturing method of the semiconductor element package which concerns on this invention, it is preferable that a semiconductor element is a light emitting diode.

Hereinafter, a semiconductor device package and a method of manufacturing the same according to the present invention will be described with reference to the accompanying drawings. In the following description, a light emitting diode is taken as an example, but it is obvious that the present invention can be applied to other semiconductor devices that require improvement in constant voltage characteristics.

1 is a cross-sectional view of a semiconductor device package according to the present invention. The semiconductor device package includes a varistor unit 1, an alumina substrate 5 stacked on the varistor unit 1, a light emitting diode 2 mounted on the alumina substrate 5, and a first external electrode 3. And a second external electrode 4.

The varistor part 1 includes a plurality of first internal electrodes 13 connected to the first external electrode 3, and a plurality of second internal electrodes 14 connected to the second external electrode 4. The first internal electrodes 13 and the second internal electrodes 14 are alternately stacked via the varistor material layer 10. The structure of such a varistor part 1 is demonstrated with reference to FIG.

2 is a perspective view showing a part of the varistor portion 1 in which the first internal electrode 13 and the second internal electrode 14 are formed according to the present invention. As shown in FIG. 1, the varistor material layer 10 is stacked on the second internal electrode 14, and the first internal electrode 13 is stacked on the varistor material layer 10. By repeating lamination, the varistor part 1 of this invention is formed. Referring to FIG. 1, although the varistor material layer 10 is interposed between the alumina substrate 5 and the uppermost internal electrode 13, the alumina substrate 5 and the internal electrode 13 may form the varistor material layer 10. They may be adjacent to each other without being interposed.

In order to form the varistor part 1, first, a powder material containing ZnO as a main raw material is uniformly mixed by three-roll milling with a resin such as ethyl cellulose, a solvent such as terpinol, or the like, to form a paste. 1 and 2, this varistor paste is formed by printing on the alumina substrate by screen printing alternately with the metal internal electrodes 13 and 14 whose silver / palladium is a main raw material.

At this time, the breakdown voltage characteristic and the capacity of the varistor part 1 to be formed can be adjusted by the number of times of printing and the number of stacking of the internal electrodes 13 and 14. That is, in the varistor part 1, the characteristics of the varistor can be controlled by using the thickness between the internal electrodes 13 and 14, and the capacity of the varistor can be controlled by increasing the number of the internal electrodes 13 and 14. do. Through this, the semiconductor device package according to the present invention can provide a varistor having a desired characteristic and capacity. In FIG. 1, two pairs of internal electrodes 13 and 14 are illustrated, but the number of internal electrodes is not limited and may be changed according to desired characteristics and capacity of the varistor.

As described above, after the internal electrodes 13 and 14 and the varistor paste 10 are printed and formed on the alumina substrate 5, they are sintered simultaneously. After the varistor part 1 is completed through simultaneous sintering, an electrode pattern for die bonding and an electrode pattern for wire bonding are formed on the upper portion of the package, that is, on the alumina substrate, to which the light emitting diode 2 is to be bonded.

3 shows a top plan view of a semiconductor device package according to an embodiment of the present invention. The upper electrodes 3a and 4a of the external electrodes 3 and 4 form the die bonding electrode pattern 2a and the wire bonding electrode pattern. The upper electrodes 3a and 4a patterns are formed by printing and drying Ag paste at 800 ° C.

In addition, an external electrode capable of connecting the package to an external circuit should be formed. The external electrodes 3 and 4 are divided into two parts, the lower electrodes 3c and 4c and the side electrodes 3b and 4b, respectively. The lower electrodes 3c and 4c are formed by printing, drying and baking in the same pattern as in FIG. 4 using the same Ag electrode as the upper electrode. After the lower electrode is formed, the substrates are dipped in Ag paste, dried and baked in the same manner as in the chip resistor manufacturing process to form side electrodes 3b and 4b. By forming the side electrodes 3b and 4b, the upper electrodes 3a and 4a, the lower electrodes 3c and 4c and the internal electrodes 13 and 14 are electrically connected to each other. That is, the first external electrode 3 is connected to the plurality of first internal electrodes 13, and the second external electrode 4 is connected to the plurality of second internal electrodes 14.

Varistors containing ZnO as the main raw material generally exhibit black color, so that if they are formed on the same plane as the light emitting diode 2, the light emitting luminance deteriorates. Therefore, in the present invention, the varistor mainly around the alumina substrate 5 is shown in FIG. The light emitting diode chip was die-bonded on the opposite side where the part 1 was formed, that is, in the drawing direction, on top of the alumina substrate 5. In addition, the electrodes of the light emitting diode 2 and the upper electrodes 3a and 4a are connected by the connection wires 21 and 22 and molded as shown in the mold part 6 of FIG. The varistor integrated LED package is completed.

Referring back to FIG. 3, which shows a top plan view of a semiconductor device package according to an embodiment of the present invention, the connection between the light emitting diodes 2 and the external electrodes 3 and 4 at the top of the package will be described as follows. . The light emitting diodes 2 are die-attached to the die bonding electrode patterns 2a of the upper electrodes 3a and 4a, which are formed by printing, drying and baking the Ag electrode paste, and the wire bonding positions 21b, 22b and the wire bonding positions 21a and 22a of the light emitting diode 2 are connected by the connection wires 21 and 22 as shown in FIG. The wire bonding positions 21a and 22a of the light emitting diode 2 of FIG. 3 are shown on the alumina substrate 5, but are actually formed on the wire bonding pad above the light emitting diode 2. As a result, the LED 2 and the varistor unit 1 are connected in parallel. A circuit diagram illustrating such a parallel connection is shown in FIG. 5.

FIG. 5 is a circuit diagram of a varistor integrated light emitting diode according to the present invention, in which the varistor 100 and the light emitting diode 200 are connected in parallel to each other through terminals 300 and 400.

Hereinafter, preferred examples are provided to aid in understanding the present invention. The following examples are provided to more easily understand the present invention, and the present invention is not limited by these examples.

(Example)

A method of manufacturing a semiconductor device package according to the present embodiment will be described with reference to the flowcharts of FIGS. 1 to 4 and 6.

First, an alumina substrate 5 having a thickness of 0.3 mm scribed in a unit size of 1608 size (1.6 mm × 0.8 mm) as a total size of 3 ′ × 3 ′ is prepared. In the present embodiment, a method of simultaneously manufacturing a plurality of semiconductor device packages using one alumina substrate 5 is described, but of course, a single semiconductor device package may be separately manufactured within the technical idea of the present invention. Do.

As the step S1 of forming the varistor portion 1 on one surface of the substrate 5, first, the Ag / Pd metal paste is printed on the alumina substrate 5 in a constant pattern as shown in FIG. After drying for 10 minutes to form a first internal electrode (13). In fact, the first internal electrode 13 is repeatedly formed on each part of the semiconductor device package 5 to form a plurality of semiconductor device packages, and the same will be omitted in the following description of other parts. Explain.

Next, the varistor material layer 10 is formed on the alumina substrate 5 on which the first internal electrodes 13 are formed. The varistor material layer 10 is formed by printing a varistor paste of ZnO main component made of a solid content of about 60 to 70 wt% in a predetermined pattern. At this time, the thickness of the varistor material layer 10 may be appropriately adjusted by the number of prints from about 0.1 mm to 0.2 mm to adjust the varistor characteristics. In addition to the above components and compositions for the varistor material layer 10, it is also possible to use known components and compositions that can be used for the varistor material layer 10.

After printing and drying the varistor paste, the Ag / Pd metal paste is printed and dried on the substrate in a predetermined pattern as shown in FIG. 2 to form the second internal electrode 14 in the same manner as the method of forming the first internal electrode 13. do. Similarly, the varistor material layer 10 is formed thereon, and the above-described process of laminating the varistor material layer 10 on the internal electrodes 13 and 14 is repeated in accordance with the desired varistor characteristics and capacities. The laminated body of the internal electrodes 13 and 14 and the varistor material layer 10 thus formed is sintered at about 1,100 ° C. for 20 hours to form the varistor portion 1. By this co-sintering, the varistor part 1 is formed on the alumina substrate 5, and as shown in FIG. 1, the varistor part 1 is formed in the lower surface of the alumina substrate 5 (step S1).

Next, as the step S2 of forming the upper electrodes 3a and 4a on the other surface of the substrate 5, the alumina substrate 5 as seen from the surface of the alumina substrate 5 on the opposite side where the varistor portion 1 is formed, that is, in FIG. 1. Upper electrodes 3a and 4a are formed on the upper surface of the substrate. On the alumina substrate 5 on the side where the light emitting diode 2 is mounted, Ag paste can be printed and dried as shown in FIG. 3 to bond the upper electrodes 3a and 4a and the light emitting diode 2 to each other. The die bonding electrode pattern 2a is formed and baked at 800 占 폚 (step S2).

Next, the lower electrodes 3c and 4c and the side electrodes 3b and 4b of the external electrodes 3 and 4 that can connect the semiconductor device package to an external circuit are formed. It is formed in the same process as. The process of forming the external electrodes 3 and 4 is divided into step S3, which is a process of forming the lower electrodes 3c, 4c, and step S4, which is a process of forming the side electrodes 3b, 4b.

The lower electrodes 3c and 4c are formed on both surfaces of the varistor portion 1, that is, on both ends of the lower surface of the semiconductor device package as shown in FIG. The lower electrode is screen-printed, dried, and baked at 800 ° C. in a predetermined pattern with an Ag paste for external electrodes (step S3). Subsequently, the substrates are divided in a line as in the chip resistor manufacturing process, and both side surfaces of the divided substrates, that is, the left and right sides of the semiconductor device package, as shown in FIG. , 4b). By forming the side electrodes 3b and 4b, the upper electrodes 3a and 4a, the lower electrodes 3c and 4c and the internal electrodes 13 and 14 are electrically connected to each other (step S4).

Next, in step S5 of mounting the semiconductor element on the other side of the substrate, the substrate prepared as described above is plated with Au, and then the light emitting diode 2 chip is attached to the die bonding electrode pattern 2a. The wire bonding positions 21b and 22b and the wire bonding positions 21a and 22a of the light emitting diode 2 are connected by the connection wires 21 and 22 (step S5). After forming the mold 6 as shown in FIG. 1 through the molding process, the mold unit 6 is cut into unit sizes to complete a varistor integrated light emitting diode package having a size of 1608 (steps S6 and S7).

It is to be understood that the present invention is not limited to the above-described exemplary preferred embodiments but may be embodied in various ways without departing from the spirit and scope of the present invention. If you grow up, you can easily understand. If the implementation by such improvement, change, replacement or addition falls within the scope of the appended claims, the technical idea should also be regarded as belonging to the present invention.

The semiconductor device package according to the present invention exhibits excellent withstand voltage characteristics without mounting a separate zener diode or chip varistor. Therefore, it can be widely used in fields such as mobile phones and LCD monitors that require high voltage resistance.

SUMMARY OF THE INVENTION The present invention provides a varistor integrated semiconductor device package and a method of manufacturing the same, which reduces the mounting area of the varistor and the semiconductor device, and has excellent withstand voltage characteristics. The breakdown characteristics of the diode can be dramatically improved, and the disadvantages of mounting the chip varistor separately from the light emitting diode can be solved, and the error of the device can be reduced by the low cost, miniaturization, and integration.

Claims (11)

Substrate, A varistor portion formed under the substrate, in which at least one first internal electrode and at least one second internal electrode are alternately stacked via a varistor material layer; A semiconductor device mounted on the substrate and having a first terminal and a second terminal; A first external electrode, Having a second external electrode, The first external electrode, the first internal electrode, and the first terminal are electrically connected to each other, And the second external electrode, the second internal electrode, and the second terminal are electrically connected to each other. The method of claim 1, The semiconductor device package further comprises a mold unit for molding the semiconductor device and the upper surface of the substrate on the surface on which the semiconductor device on the substrate is formed. The method of claim 1, The semiconductor device package is a semiconductor device. The method of claim 1, The first external electrode includes a first upper electrode formed on an upper portion of the substrate and a first side electrode formed on a side surface of the substrate, wherein the first upper electrode is connected to the first terminal and is connected to the first side surface. An electrode is connected to the first internal electrode, The second external electrode includes a second upper electrode formed on an upper portion of the substrate and a second side electrode formed on a side surface of the substrate, wherein the second upper electrode is connected to the second terminal, and the second side electrode is formed. The electrode is a semiconductor device package is connected to the second internal electrode. The method of claim 4, wherein The first external electrode further includes a first lower electrode formed under the varistor portion, which is a lower side of the substrate, The second external electrode further includes a second lower electrode formed under the varistor portion, which is a lower side of the substrate. By repeating the steps of forming an internal electrode on one surface of the substrate and forming a varistor material layer, alternately laminating the first internal electrode and the second internal electrode via the varistor material layer, thereby to the one surface of the substrate. A varistor part forming step of forming a varistor part, An upper electrode forming step of forming a first upper electrode and a second upper electrode on the other surface of the substrate; The first upper electrode and the first side electrode are connected to form a first external electrode by dividing the substrate in a row to form first side electrodes and second side electrodes on both sides of the divided substrate. An external electrode forming step of connecting the second upper electrode and the second side electrode to form a second external electrode; A semiconductor element mounting step of mounting a semiconductor element on the other surface of the substrate and electrically connecting two electrodes of the semiconductor element and the first upper electrode and the second upper electrode; A molding step of molding the mounted semiconductor device; And manufacturing a semiconductor device package by cutting the substrate to a size of a semiconductor device package unit. The method of claim 6, A lower electrode forming step of forming a first lower electrode, a second lower electrode on the upper surface of the varistor portion formed on the other surface of the substrate, In the forming of the external electrode, the first external electrode further comprises the first lower electrode, the second external electrode further comprises a second lower electrode. The method of claim 6, Forming the first side electrode and the second side electrode is a method of manufacturing a semiconductor device package by dipping both sides of the divided substrate to the metal paste. The method of claim 6, The forming of the varistor material layer may include printing a varistor paste containing ZnO having a solid content of 60-70 wt%. On one side of the substrate, a metal paste containing silver / palladium is printed and dried to form an internal electrode, and a varistor material layer is formed by printing and drying a varistor paste containing ZnO having a solid content of 60-70 wt%. A varistor part forming step of forming a varistor part on one surface of the substrate by sintering by alternately stacking the first internal electrode and the second internal electrode via the varistor material layer; Forming an upper electrode on the other surface of the substrate to form a first upper electrode, a second upper electrode, and an electrode pattern for mounting a semiconductor device; A lower electrode forming step of forming a first lower electrode and a second lower electrode by printing a silver paste on an upper surface of the varistor part formed on the other surface of the substrate; The first upper electrode, the first side electrode, and the first lower electrode are formed by dividing the substrate in a row and dipping both sides of the divided substrate into silver paste to form a first side electrode and a second side electrode. An external electrode forming step of connecting electrodes to form a first external electrode, and connecting the second upper electrode, second side electrode, and second lower electrode to form a second external electrode; A semiconductor element mounting step of mounting a semiconductor element on an electrode pattern for mounting the semiconductor element, and connecting two electrodes of the semiconductor element and the first upper electrode and the second upper electrode to each other by a connecting wire; A molding step of molding the mounted semiconductor device; And manufacturing a semiconductor device package by cutting the substrate to a size of a semiconductor device package unit. The method of claim 6 or 10, The semiconductor device is a method of manufacturing a semiconductor device package is a light emitting diode.

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