KR20060011410A - Cmos image sensor with improved focusing ability and fabricating method thereof - Google Patents

Abstract

The present invention relates to a CMOS image sensor and a method of manufacturing the same. In particular, by increasing the height of the active area of the edge portion compared to the center portion of the pixel array, it is possible to prevent image distortion due to lack of focal length observed at the edge portion of the pixel array. It is an invention. In accordance with an aspect of the present invention, a method for manufacturing a CMOS image sensor having a pixel array including a plurality of unit pixels includes: a semiconductor corresponding to an edge portion of the pixel array rather than a height of a semiconductor substrate corresponding to a central portion of the pixel array; Preparing a semiconductor substrate having a higher height; Forming a second mask for trench formation on the semiconductor substrate, wherein forming a second mask having a height corresponding to a surface height of the semiconductor substrate; Forming a trench in the semiconductor substrate by performing an etching process using the second mask; Forming a device isolation insulating film filling the trench on the entire structure; Performing chemical mechanical polishing until the surface of the second mask formed at the central portion of the pixel array is exposed; Removing the second mask to form an active region at an edge portion of the pixel array, the active region having a higher surface height than the active region in the central portion of the pixel array; Forming a photodiode in the active region; And forming a color filter and a microlens corresponding to the photodiode.

CMOS image sensor, pixel array, focal length, photodiode, microlens

Description

CMOS image sensor with improved focusing and manufacturing method {CMOS IMAGE SENSOR WITH IMPROVED FOCUSING ABILITY AND FABRICATING METHOD THEREOF}             

1A is a device layout of a conventional CMOS image sensor,

Figure 1b is a cross-sectional view showing the difference in focusing ability in the center portion and the edge portion of the pixel array of the CMOS image sensor according to the prior art,

1C is a plan view showing a pixel array composed of a plurality of unit pixels

Figures 2a to 2h is a cross-sectional view showing a CMOS image sensor manufacturing process according to an embodiment of the present invention.

* Description of the symbols for the main parts of the drawings *

21: substrate

22: first mask

23: oxidation zone

24a: second mask formed at the edge of the pixel array

24b: second mask formed in the center portion of the pixel array

25: trench                 

26: device isolation film

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a CMOS image sensor and a method of manufacturing the same. In particular, the present invention improves the focusing capability by forming different active heights in the central and edge portions of a pixel array.

In general, an image sensor is a semiconductor device that converts an optical image into an electrical signal. Among them, a charge coupled device (CCD) includes individual metal-oxide-silicon (MOS) capacitors. A device in which charge carriers are stored and transported in a capacitor while being in close proximity to each other. Complementary MOS image sensors use CMOS technology that uses a control circuit and a signal processing circuit as peripheral circuits. A device employing a switching scheme that creates MOS transistors as many as pixels and sequentially detects outputs using the MOS transistors.

FIG. 1A is a diagram illustrating a device layout of a conventional CMOS image sensor, and schematically illustrates how the CMOS image sensor is configured as a whole.

Referring to this, a conventional CMOS image sensor receives light from a pixel array composed of tens or millions of unit pixels (also referred to as unit pixels, hereinafter referred to as pixels), and converts the light into an electrical signal for use in image reproduction. .

Fig. 1A shows a decoder / pixel driver for driving such a pixel array, and a control register and no circuit block for controlling various operations of the CMOS image sensor.

In addition, since the electrical signal generated in the pixel array is an analog signal, an analog digital converter block (ADC block) for converting the signal into a digital signal is shown in FIG. 1A, and the output of the ADC block is output through a line buffer. Finally, it is used for image reproduction.

1B is a cross-sectional view schematically illustrating a cross section of a pixel array in a CMOS image sensor according to the prior art, and looks at the problems of the prior art with reference to this.

First, the configuration of the CMOS image sensor according to the prior art is as follows.

First, a photodiode 12 is formed on the semiconductor substrate 11 to receive light and convert it into an electrical signal. The photodiodes are formed one by one for each pixel. Formed.

In addition, a multi-layered interlayer insulating film, a multi-layered metal wiring, a passivation film, and the like are formed on the photodiode 12, which is briefly indicated as one interlayer insulating film 13 in FIG. 1B.

A color filter 14 separating color from incident light is formed on the interlayer insulating layer 13, and a flattening film 15 for planarizing the surface is formed on the color filter.

In addition, an upper portion of the planarization film 15 includes one micro lens 16 for each unit pixel for condensing light more effectively.

This configuration is an approximate chip level configuration.

When the CMOS image sensor chip is applied to a real product, the macro lens 17 covering the entire pixel array is applied to the outside of the chip as shown in FIG. 1B and used in a mobile phone or a digital camera. .

As a result, the incident light passes through the macro lens 17 and the micro lens 16 and finally enters the photodiode 12, and thus there is a problem in the light condensing efficiency at the central portion and the edge portion of the pixel array. .

That is, no matter how precisely the macro lens is manufactured, incident light incident on the edge portion of the pixel array is incident at a slight inclination angle, and as a result, the focal length is shortened at the edge portion of the pixel array.

 As a result, light is incident almost vertically at the center of the pixel array and there is almost no image distortion. On the other hand, the focal length is shortened at the edges of the pixel array, which makes it impossible to efficiently collect light into the photodiode. You won't get it.

1C is a plan view showing a pixel array composed of tens to millions of unit pixels (pixels), which can be divided into the outermost region shown in dark colors and other central portions.

An object of the present invention is to provide a CMOS image sensor and a method of manufacturing the same, which eliminates image distortion caused by insufficient focal length at the edge of the pixel array.

The present invention for achieving the above object, in the method for manufacturing a CMOS image sensor having a pixel array consisting of a plurality of unit pixels, the edge of the pixel array than the height of the semiconductor substrate corresponding to the central portion of the pixel array Preparing a semiconductor substrate having a higher height of the semiconductor substrate corresponding to the portion; Forming a second mask for trench formation on the semiconductor substrate, wherein forming a second mask having a height corresponding to a surface height of the semiconductor substrate; Forming a trench in the semiconductor substrate by performing an etching process using the second mask; Forming a device isolation insulating film filling the trench on the entire structure; Performing chemical mechanical polishing until the surface of the second mask formed at the central portion of the pixel array is exposed; Removing the second mask to form an active region at an edge portion of the pixel array, the active region having a higher surface height than the active region in the central portion of the pixel array; Forming a photodiode in the active region; And forming a color filter and a microlens corresponding to the photodiode.

The present invention also provides a CMOS image sensor having a pixel array consisting of a plurality of unit pixels, comprising: a semiconductor substrate; An active region formed on the semiconductor substrate, the active region having a higher surface height than an active region formed at a central portion of the pixel array and formed at an edge portion of the pixel array; A photodiode formed in each of the active regions, the photodiode having a higher surface height than a photodiode formed at a central portion of the pixel array and formed at an edge of the pixel array; A formed color filter corresponding to the photodiode; And a microlens formed on the color filter.

In the present invention, the conventional problem is solved by forming different heights of the active region of the center portion of the pixel array and the edge portion of the pixel array. That is, in the present invention, the height of the active region formed at the edge of the pixel array is increased from the center portion. As a result, it was possible to compensate for the lack of focal length generated at the edge of the pixel array, thereby obtaining a CMOS image sensor without image distortion.

Hereinafter, the most preferred embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art can easily implement the technical idea of the present invention.

2A to 2H are cross-sectional views illustrating a manufacturing process of a CMOS image sensor according to the present invention.

First, as shown in FIG. 2A, a first mask 22 exposing only a predetermined region of the semiconductor substrate 21 is formed on the semiconductor substrate.

In more detail, the first mask 22 is not formed at the center portion of the pixel array, but is formed to cover only the edge portion of the pixel array. Referring to FIG. 1A, it can be seen that the semiconductor substrate is divided into a center region and an outer region of the pixel array.

Here, the central region or the central region is a term referring to the middle portion of the pixel array only as a difference in terms, and the outer region or the edge region is also the same term.

In an embodiment of the present invention, a silicon nitride film (SiN) was used as the first mask, and the thickness of the first mask was set to 500 mW or less.

After the first mask 22 is formed in this manner, when a thermal oxidation process using a furnace is performed, the semiconductor substrate except for the region covered by the first mask is shown in FIG. 2B. Similarly, the oxide film 23 is formed.

Here, the thickness of the oxide film 23 was set to 1000 kPa or less.

Next, as shown in FIG. 2C, all oxides are removed using a general oxide etchant. In an embodiment of the present invention, an aqueous HF solution (1:10) was used as an oxide film etchant, and the oxide film was removed by dipping in an HF solution. As a result, as shown in FIG. 2C, the center portion of the pixel array is formed lower, and the edge portion of the pixel array is formed higher.

After the oxide film etching using the HF aqueous solution as described above, it is preferable to perform N2 annealing to relieve stress of the semiconductor substrate. In one embodiment of the present invention, N2 annealing was performed for 30 seconds at 1000 ℃ using a rapid thermal process (Rapid Thermal Process).

Next, as shown in FIG. 2D, second masks 24a and 24b are formed on the semiconductor substrate. In an embodiment of the present invention, a silicon nitride film (SiN) is used as the second mask.

Here, the second mask is a mask for forming a trench trench isolation (STI), and the semiconductor substrate covered with the second mask will be an active region later.

Here, the second mask formed at the center of the pixel array is denoted by reference numeral 24b, and the second mask formed on the edge of the pixel array is denoted by reference numeral 24a.

2D, it can be seen that the second mask 24a formed at the edge portion of the pixel array is formed higher than the second mask 24b formed at the center portion of the pixel array. This is due to the step of the semiconductor substrate as described above.

In addition, the height of the second mask 24 is preferably set to be about 500 to 1000 kPa higher than the depth of the transistor from which the first oxide film 23 is removed.

Next, as shown in FIG. 2E, a substrate etching process using the second mask 24 is performed to form a trench 25 having a predetermined depth.

Subsequently, a trench isolation layer is formed on the semiconductor substrate as shown in FIG. 2F, but thick enough to fill the trench 25. In the exemplary embodiment of the present invention, a high density plasma oxide film (HDP) or O3-TEOS is used as the trench isolation layer.

In addition, the trench isolation layer 26 is deposited to a thickness of 1.7 to 2.0 times the depth of the trench.

Next, as illustrated in FIG. 2G, chemical mechanical polishing (CMP) is performed to planarize the surface, and chemical mechanical polishing is performed until the surface of the second mask 24b formed at the center portion of the pixel array is exposed. Proceed.

In the above-described chemical mechanical polishing, the target of the chemical mechanical polishing is subjected to chemical mechanical polishing until the surface of the second mask 24b formed in the central portion of the pixel array is exposed.

Alternatively, during chemical mechanical polishing, the target may proceed until the second mask 24a formed at the edge portion of the pixel array remains about 500 to 1000 mW.

After the chemical mechanical polishing is completed, the remaining second masks 24a and 24b are removed to obtain a shape as shown in FIG. 2H.

That is, the height of the active region formed in the center portion of the pixel array is low, and the active region formed in the edge portion of the pixel array has a surface higher than the center portion.

Therefore, if a series of processes such as photodiode, color filter and microlens manufacturing are performed on such an active area, the photodiode formed at the edge of the pixel array will be formed at such a high position, which is a focal length. It helps solve the problem of lack.

As described above, the lack of focal length is a phenomenon that occurs mainly at the edge portion of the pixel array. The focus is not formed until the photodiode and the focal length is shortened. In the present invention, the photodiode is formed at the edge portion of the pixel array. By raising the position to be formed, the problem of lack of focal length was solved.

The principle that the technical idea of the present invention solves the conventional problem can be easily seen with reference to Figure 1b.

In addition, in one embodiment of the present invention, the height difference between the center portion of the pixel array and the edge portion of the pixel array is one step, but this may be adjusted in two or more steps.

That is, according to the lens focus length of the image sensor, the surface height of the photodiode formed at the center of the pixel array and the photodiode formed at the edge of the pixel array may be adjusted in multiple steps.

Preferably stepping up the height of the photodiode surface toward the outermost side of the pixel array will be advantageous to address the lack of focal length.

As described above, the present invention is not limited to the above-described embodiments and the accompanying drawings, and the present invention may be variously substituted, modified, and changed without departing from the spirit of the present invention. It will be apparent to those of ordinary skill in the art.

When the present invention is applied to the CMOS image sensor, the shortage of the focal length can be solved through a simple process of adjusting the height of the active region, thereby obtaining a CMOS image sensor with suppressed image distortion.

Claims (4)

In the method of manufacturing a CMOS image sensor having a pixel array consisting of a plurality of unit pixels, Preparing a semiconductor substrate having a height of a semiconductor substrate corresponding to an edge portion of the pixel array than a height of a semiconductor substrate corresponding to a central portion of the pixel array; Forming a second mask for trench formation on the semiconductor substrate, wherein forming a second mask having a height corresponding to a surface height of the semiconductor substrate; Forming a trench in the semiconductor substrate by performing an etching process using the second mask; Forming a device isolation insulating film filling the trench on the entire structure; Performing chemical mechanical polishing until the surface of the second mask formed at the central portion of the pixel array is exposed; Removing the second mask to form an active region at an edge portion of the pixel array, the active region having a higher surface height than the active region in the central portion of the pixel array; Forming a photodiode in the active region; And Forming a color filter and a microlens corresponding to the photodiode Method of manufacturing a CMOS image sensor comprising a. The method of claim 1, Preparing a semiconductor substrate having a higher height of the semiconductor substrate corresponding to the edge portion of the pixel array than the height of the semiconductor substrate corresponding to the central portion of the pixel array, Forming a first mask on the semiconductor substrate, the first mask masking an edge portion of the pixel array; Performing an oxidation process with the first mask remaining to form an oxide film on and below the exposed semiconductor substrate; And Removing the oxide film Method of manufacturing a CMOS image sensor comprising a. The method of claim 2, Removing the oxide film, The method of manufacturing a CMOS image sensor further comprises N2 annealing for stress relief of the semiconductor substrate. In the CMOS image sensor having a pixel array consisting of a plurality of unit pixels, Semiconductor substrates; An active region formed on the semiconductor substrate, the active region having a higher surface height than an active region formed at a central portion of the pixel array and formed at an edge portion of the pixel array; A photodiode formed in each of the active regions, the photodiode having a higher surface height than a photodiode formed at a central portion of the pixel array and formed at an edge of the pixel array; A formed color filter corresponding to the photodiode; And Micro lens formed on the color filter CMOS image sensor comprising a.

Images