KR20060004649A - Method for manufacturing semiconductor device - Google Patents

Abstract

A method for manufacturing a semiconductor device is disclosed which enables to suppress decrease in the mobility in a channel region by suppressing piercing of boron through a gate insulating film which boron is ion-implanted into a gate electrode. The method for manufacturing a semiconductor device comprises a step for forming a gate insulating layer on an active region of a semiconductor substrate, a step for introducing nitrogen through the front surface of the gate insulating layer using active nitrogen, and a step for conducting an annealing treatment in an NO gas atmosphere so that the nitrogen concentration distribution in the nitrogen-introduced gate insulating layer is high on the front surface side and low on the side of the interface with the semiconductor substrate.

Description

Method for manufacturing a semiconductor device {METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE}

TECHNICAL FIELD This invention relates to the manufacturing method of a semiconductor device. Specifically, It is related with the manufacturing method of the semiconductor device which has the gate insulating film containing nitrogen.

In order to improve the integration degree and the operation speed of the semiconductor integrated circuit device, the component MOSFET is downsized and the gate insulating film is thinned. The gate electrode formed on the gate insulating film is usually formed by laminating a polysilicon layer or a polysilicon layer and a silicide layer. In the polysilicon layer, impurities are usually ion-implanted at the same time as the source / drain regions. N-type impurities are ion implanted into the gate electrode and the source / drain region of the surface channel type n-channel MOSFET. P-type impurities are ion implanted into the gate electrode and the source / drain regions of the surface channel type p-channel MOSFET.

When the gate insulating film becomes thin, a phenomenon occurs in which boron, a p-type impurity ion-implanted into the gate electrode of the surface channel type p-channel MOSFET, passes through the gate insulating film and reaches the channel region. When boron is injected into the channel region, which is an n-type region, not only the threshold value is changed but also the mobility is degraded.

It is known that introducing nitrogen into the gate insulating film is effective for suppressing boron penetration. In order to introduce nitrogen into a silicon oxide film, a method of heating a silicon substrate by resistance heating or lamp heating in a nitriding gas atmosphere such as NH ₃ gas, NO gas or N ₂ O gas is known. A method of introducing a higher concentration of nitrogen to the silicon oxide film surface by using nitrogen plasma is also known.

When the gate insulating film becomes thin, a phenomenon is known in which a tunnel current flows between the gate electrode and the channel region, and the gate leakage current increases. If a high dielectric constant insulating film having a higher dielectric constant is used instead of a part of the gate insulating film of silicon oxide, it is possible to reduce the thickness of the inversion capacitance conversion film and to increase the physical film thickness to suppress the gate leakage current. Silicon nitride oxide generally has a higher dielectric constant than silicon oxide, and is effective for thickening physical film thickness while suppressing inversion capacity conversion film thickness.

Japanese Laid-Open Patent Publication No. 2002-198531 discloses nitrogen introduced into a gate insulating film of silicon oxide formed on a silicon substrate by a remote plasma nitridation treatment, and subsequently oxidizes and anneals the gate insulating film in an 800C to 1100C and N ₂ O atmosphere. As a result, it is proposed to redistribute nitrogen to form a gate insulating film having a uniform nitrogen concentration. It is explained that a transistor having a long lifetime and high reliability can be obtained by forming a gate insulating film having a uniform nitrogen concentration of 6 at% or more, for example, 8 at% and 10 at%.

Here, the remote plasma nitriding is a process of generating nitrogen plasma by microwave or the like in a plasma generating chamber different from a processing chamber accommodating a substrate, and conveying active nitrogen to the processing chamber to perform nitriding.

When annealing is performed in an N ₂ O atmosphere, a part of the N ₂ O gas is considered to be decomposed into N ₂ , O ₂ , NO, and the like. Problems can arise with control.

In Japanese Patent Laid-Open No. 2002-110674, when nitrogen enters the interface near the Si substrate, the mobility of the MOS transistor decreases, so that the concentration of nitrogen in the vicinity of the Si substrate interface is suppressed and the film surface side is reduced in order to reduce gate leakage current. It is suggested to introduce a lot of nitrogen. By performing radical nitridation using nitrogen gas to the silicon oxynitride film into which nitrogen has been introduced in advance, it is possible to suppress nitrogen flows from the surface, to suppress the amount of nitrogen introduced near the silicon substrate interface, and to increase the nitrogen concentration on the film surface. I suggest that.

<Start of invention>

An object of the present invention is to provide a method of manufacturing a semiconductor device having a thin gate insulating film and having excellent MOSFET.

Another object of the present invention is to provide a method for manufacturing a semiconductor device which can suppress penetration of a gate insulating film of boron ion-implanted into a gate electrode and can suppress a decrease in mobility of a channel region.

According to one aspect of the present invention, there is provided a process for forming a gate insulating layer on an active region of a semiconductor substrate, a step of introducing nitrogen with active nitrogen from the surface of the gate insulating layer, and a gate insulating layer in which nitrogen is introduced. And a step of performing an annealing treatment in a NO gas atmosphere so as to maintain a high nitrogen concentration distribution at the interface with the semiconductor substrate at the surface side.

1A to 1F are cross-sectional views and graphs for explaining the experiments performed by the inventors and the results thereof.

2A to 2D are cross-sectional views and graphs for explaining the experiments performed by the present inventors and the results thereof.

3A and 3B are tables and graphs showing conditions and results of another experiment conducted by the present inventors.

4A and 4B are tables and graphs showing conditions and results of still another experiment conducted by the present inventors.

5A to 5D are cross-sectional views of a semiconductor substrate for explaining the method for manufacturing a semiconductor device according to the embodiment of the present invention.

6A and 6B are tables and graphs showing conditions and results of still another experiment conducted by the present inventors.

7A, 7B, and 7C are cross-sectional views schematically showing the configuration of a remote plasma nitride device, a decoupled RF nitrogen plasma device, and a cross-sectional views schematically showing the structure of a gate insulating layer using a high k material.

<Best mode for carrying out the invention>

The introduction of nitrogen into the silicon oxide film is effective in preventing boron from penetrating the gate insulating film in the ion implantation of boron into the gate electrode. However, as the gate insulating film becomes thinner, it becomes difficult to prevent the penetration of boron, so that boron reaches the interface between the gate insulating film and the silicon substrate. When boron reaches the channel region, the mobility is lowered. In addition, the boron concentration at the interface tends to be nonuniform.

By introducing the activated nitrogen generated by the plasma into the silicon oxide film or the silicon oxynitride film, a nitrogen concentration distribution having a peak in the surface of the insulating film or in the film can be obtained. By using such plasma nitridation, more nitrogen can be introduced while suppressing the nitrogen concentration at the interface with the substrate. High nitrogen concentrations are effective for inhibiting boron penetration.

In addition, by introducing more nitrogen, it is possible to increase the dielectric constant of the insulating film. It is effective for suppressing the leakage current of the gate by making the physical film thickness thick while suppressing the inversion capacitance conversion film thickness Teff thinly.

By suppressing the nitrogen concentration at the interface between the insulating film and the silicon substrate to a low level, the decrease in mobility in the channel region can be suppressed. It is also effective for suppressing deterioration of negative bias temperature instability (NBTI) characteristics. Moreover, NBTI characteristic is a deterioration characteristic at the time of raising a temperature under stress.

The technique of generating nitrogen plasma at a location away from the substrate and introducing active nitrogen into the substrate is a damage-free process that does not damage the substrate.

This inventor considered that even if the active nitrogen which generate | occur | produced by the plasma is introduce | transduced into the insulating film of the silicon substrate arrange | positioned separately from a plasma, there exists a possibility that it may cause damage to a board | substrate. In order to recover this damage, annealing treatment at a higher temperature than the nitrogen introduction process will be effective. Therefore, the influence by the annealing treatment was investigated.

1A to 1E are cross-sectional views showing steps for preparing a sample of an experiment performed by the present inventors.

As shown in FIG. 1A, a mask covering the active region 4 is formed on the surface of the silicon substrate 1, and anisotropic etching is performed on the silicon substrate 1 to form a trench 2 for element isolation. . An insulating layer such as silicon oxide is deposited so as to fill the trench 2 for element isolation, and the shallow trench in which the insulating film is embedded in the trench is removed by chemical mechanical polishing (CMP) to remove the unnecessary insulating layer on the surface of the silicon substrate 1. The device isolation region 3 by isolation (STI) was formed.

As shown in Fig. 1B, a gate oxide film 5 having a thickness of 1.0 nm was formed on the surface of the active region 4 of the silicon substrate 1 in an oxygen atmosphere at 965 deg.

As shown in FIG. 1C, nitrogen was introduced into the gate insulating film 5 in an atmosphere of 450 ° C. by active nitrogen derived from a nitrogen plasma excited by 1.5 GHz microwave. Nitrogen is introduced to the silicon oxide film surface to form a silicon nitride oxide film 5x. Active nitrogen introduction used a remote plasma nitridation apparatus available from Applied Materials, Inc. of Santa Clara, California.

7A schematically shows the configuration of a remote plasma nitriding device. N ₂ gas is introduced into the plasma generation chamber 21 to generate nitrogen plasma. Active nitrogen (radical) is generated from the nitrogen plasma and supplied into the reaction chamber 22. The reaction chamber 22 is provided with a lamp heating device 23 including a plurality of lamps, and can heat the wafer 24.

As shown in Fig. 1D, the annealing treatment was performed in a nitrogen atmosphere at 1050 占 폚 to recover the damage of the substrate caused by the introduction of active nitrogen. The silicon nitride oxide film 5x becomes the silicon nitride oxide film 5y by the annealing process.

As shown in Fig. 1E, a 100 nm thick polycrystalline silicon layer was deposited on the gate insulating film by CVD and patterned using a resist pattern, thereby forming a gate electrode 6 having a gate length of about 0.5 mu m to 1.0 mu m. . The gate insulating film 5y was also patterned to obtain a gate insulating film 5z.

After patterning the gate electrode, B as a p-type impurity was implanted to form an extension region 7. Thereafter, a silicon oxide film having a thickness of about 60 nm is deposited by chemical vapor deposition (CVD) on the substrate so as to cover the gate electrode, and reactive ion etching is performed to remove the silicon oxide film on the flat surface, and only on the gate electrode sidewalls. The sidewall spacers 8 were left.

After the sidewall spacers 8 were formed, the p-type impurity B was further ion implanted to form a high concentration source / drain region 9. In the ion implantation step, the p-type impurity B is also ion implanted into the gate electrode 6. Then, the interlayer insulation film was formed, the opening which exposes a source / drain area | region and a gate electrode was formed, and electrode was formed. Thus, sample S1 was obtained.

For comparison, after the active nitrogen introduction step shown in FIG. 1C, the annealing treatment shown in FIG. 1D was not performed. As shown in FIG. 1E, a comparison sample S2 in which a MOSFET was formed was also created.

1F is a graph showing the characteristics of the two types of MOSFETs created. In FIG. 1F, the horizontal axis represents the threshold Vth from the gate voltage Vg and the limit Vg-Vth in units V. FIG. The vertical axis represents the normalized mutual conductance obtained by multiplying the inductance conversion film thickness Teff by the mutual conductance Gm and multiplying the ratio W / L of the width W and the length L of the channel region in units of mS × nm. The mutual conductance is normalized regardless of the thickness of the gate insulating film and the size of the channel region.

The characteristic s1 of the sample S1 subjected to annealing treatment at 1050 ° C. in a nitrogen atmosphere after the introduction of active nitrogen shows a higher mutual conductance in almost all regions compared to the characteristic s2 of the sample S2 not subjected to annealing treatment in a nitrogen atmosphere. . It is clear that the characteristics of the MOSFET are improved by the annealing treatment. It is thought that the mobility of a carrier improved and the saturation current improved.

In this way, the annealing treatment after the introduction of the active nitrogen proved to improve the characteristics of the transistor. However, further investigation was made on how the characteristic improvement changes depending on the conditions of the annealing treatment. As the atmosphere for the annealing treatment, nitrogen (N ₂ ), nitrogen monoxide (NO), and oxygen (O ₂ ) were used.

First, the element isolation region 3 was formed in the silicon substrate by the same process as that shown in FIG. 1A. By one step and the process of the same shown in Figure 1b, in the O ₂ atmosphere at a temperature 965 ℃ by thermally oxidizing the silicon substrate surface to form a gate oxide film 5 having a thickness of 1.2㎚.

Then, the same nitriding process as the process shown in FIG. 1C was performed at the substrate temperature of 550 degreeC. In the step of introducing nitrogen, the film thickness of the gate insulating film was 1.457 nm as measured by an ellipsometer.

As shown to FIG. 2A, about 3rd sample S3, the annealing process of 1050 degreeC was performed in nitrogen atmosphere after nitrogen introduction. This annealing treatment is an annealing treatment in an inert gas.

As shown in FIG. 2B, the annealing treatment at 950 ° C. was performed in the NO atmosphere after introduction of nitrogen to the fourth sample S4. This annealing treatment is an annealing treatment involving oxidation and nitriding. Thereafter, annealing treatment was performed at 1050 ° C. in a nitrogen atmosphere. At this stage, the film thickness of the gate insulating film measured by the ellipsometer was 1.538 nm. Compared with a 3rd sample, the annealing process of NO is added about the 4th sample. The film thickness increased by annealing in NO was 0.081 nm.

As shown in FIG. 2C, the fifth sample S5 was subjected to annealing treatment at 1000 ° C. in an oxygen (O ₂ ) atmosphere after nitrogen introduction. This annealing treatment is an annealing treatment with oxidation. Thereafter, annealing treatment was performed at 1050 ° C. in a nitrogen atmosphere. In comparison with the third sample, an annealing treatment in O ₂ is added to the fifth sample.

In addition, each annealing process is performed by rapid thermal annealing RTA, and it is extremely short time. Then, similarly to the 1st, 2nd sample, the insulated gate electrode and the source / drain area were formed.

2D is a graph showing the characteristics of the created third, fourth and fifth samples. The horizontal axis and the vertical axis are the same as in FIG. 1F.

The characteristic s3 of the third sample S3 in which the thickness of the first sample and the gate insulating film and the temperature at the time of introduction of active nitrogen slightly differed was almost the same as the characteristic s1 of FIG. 1F. The characteristic s4 of the sample S4 which performed 950 degreeC (nitriding and oxidation) annealing process in NO atmosphere after active nitrogen introduction showed clear improvement. The characteristic s5 of the sample S5 which performed 1000 degreeC (oxidation) annealing treatment in oxygen atmosphere after active nitrogen introduction was the intermediate characteristic of both.

To sum up these results, it is clear that the annealing treatment after the introduction of active nitrogen improves the mutual conductance. Even if annealing is performed in an oxygen atmosphere, the mutual conductance is improved as compared with the annealing treatment in a nitrogen atmosphere. However, the mutual conductance is higher when the annealing treatment is performed by nitriding oxidation annealing in a NO atmosphere.

The inventors believe that this is because silicon-oxygen-nitrogen (Si-O-N) bonds are formed efficiently near the interface on the substrate side by annealing in the NO atmosphere.

However, the annealing treatment in an oxidizing or nitriding oxidizing atmosphere causes oxidation of the substrate or nitriding oxidation, and the gate insulating film becomes thick. In the case of producing a transistor having an effective gate insulating film thickness of 2 nm or less, an annealing treatment in a NO atmosphere with a small increase in film thickness will be more preferable. It is preferable that the increase in the thickness of the insulating film by the annealing treatment in the NO gas atmosphere be 0.2 nm or less. When obtaining the gate insulating film of 1.7 nm or less in thickness, it is preferable to make an initial oxide film thickness 1.5 nm or less.

As described in the prior art, introduction of active nitrogen (radical) into the silicon oxynitride film has been proposed. MEANS TO SOLVE THE PROBLEM This inventor measured the time dependent dielectric breakdown (TDDB) which is reliability evaluation in the semiconductor device which has the gate insulating film formed by the following two types of manufacturing methods. In the production methods of (1) and (2), the order of oxide film thickness, active nitrogen introduction, NO heat treatment, and N ₂ heat treatment are different in sequence, but the contents of each treatment are the same.

(1) a gate insulating film formed by forming a thermal oxide film, followed by heat treatment in an NO gas atmosphere, followed by introduction of nitrogen with active nitrogen, and then heat treatment in an N ₂ gas atmosphere;

(2) A gate insulating film obtained by introducing nitrogen with activated nitrogen after forming a thermal oxide film, followed by heat treatment in a NO gas atmosphere, and heat treatment with a N ₂ gas atmosphere at a higher temperature than that.

When the yields below the failure determination criteria were compared by the above measurement, it was 0% in the sample of (1), but a large difference occurred between them in 88% in the sample of (2).

That is, although the sample of (2) has nitrogen distribution in the insulating film which is almost the same as the sample of (1), the difference of the effect in reliability is large. The reason for this is that the silicon-oxygen-nitrogen (Si-O-N) bond is efficiently formed in the vicinity of the interface on the substrate side by the heat treatment in the NO atmosphere performed after the active nitrogen introduction treatment.

The heat treatment in the N ₂ gas atmosphere at a higher temperature than that after the annealing in the NO gas atmosphere is for improving the NBTI characteristics and is not an essential step.

As the plasma nitriding apparatus, in addition to the remote plasma nitriding apparatus, a decoupled RF nitrogen plasma apparatus available from Applied Materials, Inc. of Santa Clara, California, USA is known.

7B schematically illustrates the configuration of a decoupled RF nitrogen plasma apparatus. In this apparatus, nitrogen plasma is generated by RF excitation of the coil 26 provided on the top of the reaction chamber 25 which accommodates the sample 27 in the lower portion. Nitrogen plasma is generated only in an area away from the sample 27 along the upper wall of the reaction chamber. This device is abbreviated as DPN below.

Two types of samples were formed using a DPN nitriding device.

FIG. 3A shows the creation conditions of two types of samples S6 and S7 and comparison sample S8.

First, a silicon oxide film having a thickness of 0.85 nm was formed in a lamp annealing apparatus in a 900 ° C oxygen atmosphere by the same steps as those shown in FIGS. 1A and 1B. Thereafter, nitrogen plasma was excited at 700 W of RF power in the DPN apparatus, and activated nitrogen was introduced into the silicon oxide film of the substrate disposed below in a room temperature atmosphere.

The sixth sample S6 was subjected to an oxidation annealing treatment (RTO) in a reduced pressure oxygen atmosphere at 1000 ° C. after the introduction of active nitrogen, followed by annealing treatment (RTA) in a nitrogen atmosphere at 1050 ° C.

The seventh sample S7 was subjected to nitriding oxidation annealing treatment (RTNO) in an NO gas atmosphere at 950 ° C after the introduction of active nitrogen, followed by annealing treatment (RTA) in a nitrogen atmosphere at 1050 ° C. For comparison, two kinds of samples S8 in which the gate electrode was formed only by the silicon oxide film were also prepared.

3B shows the measurement results of these samples. The horizontal axis represents the inversion capacitance converted film thickness Teff in units of nm, and the vertical axis represents the gate leakage current Ig in units (A / cm 2). The characteristic s8 of the sample in which the gate insulating film is formed only by the silicon oxide film is two points indicated by x marks, and when extrapolated, it becomes like a straight line.

The characteristic s6 of the 6th sample S6 shows that gate leakage current can decrease below the characteristic s8 of the comparative sample S8.

The measuring point s7 of the seventh sample S7 is a nitriding oxidation annealing process in NO, and oxidation is suppressed, and the effective gate insulating film thickness is thinner than the measuring point s6. Moreover, it exists below compared with the characteristic s8, and shows that the gate leakage current can be reduced similarly to the sample S6.

In the characteristic of FIG. 3B, the degree of reduction of the gate leakage current is almost equal in the two samples S6 and S7. Sample S7 has an effective gate insulating film thickness of 0.013 nm thin. In addition, the mutual conductance Gm is also excellent, and as a property of the semiconductor device, the saturation current can be improved by 3.6% in a MOS transistor having a gate length of 40 nm.

In addition, secondary ion mass spectrometry (SIMS) investigated how the nitrogen was distributed in the gate insulating film into which the active nitrogen was introduced. DPN was used as an active nitrogen introduction apparatus, and the annealing process after active nitrogen introduction was performed in two types, in oxygen atmosphere and NO atmosphere.

The table of FIG. 4A schematically shows a production process of two kinds of samples. In the ninth sample S9, a silicon oxide film having a thickness of 0.8 nm was formed by a lamp annealing apparatus in an oxygen atmosphere at 900 ° C, and active nitrogen was introduced into the gate oxide film in a room temperature atmosphere by a 700 W decoupled RF nitrogen plasma ( DPN). Thereafter, annealing treatment RTO was performed in a reduced pressure oxygen atmosphere at 1000 ° C, followed by annealing treatment (RTA) in a nitrogen atmosphere at 1050 ° C.

10th sample S10 forms the silicon oxide film 0.8 nm in thickness similar to 9th sample S9, introduces active nitrogen by a DPN apparatus, and performs annealing process (RTNO) in NO gas atmosphere of 950 degreeC, and also The annealing treatment (RTA) in nitrogen atmosphere was performed at 1050 degreeC.

4B is a graph showing the measurement results of these two types of samples. The horizontal axis represents the depth from the surface in units of nm, and the vertical axis represents the measured nitrogen concentration in units (atoms / cc). The characteristic s9 of the sample which performed the annealing process in oxygen atmosphere has higher peak value in the surface vicinity, and nitrogen concentration is gradually decreasing with depth. Although the change of the density | concentration of nitrogen more than 1 digit is shown within the measurement range, the interface of a gate insulating film and a silicon substrate exists in the middle.

The film thickness of the nitride oxide film was 1.324 nm, the peak of nitrogen concentration was 8.6 at%, and the nitrogen concentration at the interface with the substrate was 3.6 at%. The nitrogen concentration at the interface is 1/2 or less of the peak nitrogen concentration.

The characteristic s10 of sample S10 subjected to annealing in NO atmosphere after introduction of active nitrogen appears to have broadened to some extent on the surface side, but the distribution of nitrogen by introduction of active nitrogen and annealing in NO atmosphere It is included. Thereafter, it shows a tendency to decrease with depth while showing a nitrogen concentration slightly higher than that of the characteristic s9, and the distribution is almost the same as that of the characteristic s9 from a somewhat deep position.

The film thickness of the nitride oxide film was 1.174 nm, the peak of nitrogen concentration was 7.6 at%, and the nitrogen concentration at the interface with the substrate was 4.9 at%. Increasing the thickness of the nitride oxide film may make it possible to reduce the nitrogen concentration at the substrate interface to 1/2 or less of the peak nitrogen concentration. The nitrogen concentration at the interface with the substrate is all 5 at% or less.

From the viewpoint of higher nitrogen concentration at the surface side and lower nitrogen concentration at the interface with the substrate, annealing in an oxidizing atmosphere such as O ₂ will be more suitable. However, the increase in the film thickness is larger than annealing in the nitric oxidizing atmosphere. From the viewpoint of thinly suppressing the thickness of the nitride oxide film to form a transistor having excellent driving capability, annealing in a nitriding oxidative atmosphere such as NO may be suitable.

In either measurement result, the nitrogen concentration has a peak on the gate insulating film surface side and continues to decrease toward the interface with the silicon substrate with depth. Therefore, a large amount of nitrogen can be introduced into the gate insulating film to effectively suppress boron penetration, and the nitrogen concentration at the interface with the silicon substrate is preferably 5 at% or less, and is suppressed in the channel region. It turns out that the fall of the mobility of can be suppressed.

In addition, expecting that active nitrogen was introduced only in the vicinity of the surface of the silicon oxide film, the experiment was carried out under the condition that the excitation energy of the decoupled RF plasma was reduced from 700W to 500W.

The table of FIG. 6A schematically shows a production process of three kinds of samples. The eleventh sample S11 formed a silicon oxide film having a thickness of 0.8 nm in an oxygen atmosphere at 900 ° C. by a lamp annealing apparatus, and was activated in a gate oxide film without a bias field in a room temperature atmosphere by a 500 W decoupled RF nitrogen plasma. Nitrogen was introduced (DPN). Thereafter, annealing treatment (RTO) was performed in a reduced pressure oxygen atmosphere at 1000 ° C, followed by annealing treatment (RTA) in a nitrogen atmosphere at 1050 ° C.

Similar to the eleventh sample, the twelfth sample S12 forms a 0.8 nm thick silicon oxide film in a 900 ° C. oxygen atmosphere with a lamp annealing apparatus and uses a 500 W decoupled RF nitrogen plasma to form a gate oxide film in a room temperature atmosphere. Active nitrogen was introduced (DPN) in the air. Thereafter, annealing treatment (RTNO) was performed in a reduced pressure NO atmosphere at 950 ° C, followed by annealing treatment (RTA) in a nitrogen atmosphere at 1050 ° C.

Similar to the eleventh sample, the thirteenth sample S13 forms a 0.8 nm thick silicon oxide film in an oxygen atmosphere at 900 ° C. by a lamp annealing apparatus, and in a gate oxide film in a room temperature atmosphere by a 500 W decoupled RF nitrogen plasma. Active nitrogen was introduced (DPN). Thereafter, annealing treatment (RTO) is performed in a reduced pressure oxygen atmosphere at 1000 ° C, followed by annealing treatment (RTNO) in a reduced pressure NO atmosphere at 950 ° C, and further annealing treatment (RTA) in a nitrogen atmosphere at 1050 ° C. Was performed. Performing RTA at high temperature after annealing in the NO atmosphere is for improving the NBTI characteristics and is not an essential process.

6B is a graph showing the measurement results of these three types of samples. The horizontal axis represents the depth from the surface in units of nm, and the vertical axis represents the measured nitrogen concentration in units (atoms / cc).

The characteristic s11 of the 11th sample S11 which performed the annealing process in oxygen atmosphere has higher peak value in the surface vicinity, and nitrogen concentration is gradually decreasing with depth. The nitrogen concentration change of 1 digit or more is shown within the measurement range. An interface between the gate insulating film and the silicon substrate exists in the middle.

The film thickness of the nitride oxide film was 1.189 nm, the peak of nitrogen concentration was 7.5 at%, and the nitrogen concentration at the interface with the substrate was 2.2 at%. The nitrogen concentration at the interface is 1/2 or less of the peak nitrogen concentration.

After the introduction of active nitrogen, the characteristic s12 of the twelfth sample S12 subjected to annealing in the NO atmosphere is increased to some extent and broadened. Thereafter, although the nitrogen concentration is slightly higher than that of the characteristic S11, it tends to decrease with depth, but when it approaches the interface, the amount of nitrogen increases, and the characteristic distribution having two peaks in the surface and in the vicinity of the interface is shown. The annealing treatment in the NO atmosphere is similar to the tendency to introduce nitrogen in the vicinity of the interface with the substrate.

The film thickness of the nitride oxide film was 1.170 nm, the peak of nitrogen concentration was 7.8 at%, and the nitrogen concentration at the interface with the substrate was 4.8 at%.

The characteristic s13 of 13th sample S13 which performed annealing of an oxygen atmosphere after an introduction of active nitrogen, and followed by annealing of NO atmosphere is equivalent to the characteristic s11 of the sample of oxygen annealing. It seems that there is a difference with the characteristic of s11, but it is the difference within the measurement error of secondary ion mass spectrometry (SIMS). It is confirmed that when the interface is close to the nitrogen content, the interface is effectively nitrided in the NO atmosphere.

The film thickness of the nitride oxide film was 1.157 nm, the peak of nitrogen concentration was 7.4 at%, and the nitrogen concentration at the interface with the substrate was 2.4 at%.

After the introduction of the active nitrogen, the annealing treatment is performed in the NO atmosphere to improve the characteristics, and the nitrogen concentration at the interface with the substrate can be suppressed to 5 at% or less. By selecting conditions, it is also possible to make nitrogen concentration in an interface into 1/2 or less of nitrogen concentration in the surface. From the characteristics s12 and s13 of the samples S12 and S13, it is understood that various nitrogen distributions can be realized by controlling the nitrogen distribution by the introduction of active nitrogen and the nitrogen distribution by the annealing treatment in the NO atmosphere, respectively. It is also possible to introduce nitrogen in the vicinity of the interface by annealing in a NO atmosphere without destroying the sharp distribution shape by the introduction of active nitrogen. It is also easy to realize different nitrogen concentrations by different requests at the interface between the gate insulating film surface and the substrate.

5A to 5D are sectional views showing the method for manufacturing the semiconductor device according to the embodiment of the present invention, based on the above experimental results.

As shown in FIG. 5A, the device isolation region 3 formed by STI is formed in the silicon substrate 1. Desired ion implantation is performed in the active region defined as the device isolation region of the STI to form the n-type well 4n and the p-type well 4p. Although only two wells are shown, a plurality of wells are formed at the same time.

Pyrogenic oxidation at 800 ° C. is performed on the exposed silicon substrate surface to form a silicon oxide film 11 having a thickness of 7 nm. In addition, pyrogenic oxidation is a method of oxidation by the atmosphere which burned hydrogen in oxygen. The gate oxide film having a thickness of 7 nm serves as a gate insulating film for forming a MOSFET having an operating voltage of about 3V.

The grown silicon oxide film 11 is removed by etching in the active region in which the MOSFET for low voltage operation is produced. Dry oxidation is carried out in an oxygen atmosphere at 965 ° C to form a silicon oxide film 12 having a thickness of 1.2 nm. The gate oxide film having a thickness of 1.2 nm is, for example, a gate insulating film for forming a MOSFET having an operating voltage of about 1 to 1.2 V. In addition, when a native oxide film exists on the surface of a silicon substrate, you may remove a native oxide film in reducing atmospheres, such as hydrogen radicals. By oxidizing the clean silicon surface, a good quality silicon oxide film can be formed.

Although the case where the gate insulating layer which has two types of thickness was formed was demonstrated, you may form the gate insulating layer of three or more types of thickness.

This oxidation also slightly grows the thick silicon oxide film 11 formed earlier. Wells with a thin gate insulating film 12 are also formed with n-type and p-type.

As shown in Fig. 5B, active nitrogen is introduced into the gate insulating films 11 and 12 in an atmosphere of 550 占 폚 by RPN nitrogen plasma obtained by 1.5 GHz microwave. Active nitrogen is introduced, and the gate insulating film is made of silicon nitride oxide films 11x and 12x.

As shown in FIG. 5C, annealing is performed in a NO gas atmosphere at 950 ° C. By the NO gas, the gate insulating film is also oxynitrated, and the damage is recovered. In this way, the gate insulating films 11y and 12y are formed. Subsequently, in order to suppress deterioration of NBTI characteristics, etc., you may further perform a high temperature annealing process in nitrogen atmosphere.

Thereafter, a polycrystalline silicon layer having a thickness of 100 nm is formed on the gate insulating film, and patterned to a desired gate length using a resist pattern. On the thin gate insulating film 12y, a gate electrode having a gate length of 40 nm is formed.

As shown in Fig. 5D, ion implantation of n-type impurities and p-type impurities is performed by using a patterned gate electrode, a resist mask that selects an n-channel region and a p-channel region as a mask, and the extension regions 7p and 7n. Write. Thereafter, a silicon oxide film having a thickness of about 60 nm is deposited and RIE is performed to form sidewall spacers 8. The source / drain regions 9n and 9p are formed by ion implantation of n-type impurities and p-type impurities using a gate electrode having sidewall spacers and a resist mask that separates the n-channel region and the p-channel region.

Thereafter, as needed, silicidation is performed on the exposed silicon surface and coated with an interlayer insulating film. An opening is formed in the interlayer insulating film 2 to form a lead plug, and further, necessary wiring and interlayer insulating film are formed.

In this manner, a CMOS integrated circuit having a thin gate insulating layer and a thick gate insulating layer and suppressing the penetration of boron in the thin gate insulating layer and reducing the mobility of the channel region is formed.

By such a process, a semiconductor device having a thin effective gate insulating film thickness of 2 nm or less, in particular 1.7 nm or less, which can prevent boron penetration and suppress the mobility of the channel region can be formed.

As described above, according to the embodiment described above, a high nitrogen concentration is introduced at the surface side of the gate insulating film and a low nitrogen concentration at the interface with the silicon substrate to suppress boron penetrating the gate insulating film and also to reduce mobility in the channel region. can do.

Although the present invention has been described with reference to the above embodiments, the present invention is not limited thereto. For example, depending on the purpose, instead of nitric oxide annealing in NO, annealing or the like may be used in NO diluted with an inert gas. A silicon nitride oxide film containing 3 at% or less of nitrogen may be formed at the interface with the substrate instead of the silicon oxide film as an insulating film formed on the semiconductor substrate first. A high k material film having a high dielectric constant may be laminated on the silicon nitride oxide film.

Fig. 7C shows a configuration in which a film of high-k (high dielectric constant) material is laminated. The high-k material has a significantly higher dielectric constant than silicon oxide. For example, a silicon oxide film 31 having a thickness of 0.58 nm is formed on the surface of the silicon substrate 30 in an oxygen atmosphere of 750 ° C. by a lamp annealing apparatus, and is room temperature atmosphere by a 500 W decoupled RF nitrogen plasma. Activated nitrogen was introduced into the gate oxide film (DPN). Thereafter, annealing treatment (RTNO) in a 900 ° C NO gas atmosphere was performed, and annealing treatment (RTA) was performed in a 1050 ° C nitrogen atmosphere. This nitride oxide film thickness was 0.80 nm. Further thinning may be possible by adjusting the base oxide film thickness, the plasma nitriding strength, the NO gas annealing temperature, and the time. On this oxynitride film, by forming a high k material film 32 such as an oxide film such as Al, Hf, Zr, or an oxide silicate film thereof, the reaction between the semiconductor substrate and the high k material is prevented, and the reliability and driving ability This excellent gate insulating film can be provided.

It will be apparent to those skilled in the art that various changes, modifications, combinations, and the like are possible.

It is suitable for the manufacture of MOS transistors in which miniaturization is advanced.

Claims (12)

Forming a gate insulating layer on the active region of the semiconductor substrate, Introducing nitrogen by active nitrogen from the gate insulating layer surface side; Successively performing an annealing treatment in the NO gas atmosphere on the semiconductor substrate. Method for manufacturing a semiconductor device comprising a. The method of claim 1, The said active nitrogen is a manufacturing method of the semiconductor device which is radical nitrogen or nitrogen which generate | occur | produced from plasma. The method of claim 1, And an annealing treatment in an inert gas at a higher temperature after the annealing treatment in the NO gas atmosphere. The method of claim 1, The film thickness increase of the gate insulating film by the annealing process in said NO gas atmosphere is 0.2 nm or less. The method of claim 1, The annealing treatment in the NO gas atmosphere is performed in a NO gas atmosphere at a temperature higher than the substrate temperature in the step of introducing nitrogen by active nitrogen. The method of claim 1, The annealing treatment in the NO gas atmosphere is performed in a NO gas atmosphere diluted with an inert gas containing any one of N ₂ , Ar, and He. The method of claim 1, And a step of annealing in an oxygen atmosphere or an oxygen atmosphere diluted with an inert gas before the annealing treatment in the NO gas atmosphere. The method of claim 1, The gate insulating layer formed on the active region is an insulating layer formed by thermally oxidizing the surface of the semiconductor substrate, and has a thickness of 1.5 nm or less. The method of claim 1, And the gate insulating layer is an oxynitride layer containing a trace amount of nitrogen of 3 at% or less at the interface with the semiconductor substrate. The method of claim 1, The manufacturing method of the semiconductor device whose nitrogen concentration in the interface with the semiconductor substrate of the said gate insulating layer after the annealing process in the said NO gas atmosphere is 5 at% or less. The method of claim 1, And a step of annealing the semiconductor substrate in a reducing atmosphere and removing a natural oxide film before the step of thermally oxidizing the surface of the semiconductor substrate. The method of claim 1, The step of forming a gate insulating layer on an active region of the semiconductor substrate is a method of manufacturing a semiconductor device, the insulating layer having a different thickness depending on the region.

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