KR20050117056A - Display device - Google Patents

Abstract

The present invention relates to a liquid crystal display device having a plurality of inverter PCBs and data PCBs. In order to transmit the synchronization signal between the inverter PCB, a signal line for transmitting the synchronization signal is formed on the data PCB, and the inverter PCB and the data PCB are connected through the FPC board. At this time, a transmission line connected to the signal line is also formed on the FPC substrate. In this way, since the synchronization signal is transmitted between the inverter PCB through the transmission line and the signal line formed on the FPC board and the data PCB, there is no need to install a separate long cable between the inverter PCB, thereby improving the production efficiency of the liquid crystal display device, Operational efficiency is also improved by reducing signal interference between cables and other electronic components.

Description

Display device {DISPLAY DEVICE}

The present invention relates to a display device.

Display devices used in computers, monitors and TVs include organic light emitting displays (OLEDs), vacuum fluorescent displays (VFDs), and field emission displays. , FED), plasma display panels (PDPs), and the like, and liquid crystal displays (LCDs) that do not emit light by themselves and require a light source.

A general liquid crystal display device includes two display panels provided with a field generating electrode and a liquid crystal layer having dielectric anisotropy interposed therebetween. A voltage is applied to the field generating electrode to generate an electric field in the liquid crystal layer, and the voltage is changed to adjust the intensity of the electric field, thereby adjusting the transmittance of light passing through the liquid crystal layer to obtain a desired image.

In this case, the light may be a separate artificial light source or natural light.

A light source for a liquid crystal display, that is, a backlight device, uses a plurality of fluorescent lamps, such as a cold cathode fluorescent lamp (CCFL) or an external electrode fluorescent lamp (EEFL), as a light source. Include. The inverter converts the input DC voltage into AC voltage according to the brightness control voltage input from the outside and applies it to the lamp to light it, adjusts the brightness of the lamp, senses the voltage related to the current flowing through the lamp and based on the detected voltage. To control the voltage applied to the lamp.

Such inverters are usually placed on the back of the bottom chassis of the liquid crystal display in the form of a printed circuit board (PCB), and a separate cable is attached between the inverter PCBs of the lower chassis for mutual synchronization between these inverter PCBs. It is. However, since these cables are manually arranged and connected by hand, it takes a lot of time and accordingly the production efficiency of the liquid crystal display device is reduced. In addition, as the cable is attached across the lower chassis of the liquid crystal display, difficulties arise in the assembly process and cause signal interference to adjacent devices.

Therefore, the technical problem to be achieved by the present invention is to simplify the assembly process of the liquid crystal display device to improve the manufacturing efficiency of the liquid crystal display device.

Another object of the present invention is to reduce the interference caused by the signal lines attached to improve the operation efficiency.

A display device according to an aspect of the present invention for achieving the technical problem,

Applying a voltage to a display panel including a plurality of pixels, a data driver to apply a data voltage to the pixel, a data PCB electrically connected to the data driver, and a light source that provides light to the display panel to blink the light source. A first and second inverter PCB is included, and the data PCB includes a first signal line electrically connected to the first inverter PCB and the second inverter PCB.

The display device further includes first and second connection members connecting the data PCB and the first and second inverter PCBs, respectively, wherein the first and second connection members are respectively the first signal line and the first signal line. And first and second transmission lines connected to the second inverter PCB.

The display device may further include a control PCB equipped with a signal controller for controlling the data driver, and the control PCB includes a second signal line electrically connected to the first signal line. In addition, the display device may further include a first connection member connecting the data PCB and the control PCB, and the first connection member includes a transmission line connected to the first signal line and the second signal line. .

Each of the first and second inverter PCBs includes a switching unit for converting a DC voltage from the outside into the AC voltage, a transformer for boosting the AC voltage from the switching unit and applying the voltage to the light source, and from the first signal line. It may include an inverter controller for controlling the operation of the switching unit based on the signal.

The second signal line may be connected to the signal controller. In this case, the signal from the first signal line may be a synchronization signal for synchronizing operation timings and driving frequencies of the first and second inverter PCBs.

The display panel may further include a second signal line electrically connected to the first signal line.

The display device may further include a connection member connecting the data PCB and the display panel, and the connection member may include a transmission line connecting the first signal line and the second signal line.

The light source according to the above feature may be an external electrode fluorescent lamp (EEFL).

According to another aspect of the present invention, a display device includes a display panel including a plurality of pixels, first and second inverter PCBs that apply a voltage to a lamp that provides light to the pixels, and flash the lamp, and a data voltage to the pixels. A data driver for applying a voltage, first and second data PCBs electrically connected to the data driver and including first and second signal lines, and a signal controller for controlling the data driver and including a third signal line. A control PCB, first and second connection members connecting the first and second data PCBs and the first and second inverter PCBs, and connecting the first and second data PCBs and the control PCB, respectively. Third and fourth connection members, wherein the first connection member includes a first transmission line connected to the first signal line and the first inverter PCB, and the second connection member includes the first connection line. And a second transmission line connected to the second signal line and the second inverter PCB, wherein the third connection member includes a third transmission line connected to the first signal line and the third signal line, and the fourth connection member includes: And a fourth transmission line connected to the second signal line and the third signal line.

In this case, the third signal line may be connected to the signal controller.

In the above aspect, the first to fourth connection members may be flexible printed circuit boards.

Each of the first and second inverter PCBs includes a switching unit for converting a DC voltage from the outside into the AC voltage, a transformer for boosting the AC voltage from the switching unit and applying the voltage to the lamp, and the first signal line and the And an inverter controller configured to control an operation of the switching unit based on a signal from a second signal line, wherein the signals from the first signal line and the second signal line are operated when and driven by the first and second inverter PCBs. It may be a synchronization signal for synchronizing frequency.

According to still another aspect of the present invention, a display device includes a display panel including a plurality of pixels and a first signal line, and first and second inverter PCBs that apply a voltage to a lamp that provides light to the pixels to blink the lamp. And a data driver for applying a data voltage to the pixel, first and second data PCBs electrically connected to the data driver and including second and third signal lines, respectively, the display panel and the first and second data PCBs. First and second connection members connecting the first and second data PCBs, respectively, and third and fourth connection members connecting the first and second data PCBs and the first and second inverter PCBs, respectively; Includes a first transmission line connected to the first signal line and the second signal line, the second connection member includes a second transmission line connected to the first signal line and the third signal line, and the third connection line Material and the second signal line and the second and a third transmission line connected to the first inverter PCB, the fourth connecting member includes a fourth transmission line connected to the third signal line and the second inverter PCB.

The first and second connection members may be TCP, and the third and fourth connection members may be flexible printed circuit boards.

Each of the first and second inverter PCBs includes: a switching unit for converting a DC voltage from the outside into the AC voltage, a transformer for boosting the AC voltage from the switching unit and applying the voltage to the lamp, and the second signal line and the And an inverter controller for controlling the operation of the switching unit based on a signal from a third signal line, and synchronizing operation timings and driving frequencies of the first and second inverter PCBs from the first signal line and the third signal line. It may be a synchronization signal.

DETAILED DESCRIPTION Embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like parts are designated by like reference numerals throughout the specification. When a part of a layer, film, region, plate, etc. is said to be "on" another part, this includes not only the other part being "right over" but also another part in the middle. On the contrary, when a part is "just above" another part, there is no other part in the middle.

A driving device of a light source for a display device according to an exemplary embodiment of the present invention will now be described in detail with reference to the accompanying drawings.

1 is an exploded perspective view of a liquid crystal display according to an embodiment of the present invention, FIG. 2 is a block diagram of a liquid crystal display according to an embodiment of the present invention, and FIG. 3 is a liquid crystal according to an embodiment of the present invention. It is an equivalent circuit diagram of one pixel of a display device. 4 is a diagram illustrating in detail a connection state and internal blocks of a liquid crystal panel assembly, an inverter PCB, and a control PCB according to an exemplary embodiment of the present invention.

As illustrated in FIG. 1, a liquid crystal display according to an exemplary embodiment of the present invention may include a liquid crystal module 350 including a display unit 330 and a backlight unit 340, and a front and rear surfaces accommodating the liquid crystal module 350. Cases 361 and 362, upper chassis 363, lower chassis 364 and mold frame 365 are included.

The display unit 330 includes a liquid crystal panel assembly 300, a plurality of gate carrier packages (TCPs) 410 and data TCPs 510 attached thereto, and a gate PCB attached to the corresponding TCPs 410 and 510. a circuit board 450, a plurality of data PCBs 551 and 552, a flexible printed circuit (FPC) substrate 631 and 632 attached to the data PCBs 551 and 552, and a flexible circuit Control PCB 650 attached to substrates 631 and 632.

The liquid crystal panel assembly 300 includes a lower panel 100, an upper panel 200, and a liquid crystal layer 3 interposed therebetween.

The lower panel 100 includes a plurality of display signal lines G ₁ -G _n , D ₁ -D _m , and the lower and upper panel 100, 200 includes display signal lines G ₁ -G _n , D ₁ -D _m ) and includes a plurality of pixels arranged in a substantially matrix form.

The display signal lines G ₁ -G _n and D ₁ -D _m are a plurality of gate lines G ₁ -G _n transmitting gate signals (also called scan signals) and data lines D ₁ transferring data signals. includes -D _m). gate lines (G ₁ -G _n) extend in a substantially row direction and are substantially parallel to the data lines (D ₁ -D _m) to each other and extending substantially in a column direction are substantially parallel to each other .

Each pixel includes a switching element Q connected to a display signal line G ₁ -G _n , D ₁ -D _m , and a liquid crystal capacitor C _LC and a storage capacitor C _ST connected thereto. It includes. The holding capacitor C _ST can be omitted as necessary.

The switching element Q, such as a thin film transistor, is provided in the lower panel 100, and the control terminal and the input terminal are three-terminal elements, respectively, with gate lines G ₁ -G _n and data lines D ₁ -D _m . The output terminal is connected to a liquid crystal capacitor (C _LC ) and a holding capacitor (C _ST ).

The liquid crystal capacitor C _LC has two terminals, the pixel electrode 190 of the lower panel 100 and the common electrode 270 of the upper panel 200, and the liquid crystal layer 3 between the two electrodes 190 and 270. It functions as a dielectric. The pixel electrode 190 is connected to the switching element Q, and the common electrode 270 is formed on the front surface of the upper panel 200 and receives a common voltage V _com . Unlike in FIG. 3, the common electrode 270 may be provided in the lower panel 100. In this case, at least one of the two electrodes 190 and 270 may be linear or rod-shaped.

The storage capacitor C _ST , which serves as an auxiliary part of the liquid crystal capacitor C _LC , is formed by overlapping a separate signal line (not shown) and the pixel electrode 190 provided on the lower panel 100 with an insulator interposed therebetween. A predetermined voltage such as the common voltage V _com is applied to this separate signal line. However, the storage capacitor C _ST may be formed such that the pixel electrode 190 overlaps the front end gate line directly above the insulator.

On the other hand, to implement color display, each pixel uniquely displays one of the three primary colors (spatial division) or each pixel alternately displays the three primary colors over time (time division) so that the desired color can be selected by the spatial and temporal sum of these three primary colors. To be recognized. 3 illustrates an example of spatial division, in which each pixel includes a red, green, or blue color filter 230 in a region corresponding to the pixel electrode 190. Unlike FIG. 3, the color filter 230 may be formed above or below the pixel electrode 190 of the lower panel 100.

A polarizer (not shown) for polarizing light is attached to an outer surface of at least one of the two display panels 100 and 200 of the liquid crystal panel assembly 300.

1 and 2, the gate TCP 410 is attached to one edge of the lower panel 100 of the liquid crystal panel assembly 300, and a gate driving integrated circuit constituting the gate driver 400 is disposed thereon. It is mounted in the form of a chip. The data TCP 510 is attached to the other edge of the lower panel 100 of the liquid crystal panel assembly 300, and a data driver integrated circuit constituting the data driver 500 is mounted in the form of a chip. The gate driver 400 and the data driver 500 may include the gate lines G ₁ -G _n and the data lines of the liquid crystal panel assembly 300 through signal lines (not shown) formed in the TCPs 410 and 510. D ₁ -D _m ) are each electrically connected.

The gate driver 400 applies a gate signal formed of a combination of the gate on voltage V _on and the gate off voltage V _off to the gate lines G ₁ -G _n , and the data driver 500 applies the data voltage. It is applied to the data lines D ₁ -D _m .

Alternatively, the integrated circuit chip that forms the gate driver 400 and the data driver 500 may be integrated on the display panel without using TCP (chip on glass, COG mounting method), and the gate driver 400 or the data driver 500 may be formed directly on the liquid crystal panel assembly 300 together with the switching element Q and the display signal lines G ₁ -G _n and D ₁ -D _m . 4 illustrates a structure in which the gate driver 400 is integrated with the lower panel 100 of the liquid crystal panel assembly 300.

The gate PCB 450 is attached to the TCP 410 in the longitudinal direction in parallel to the lower panel 100, and a plurality of signal lines (not shown), electronic components, and the like for transmitting signals are formed thereon. However, in the case of Figure 4 there is no gate PCB 440.

The two data PCBs 551 and 552 are attached to the TCP 510 in a length direction parallel to the lower panel 100, and a plurality of signal lines (not shown) and electronic components for transmitting signals are formed thereon. It is.

The control PCB 650 is connected to the data PCBs 551 and 552 via a pair of FPC boards 631 and 632, respectively, near the boundary of the two PCBs 551 and 552, and the gate driver 400 thereon. And a signal controller 600 for controlling operations of the data driver 500 and the like.

The gray voltage generator 800 is mounted on the control PCB 650 or the data PCBs 551 and 552.

The gray voltage generator 800 generates two sets of gray voltages related to the transmittance of the pixel and provides them to the data driver 500 as data voltages. One of the two sets has a positive value for the common voltage (V _com ) and the other set has a negative value.

As shown in FIGS. 1 and 2, the backlight unit 340 includes a plurality of lamps 341 mounted on a lower portion of the liquid crystal panel assembly 300, and a plurality of optical apparatuses for processing light from the lamps 341. 345, and a plurality of inverter PCBs 950, 960 mounted with electronic components that control the lamp 341.

In FIG. 1, the optics 345 are positioned between the assembly 300 and the lamp 341, and a diffuser plate 342 and a plurality of optical sheets that direct and diffuse light from the lamp 341 to the assembly 300. 343, and a reflector plate 344 positioned below the lamp 341 and reflecting light from the lamp 341 toward the assembly 300.

The lamp 341 extends in the longitudinal direction of the data PCBs 551 and 552, and preferably is an external electrode fluorescent lamp (EEFL) having electrodes formed on both ends of the outside, but may be a cold cathode fluorescent lamp (CCFL) or the like. .

The diffuser plate 342 may be replaced with a light guide plate (not shown), and the lamp 341 may be disposed on one or both sides of the light guide plate, which is called an edge type. In contrast, the lamp arrangement shown in FIG. 1 is called a direct type.

Two inverter PCBs 950 and 960 are located at distances near both ends of the lamp 341, which are connected to the respective data PCBs 551 and 552 through the FPC boards 971 and 972. The inverter PCBs 950 and 960 control the brightness of the screen by blinking the lamp 341 and controlling the blinking time.

As shown in FIG. 4, the electronic components mounted on the inverter PCBs 950 and 960 may include interface units 921 and 922 and interface units 921 and 922 that receive various driving voltages from the voltage supply unit 700. Is connected to the inverter control unit 931, 932, the inverter control unit (931, 932) and the interface unit 921, 922 connected to the switching unit (941, 942), the switching unit (941, 942) and the lamp 341 A plurality of transformers (951-954, 961-964) arranged in sequence perpendicular to the longitudinal direction of the). These are connected to each other via signal lines 911a and 911b formed on the inverter PCBs 950 and 960.

In addition, the interface units 921 and 922 are connected to the connectors 981 and 982 installed in the inverter PCBs 950 and 960 and the cables 711a and 711b connected to the connectors 731 and 732 installed in the voltage supply unit 700. It is connected to the supply unit 700.

Transformers 951-954 and 961-964 of two inverter PCBs 950 and 960 facing each other are paired with each other and connected to both ends of the lamp 341. For example, as shown in FIG. 4, the transformer 954 of the inverter PCB 950 and the transformer 964 of the inverter PCB 960 are paired and connected to both ends of the lamp 341 through the cables 351a and 351b. It is connected. The other three pairs of transformers (951 and 961, 952 and 962, 953 and 963) are also connected to their respective lamps via separate cables.

As shown in FIG. 4, signal lines 521a, 521b, 621a, 621b, and 611 are formed on the data PCBs 551 and 552 and the control PCB 650, and on the FPC substrates 631, 632, 971, and 972. Transmission lines 621a, 621b, 973a, and 973b are formed. These signal lines 521a, 521b, and 611 and the transmission lines 621a, 621b, 973a, and 973b are connected to each other through a contact point (not shown) or the like, and are also connected to the signal controller 600 and the inverter PCBs 950 and 960. Connected to form a signal path between the inverter PCB (950, 960) and the signal control unit 600.

Naturally, the number of signal lines and transmission lines may vary depending on necessity. If the signal controller 600 does not control the inverter PCBs 950 and 960, the connection with the signal controller 600 may be omitted.

Although not shown in FIG. 4, control signals, in addition to these signal lines 521a, 521b and 611 and transmission lines 621a and 621b, are provided on the data PCBs 551 and 552, the FPC boards 631 and 632, and the control PCB 650. Various signal lines and transmission lines for transmitting image data, voltage, and the like may be formed.

Instead of the FPC substrates 631, 632, 971, and 972, other connection members may be used to transmit signals.

Furthermore, the number of inverter PCBs 950 and 960 can be increased or decreased as needed, and the number of transformers in each inverter PCB 950 and 960 can also be increased or decreased. When three or more inverter PCBs 950 and 960 are arranged, the inverter PCBs 950 and 960 are vertically arranged in the longitudinal direction of the lamp 341, and they are connected to the FPC board or the like.

The display unit 330 and the backlight unit 340 are accommodated in the lower chassis 364, which is a storage container, and the lower chassis 364 is fixedly supported by the mold frame 365. The mold frame 365 has a large opening portion for exposing the rear surface of the lower chassis 364 to the outside and an introduction portion for smoothly receiving circuit components mounted on the PCBs 450, 551, 552, and 650.

Inverter PCBs 950 and 960, a control PCB 650, a voltage supply unit 700, and the like are disposed on the rear surface of the lower chassis 364 exposed through the opening of the mold frame 365.

The upper chassis 363 is disposed on the display unit 330. The upper chassis 363 sends the data PCBs 551 and 552 and the gate PCB 450 toward the mold frame 365 around the data TCP 510 to prevent the display portion 330 from being separated from the lower chassis 364. It is to prevent. The front case 361 on the upper chassis 363 and the rear case 362 under the mold frame 365 fit together to form a liquid crystal display device.

The display operation of such a liquid crystal display device will now be described in detail.

The signal controller 600 is configured to control the input image signals R, G, and B and their display from an external graphic controller (not shown), for example, a vertical synchronization signal Vsync and a horizontal synchronization signal ( Hsync, main clock MCLK, and data enable signal DE are provided. The signal controller 600 properly processes the image signals R, G, and B according to the operating conditions of the liquid crystal panel assembly 300 based on the input image signals R, G, and B and the input control signal, and controls the gate control signal. After generating the CONT1, the data control signal CONT2, the backlight control signal CONT3, and the like, the signal controller 600 then emits the gate control signal CONT1 to the gate driver 400 and the data control signal CONT2. The processed image signal DAT is sent to the data driver 500, and the backlight control signal CONT3 is sent to the backlight unit 340.

The gate control signal (CONT1) includes a gate-on voltage vertical synchronization start signal (STV) for instructing the start of output of the (V _on), the gate-on voltage gated clock signal that controls the output timing of the (V _on) (CPV) and the gate-on An output enable signal OE or the like that defines the duration of the voltage V _on .

The data control signal CONT2 includes a horizontal synchronization start signal STH indicating the start of transmission of the image data DAT, a load signal LOAD for applying a data voltage to the data lines D ₁ -D _m , and a common voltage V. _com and the inverted signal RVS and the data clock signal HCLK for inverting the polarity of the data voltage (hereinafter, referred to as the polarity of the data voltage by reducing the polarity of the data voltage with respect to the common voltage).

The backlight control signal CONT3 includes a lamp blinking signal for controlling the blinking of the lamp 341, a brightness control signal for controlling the brightness of the lamp 341, an operating frequency of the inverter PCBs 950 and 960, phase adjustment, blinking timing, and the like. Synchronizing signals in the form of pulses for synchronizing the signals.

This control signal CONT1-CON3 is provided to each device 400, 500, 340 through a signal path as follows. That is, the gate control signal CONT1 is output from the signal controller 600 to transmit a signal line on the control PCB 650, a transfer line on the FPC boards 631 and 632, a signal line on the data PCBs 551, 552, and the TCP 510. And a gate line 400 and a gate TCP 410 (not shown in FIG. 4) to the gate driver 400. The data control signal CONT2 is a signal controller 600 through a signal line on the control PCB 650, a transmission line on the FPC boards 631 and 632, a signal line on the data PCBs 551 and 552, and a transmission line on the data TCP 510. ) Is provided to the data driver 500. In addition, the backlight control signal CONT3 includes a signal line on the control PCB 650, a transmission line on the FPC boards 631 and 632, a signal line on the data PCBs 551 and 552, a transmission line on the FPC boards 971 and 972, and an inverter PCB. The signal controller 600 is provided to the inverter controllers 931 and 932 through the signal lines 911a and 911b on the 950 and 960, respectively.

The data driver 500 sequentially receives and shifts the image data DAT for one row of pixels according to the data control signal CONT2 from the signal controller 600, and the gray voltage from the gray voltage generator 800. The grayscale voltage corresponding to each image data DAT is selected to convert the image data DAT into a corresponding data voltage, and then apply the grayscale voltage to the corresponding data lines D ₁ -D _m .

The gate driver 400 applies the gate-on voltage V _on to the gate lines G ₁ -G _n in response to the gate control signal CONT1 from the signal controller 600, thereby applying the gate lines G ₁ -G _n. ) Turns on the switching element Q connected thereto, so that the data voltage applied to the data lines D ₁ -D _m is applied to the corresponding pixel through the turned-on switching element Q.

The difference between the data voltage applied to the pixel and the common voltage V _com is shown as the charging voltage of the liquid crystal capacitor C _LC , that is, the pixel voltage. The liquid crystal molecules vary in arrangement depending on the magnitude of the pixel voltage.

In addition, the interface units 921 and 922 of the backlight unit 340 receive the driving voltage from the voltage supply unit 700 through the cables 711a and 711b and the connectors 731, 981, 732, and 982.

The inverter controllers 931 and 932 which receive the backlight control signal CONT3 control the blinking operation of the lamp 341 according to the state of the lamp blinking signal. That is, when the state of the lamp flashing signal is a lit state, the inverter controllers 931 and 932 operate the switching units 941 and 942, and the switching units 941 and 942 are provided through the interface units 921 and 922. The DC voltage received is converted into an AC voltage and supplied to the transformers 951-954 and 961-964. Each of the transformers 951-954 and 961-964 boosts a voltage having a corresponding magnitude according to the frequency, magnitude, and turns ratio of an applied AC voltage, and then applies the lamp 341 to turn on the lamp 341. When the lamp 341 is an EEFL, the voltages applied across the lamps 341 in each pair of transformers 951-954 and 961-964 are equal in magnitude, frequency, and opposite in phase.

In addition, the inverter controllers 931 and 932 control the operating states of the switching units 941 and 942 according to the brightness control signal, so that the lamp 341 may be operated at a brightness set externally.

As such, each of the transformers 951-954, 961-964 mounted on each inverter PCB 950, 960 pairs to light one lamp 341, thus the electronic components of the two inverter PCBs 950, 960. When the operation is synchronized with each other, the operation of the lamp 341 is normally performed, and accordingly, the overall brightness of the lamp 341 is uniformly maintained.

To this end, the inverter controllers 931 and 932 match operation timings or driving frequencies with each other according to the synchronization signal input from the signal controller 610 so that the voltage of the corresponding state is applied to both ends of the lamp 341 at that time. To help.

According to the operation of the backlight unit 340, the light emitted from the lamp 341 passes through the liquid crystal layer 3, and its polarization changes according to the arrangement of the liquid crystal molecules. This change in polarization is represented by a change in the transmittance of light by the polarizer.

After one horizontal period (or 1H) (one period of the horizontal synchronization signal Hsync, the data enable signal DE, and the gate clock CPV), the data driver 500 and the gate driver 400 are arranged in the next row of pixels. Repeat the same operation for. In this manner, the gate-on voltages V _{on are} sequentially applied to all the gate lines G ₁ -G _n during one frame to apply data voltages to all the pixels. When one frame ends, the next frame starts and the state of the inversion signal RVS applied to the data driver 500 is controlled so that the polarity of the data voltage applied to each pixel is opposite to that of the previous frame (frame inversion). . In this case, the polarity of the data voltage flowing through one data line may be changed (row inversion or dot inversion) or the polarity of the data voltage applied to one pixel row may be different according to the characteristics of the inversion signal RVS within one frame. (Heat inversion, dot inversion).

5 is a view illustrating in detail a connection state and internal blocks of a liquid crystal panel assembly, an inverter PCB, and a control PCB according to another exemplary embodiment of the present invention.

As shown in Fig. 5, the signal lines 521a and 521b and the transmission lines 973a and 973b for transmitting the synchronization signal are connected to the data PCBs 551 and 552, the FPC boards 973a and 973b, and the FPC boards 536a and 536b. ) And the lower panel 100. In this case, the backlight unit 340 is a backlight control signal CONT3 such as a lamp flashing signal, a brightness control signal, etc. from the signal controller 600 mounted on the control PCB 650. Instead of receiving), it receives the backlight control signal CONT3 together with the driving voltage from the voltage supply 700 through the connectors 731, 921, 732, 922 and cables 711a, 711b. Instead of generating the synchronization signal and providing the synchronization signal to each inverter PCB 950 and 960, the signal controller 600 generates and transmits the synchronization signal from one or both sides of the inverter PCB 950 and 960. Except for this point, the structure and operation of FIG. 5 are the same as those of FIG. 4.

In this case, the signal line 535 formed on the lower panel 100 may be formed together with the data line or the gate line.

Therefore, any one of the inverter control units 931 and 932 of the inverter PCBs 950 and 960 is a transmission line of the signal lines 911a and 911b and the FPC boards 971 and 972 formed on the inverter PCBs 950 and 960. The synchronization signal is transmitted to the other inverter controllers through the signal lines 535a and 973b, the signal lines 521a and 521b on the data PCBs 551 and 552, the FPC boards 536a and 536b, and the signal lines 535 on the lower panel 100. . Accordingly, the two inverter controllers 931 and 932 synchronize the operation timing, the driving frequency, and the like according to the synchronization signal, and thus the operation of the lamp 341 is normally performed.

According to the exemplary embodiment of the present invention, the synchronization signal for synchronizing the operation between the inverters is transmitted to the inverter through a signal line formed directly on the liquid crystal panel assembly and a connection member such as an FPC board, a TPC, a connector, if necessary, and thus, There is no need to attach a separate cable for this sync signal. As a result, the manual process of attaching the cable to the liquid crystal display device and connecting to each inverter is reduced, and the manufacturing process due to the cable is reduced, thereby greatly improving the manufacturing efficiency.

In addition, signal interference with cables and other peripherals is reduced, resulting in improved operating efficiency.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

1 is an exploded perspective view of a liquid crystal display according to an exemplary embodiment of the present invention.

2 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

3 is an equivalent circuit diagram of one pixel of a liquid crystal display according to an exemplary embodiment of the present invention.

4 is a view illustrating in detail a connection state and internal blocks of a liquid crystal panel assembly, an inverter PCB, and a control PCB according to an exemplary embodiment of the present invention.

5 is a view illustrating in detail a connection state and internal blocks of a liquid crystal panel assembly, an inverter PCB, and a control PCB according to another exemplary embodiment of the present invention.

Claims (20)

A display panel including a plurality of pixels, A data driver for applying a data voltage to the pixel; A data PCB electrically connected to the data driver; First and second inverter PCBs that flash the light source by applying a voltage to a light source that provides light to the display panel Including, The data PCB includes a first signal line electrically connected to the first inverter PCB and the second inverter PCB. Display device. In claim 1, Further comprising first and second connection members connecting the data PCB and the first and second inverter PCBs, respectively, The first and second connection members each include first and second transmission lines connected to the first signal line and the first and second inverter PCBs, respectively. Display device. In claim 1, The display device further includes a control PCB mounted with a signal controller for controlling the data driver, The control PCB includes a second signal line electrically connected to the first signal line. Display device. In claim 3, The display device, Further comprising a first connecting member for connecting the data PCB and the control PCB, The first connection member includes a transmission line connected to the first signal line and the second signal line. Display device. The method according to any one of claims 1 to 4, Each of the first and second inverter PCBs, Switching unit for converting a DC voltage from the outside into the AC voltage, A transformer for boosting the AC voltage from the switching unit and applying it to the light source; and An inverter controller that controls the operation of the switching unit based on the signal from the first signal line Display device comprising a. In claim 5, And the second signal line is connected to the signal controller. In claim 5, And a signal from the first signal line is a synchronization signal for synchronizing operation timings and driving frequencies of the first and second inverter PCBs. In claim 1, The display panel further includes a second signal line electrically connected to the first signal line. In claim 8, The display device further includes a connection member connecting the data PCB and the display panel. The connection member includes a transmission line connecting the first signal line and the second signal line. Display device. In claim 1, The light source is an external electrode fluorescent lamp (EEFL). A display panel including a plurality of pixels, First and second inverter PCBs which flash the lamp by applying a voltage to a lamp that provides light to the pixel; A data driver for applying a data voltage to the pixel; First and second data PCBs electrically connected to the data driver and including first and second signal lines, respectively; A control PCB equipped with a signal controller for controlling the data driver and including a third signal line, First and second connection members connecting the first and second data PCBs and the first and second inverter PCBs, respectively; and Third and fourth connection members connecting the first and second data PCBs to the control PCB, respectively. Including; The first connection member includes a first transmission line connected to the first signal line and the first inverter PCB, The second connection member includes a second transmission line connected to the second signal line and the second inverter PCB, The third connection member includes a third transmission line connected to the first signal line and the third signal line. The fourth connection member includes a fourth transmission line connected to the second signal line and the third signal line. Display device. In claim 11, And the third signal line is connected to the signal controller. In claim 11, The first to fourth connection members are flexible printed circuit boards. In claim 11, Each of the first and second inverter PCBs, Switching unit for converting a DC voltage from the outside into the AC voltage, A transformer for boosting the AC voltage from the switching unit and applying the voltage to the lamp; An inverter controller which controls the operation of the switching unit based on the signals from the first signal line and the second signal line Display device comprising a. The method of claim 14, And a signal from the first signal line and the second signal line is a synchronization signal for synchronizing operation timings and driving frequencies of the first and second inverter PCBs. A display panel including a plurality of pixels and including a first signal line, First and second inverter PCBs which flash the lamp by applying a voltage to a lamp that provides light to the pixel; A data driver for applying a data voltage to the pixel; First and second data PCBs electrically connected to the data driver and including second and third signal lines, respectively; First and second connection members connecting the display panel and the first and second data PCBs, respectively; Third and fourth connection members connecting the first and second data PCBs and the first and second inverter PCBs, respectively. Including; The first connection member includes a first transmission line connected to the first signal line and the second signal line. The second connection member includes a second transmission line connected to the first signal line and the third signal line. The third connection member includes a third transmission line connected to the second signal line and the first inverter PCB, The fourth connection member includes a fourth transmission line connected to the third signal line and the second inverter PCB. Display device. The method of claim 16, And the first and second connection members are TCP. The method of claim 16, And the third and fourth connection members are flexible printed circuit boards. The method of claim 16, Each of the first and second inverter PCBs, Switching unit for converting a DC voltage from the outside into the AC voltage, A transformer for boosting the AC voltage from the switching unit and applying the voltage to the lamp; An inverter controller that controls the operation of the switching unit based on the signals from the second signal line and the third signal line Display device comprising a. The method of claim 19, And a synchronization signal for synchronizing operation timings and driving frequencies of the first and second inverter PCBs from the first signal line and the third signal line.