KR20050094507A - Plasma display panel and driving method thereof - Google Patents

Abstract

The present invention relates to a plasma display panel and a driving method thereof. According to the present invention, a negative voltage is applied to the address electrode while the first sustain discharge pulse is applied to the Y electrode at the beginning of the sustain period. In this way, the discharge between the Y electrode / X electrode and the address electrode is increased, so that a large amount of space charge is generated and the sustain discharge is stable, thereby improving the overall margin of the PDP.

Description

Plasma display panel and its driving method {PLASMA DISPLAY PANEL AND DRIVING METHOD THEREOF}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of driving a plasma display panel (PDP), and more particularly to a method of driving a plasma display panel for generating stable sustain discharge.

Recently, flat display devices such as liquid crystal displays (LCDs), field emission displays (FEDs), and PDPs have been actively developed. Among these flat panel display devices, PDPs have advantages of higher luminance and luminous efficiency and wider viewing angles than other flat panel display devices. Therefore, the PDP is in the spotlight as a display device to replace the conventional cathode ray tube (CRT) in a large display device of 40 inches or more.

PDPs are flat display devices that display characters or images using plasma generated by gas discharge, and dozens to millions or more of pixels are arranged in a matrix according to their size. Such PDPs are classified into a direct current type (DC type) and an alternating current type (AC type) according to the shape of the driving voltage waveform applied and the structure of the discharge cell.

In the DC-type PDP, since the electrode is exposed to the discharge space as it is, the current flows in the discharge space while voltage is applied, and there is a disadvantage in that a resistance for current limitation must be made for this purpose. On the other hand, in the AC type PDP, the electrode covers the dielectric layer, so the current is limited by the formation of a natural capacitance component, and the electrode is protected from the impact of ions during discharge.

1 is a partial perspective view of an AC plasma display panel.

As shown in FIG. 1, the scan electrode 4 and the sustain electrode 5 covered with the dielectric layer 2 and the protective film 3 are arranged in parallel on the first glass substrate 1. A plurality of address electrodes 8 covered with the insulator layer 7 are provided on the second glass substrate 6. A partition 9 is formed on the insulator layer 7 between the address electrodes 8 in parallel with the address electrode 8. In addition, the phosphor 10 is formed on the surface of the insulator layer 7 and on both side surfaces of the partition wall 9. The first glass substrate 1 and the second glass substrate 6 have a discharge space 11 therebetween so that the scan electrode 4 and the address electrode 8 and the sustain electrode 5 and the address electrode 8 are orthogonal to each other. They are arranged to face each other. The discharge space at the intersection of the address electrode 8 and the pair of the scanning electrode 4 and the sustain electrode 5 forms a discharge cell 12.

2 shows an electrode arrangement diagram of the plasma display panel.

As shown in Fig. 2, the PDP electrode has a matrix structure of m x n. Specifically, the address electrodes A1 to Am are arranged in the column direction and the n rows of scanning electrodes Y1 to the row direction. Yn) and sustain electrodes X1 to Xn are arranged in a zigzag. Hereinafter, the scanning electrode will be referred to as "Y electrode" and the sustain electrode as "X electrode". The discharge cell 12 shown in FIG. 2 corresponds to the discharge cell 12 shown in FIG.

FIG. 3 shows a driving waveform diagram of a plasma display panel according to the prior art, FIG. 4A shows the wall charge distribution after the first sustain discharge pulse is applied, and FIG. 4B shows the wall charge when the second sustain discharge pulse is applied. It is a figure which showed distribution.

As shown in Fig. 3, according to the conventional PDP driving method, each subfield is composed of a reset section, an address section, and a sustain section.

The reset section serves to erase the wall charge state of the previous sustain discharge and to set up wall charge in order to stably perform the next address discharge.

That is, after the last sustain discharge, positive charges are accumulated on the X electrode and negative charges on the Y electrode. While the address voltage is maintained at 0 V during the sustain period, a large amount of positive charge is accumulated in the address electrode because the internal voltage always tries to maintain the intermediate voltage of the sustain discharge.

After the sustain discharge is completed, the erase ramp voltage is gradually applied to the X electrode from 0 (V) to + Ve (V). Then, the wall charges formed on the X electrode and the Y electrode are gradually erased.

Thereafter, the address electrode and the X electrode are kept at 0 V, and a ramp voltage that rises slowly from the voltage Vs below the discharge start voltage to the V electrode, which is a voltage above the discharge start voltage, is applied to the Y electrode. While this ramp voltage is rising, the first weak reset discharge occurs in each of the discharge cells from the Y electrode to the address electrode and the X electrode, respectively. As a result, negative wall charges are accumulated at the Y electrode, and positive wall charges are accumulated at the address electrode and the X electrode.

Subsequently, in the second half of the reset section, while the X electrode is held at the constant voltage Ve, a ramp voltage that gently drops from the voltage Vs below the discharge start voltage to 0V over the discharge start voltage is applied to the Y electrode. While this ramp voltage falls, the second weak reset discharge occurs again in all the discharge cells. As a result, the negative wall charges of the Y electrode are reduced, and the polarity of the X electrode is inverted, so that a weak negative charge is accumulated. In addition, the positive wall charge of the address electrode is adjusted to a value suitable for the address operation.

The address section is a section in which wall charges are accumulated on cells (addressed cells) turned on by selecting cells turned on and cells not turned on in the panel.

That is, when the voltage Vsc is applied to all the Y electrodes, 0 V is sequentially applied to the Y electrode, and when 0 V is applied to the Y electrode, cells that are turned on by applying an address voltage to the address electrode selectively are applied to the discharge cells. Separate cells that do not.

The sustain section is a section in which discharge for actually displaying an image is performed on the addressed cell, and a sustain discharge voltage Vs is alternately applied to the X electrode and the Y electrode.

In this case, the wall charge refers to a charge formed in the wall of the discharge cell (eg, the dielectric layer) close to each electrode and accumulated in the electrode. Such wall charges are not actually in contact with the electrodes themselves, but here wall charges are described as "formed", "accumulated" or "stacked" on the electrodes. In addition, wall voltage refers to the potential difference formed in the wall of a discharge cell by wall charge.

On the other hand, as shown in Figure 3, after the address period is finished, the first sustain voltage pulse is applied to the Y electrode, and the X electrode and the address electrode is maintained at 0V. However, wall charges are accumulated in the X and Y electrodes of the discharge cells selected in the address section due to the address discharge. Therefore, during the first sustain discharge, strong discharge occurs between the Y electrode and the X electrode, while little discharge occurs between the Y electrode and the address electrode. That is, the address electrode makes little contribution during the first sustain discharge.

In addition, if the address discharge does not sufficiently occur in the address period or the priming particles in the cell space are not sufficient, even if the first sustain pulse is applied to the Y electrode in the sustain period, the first sustain discharge does not occur or the discharge occurs weakly so that the image may be properly formed. I can't express it.

However, if the first sustain discharge does not occur stably, the second and subsequent sustain discharges cannot occur stably, and thus the overall discharge margin efficiency of the PDP is lowered.

Therefore, the technical problem to be achieved by the present invention is to provide a driving apparatus and a driving method of the plasma display panel to increase the discharge efficiency by adjusting the first sustain discharge pulse.

A driving method of a plasma display panel according to an aspect of the present invention for achieving the technical problem is a driving method of a plasma display panel including a plurality of first electrodes, second electrodes and address electrodes,

At the beginning of the maintenance interval,

The first voltage is applied to the first electrode, and the second voltage is applied to the address electrode.

When the first voltage is applied to the first electrode, the second electrode preferably maintains 0V.

In addition, when the second voltage is applied to the address electrode, no discharge occurs in the discharge cells not selected in the address period.

The voltage of the address electrode may be maintained at the second voltage until the end of the sustain period.

According to an aspect of the present invention, a plasma display panel includes: a first substrate and a second substrate facing each other at a predetermined interval; A plurality of address electrodes arranged on the first substrate; A plurality of first electrodes and second electrodes arranged on the second substrate to intersect the address electrodes; And a driving circuit for transmitting a driving signal to the first electrode, the second electrode, and the address electrode in a reset period and an address period and a sustain period.

The drive circuit,

The second voltage, which is a negative voltage, is applied to the address electrode at the beginning of the sustain period.

The voltage of the address electrode is maintained at the second voltage until the end of the sustain period.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention. In the drawings, parts irrelevant to the description are omitted in order to clearly describe the present invention. Like parts are designated by like reference numerals throughout the specification.

First, the driving waveform according to the first embodiment of the present invention will be described in detail with reference to FIG. 4.

4 is a view showing a driving waveform according to the first embodiment of the present invention.

As shown in FIG. 4, according to the first embodiment of the present invention, when the first sustain discharge pulse is applied to the Y electrode in the initial sustain period, the voltage of the X electrode is maintained at a negative voltage of 0 V at the address electrode. Apply (Vsa).

After the end of the address period, positive wall charges are formed on the Y electrode of the selected cell, and negative wall charges are formed on the X electrode and the address electrode. Therefore, when the sustain discharge pulse is applied to the Y electrode and the voltage of the address electrode is lowered to a negative voltage Vsa, the sustain discharge occurs not only between the X electrode and the Y electrode but also between the address electrode and the Y electrode.

As the first maintenance discharge is actively generated, the wall charge and the space charge which are formed also increase, so that the second and subsequent maintenance discharges occur more effectively.

At this time, if the negative voltage Vsa applied to the address electrode is too low, there is a risk that a false discharge may occur in a cell in which the address discharge has not occurred during the address period. Therefore, the negative voltage Vsa applied to the address electrode may cause such a false discharge. It is preferable to apply at an appropriate level that does not.

Meanwhile, in the first embodiment of the present invention, the voltage of the address electrode is lowered to the negative voltage Vsa only while the first sustain discharge pulse is applied to the Y electrode. However, the address electrode is negatively applied to the address electrode over the entire sustain period. The voltage Vsa may be applied.

5 is a view showing a drive waveform according to the second embodiment of the present invention.

As shown in FIG. 5, when the first sustain discharge pulse is applied to the Y electrode in the initial sustain period, the voltage of the X electrode is 0V and the voltage of the address electrode is negative voltage (Vsa). )to be.

Therefore, after the first sustain discharge pulse is applied, negative charges are accumulated at the Y electrode and positive charges are accumulated at the X electrode and the address electrode. In this state, a second sustain discharge pulse is applied to the X electrode, the Y electrode maintains 0 V, and the address electrode continues to maintain a negative voltage Vsa.

Then, since the voltage difference between the X electrode and the address electrode becomes larger than when 0 V is applied to the address electrode, not only the discharge between the X electrode and the Y electrode but also the discharge between the X electrode and the address electrode during the second sustain discharge are increased.

During the third and subsequent discharges, this process is repeated, so that not only the surface discharge between X-Y but also the opposite discharge between X-A or Y-A contributes to the maintenance discharge, and the maintenance discharge occurs more effectively.

Although the preferred embodiment of the present invention has been described in detail above, the present invention is not limited thereto, and various other changes and modifications are possible.

As described above, according to the embodiment of the present invention, when the sustain discharge pulse is applied in the sustain period of the PDP driving waveform, the sustain discharge is made stable by applying a negative voltage to the address electrode, which results in overall margin of the PDP. Is improved.

1 is a partial perspective view of an AC plasma display panel.

2 is an arrangement diagram of electrodes of a plasma display panel.

3 is a driving waveform diagram of a conventional plasma display panel.

4 is a driving waveform diagram of a plasma display panel according to a first embodiment of the present invention.

5 is a driving waveform diagram of a plasma display panel according to a second embodiment of the present invention.

Claims (6)

In the method of driving a plasma display panel comprising a plurality of first electrodes, second electrodes and address electrodes, At the beginning of the maintenance interval, And applying a first voltage having a positive voltage to the first electrode and a second voltage having a negative voltage to the address electrode. The method of claim 1, And when the first voltage is applied to the first electrode, the second electrode maintains 0V. The method of claim 1, And when the second voltage is applied to the address electrode, no discharge occurs in the discharge cells not selected in the address period. The method of claim 1, And maintaining the voltage of the address electrode at the second voltage until the end of the sustain period. A first substrate and a second substrate opposed to each other at a predetermined interval; A plurality of address electrodes arranged on the first substrate; A plurality of first electrodes and second electrodes arranged on the second substrate to intersect the address electrodes; And A plasma display panel comprising: a driving circuit for transmitting a driving signal to the first electrode, the second electrode, and the address electrode in a reset period and an address period and a sustain period; The drive circuit, A second voltage that is a negative voltage is applied to the address electrode at the beginning of the sustain period. Plasma display panel. The method of claim 5, The drive circuit, Maintaining the voltage of the address electrode as the second voltage until the end of the sustain period; Plasma display panel.