KR20050065946A - Driving method of electro luminescence panel - Google Patents

Abstract

A method of driving an electroluminescence panel according to the present invention includes a pair of scan lines (first scan line and a second scan line), data lines arranged to intersect the pair of scan lines, and the pair A method of driving an EL panel comprising an EL cell (OLED) provided at an intersection of a scan line and a data line of the pixel and a pixel provided with an EL cell driving circuit for driving the EL cell.

applying a first scan signal to a first scan line connected to the n-th pixel and a first scan line connected to the n + 1-th pixel by overlapping a predetermined portion; Applying a second scan signal to a second scan line of the nth pixel while the first scan signal is superimposed on the nth pixel and n + 1th pixel; Synchronizing with the second scan signal applied to the n-th pixel, and applying a second scan signal to the second scan line of the n + 1 th pixel after completion of the input of the second scan signal. It is done.

Description

Driving method of electro luminescence panel

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electroluminescent panel, and more particularly, to a method of driving an electroluminescent panel that overcomes a decrease in aperture ratio while increasing a width ratio of a thin film transistor forming a current mirror in a current driven electroluminescent panel. It is about.

Recently, various flat panel displays have been developed to reduce weight and volume, which are disadvantages of cathode ray tubes.

Such flat panel displays include a liquid crystal display (LCD), a field emission display, a plasma display panel (PDP), and an electroluminescence (EL). There is a display device, and studies are being actively conducted to improve the display quality and to make a large screen for such a flat panel display device.

Among the flat panel display devices, the EL element is a self-luminous element that emits self, and displays an image or an image by exciting a fluorescent material using carriers such as electrons and holes, and is capable of driving at a low DC voltage and having a fast response speed. There is an advantage.

1 is a diagram schematically showing a conventional EL panel.

Referring to FIG. 1, the EL panel includes gate lines GL1 to GLm and data lines DL1 to DLn, gate lines GL1 to GLm, and a data line arranged on the substrate 10 to cross each other. Pixel elements PE are arranged at each of the intersections of DL1 to DLn.

Each of the pixel elements PE is driven when gate signals of the gate lines GL1 to GLn are enabled to generate light corresponding to the magnitude of the pixel signal on the data line DL.

In order to drive such an EL panel, the gate driver 12 is connected to the gate lines GL1 to GLm, and the data driver 14 is connected to the data lines DL1 to DLn. The gate lines GL1 through GLm are sequentially driven, and the data driver 14 supplies the pixel signals to the pixels PE through the data lines DL1 through DLn.

FIG. 2 is a circuit diagram showing an embodiment of the pixel element shown in FIG. 1, which is a circuit structure for one pixel element PE of the current-driven EL panel.

Referring to FIG. 2, the pixel element PE is a driving circuit applied to an intersection portion of the gate line GL and the data line DL, and includes four TFTs T1, T2, T3, and T4. And an EL cell OLED connected to the front panel GND, and an EL cell OLED driving circuit 16 connected between the EL cell OLED and the data line DL. 16, first and second PMOS TFTs T1 and T2 connected to form an electric current mirror on the EL cell OLED and the supply voltage line VDD; A third PMOS TFT T3 connected to the first PMOS TFT T1, the data line DL, and the gate line GL and responsive to a signal on the gate line GL; A fourth PMOS TFT (T4) connected to the gate electrode, the gate line (GL), and the third PMOS TFT (T3) of the first PMOS TFT (T1) and the second PMOS TFT (T2); A capacitor C _ST connected between the gate electrode of the first PMOS TFT T1 and the second PMOS TFT T2 and the supply voltage line VDD is provided.

In operation, when the low input signal is input to the gate line GL, the third PMOS TFT T3 and the fourth PMOS TFT T4 are turned on. When the third PMOS TFT T3 and the fourth PMOS TFT T4 are turned on, a video signal having a constant magnitude inputted in synchronization with the scan signal from the data line DL is input to the third PMOS TFT T3 and the fourth. The capacitor Cst is charged through the PMOS TFT T4.

The capacitor Cst is connected to the gate electrode and the supply voltage VDD of the first PMOS TFT T1 and the second PMOS TFT T2 and supplied from the data line DL during the low input time of the gate line GL. The video signal being charged.

In addition, the capacitor Cst holds a video signal supplied and charged from the data line DL for one frame. Due to this holding time, the capacitor Cst maintains that the video signal supplied from the data line DL is supplied to the EL cell OLED. In this structure, the number of data lines DL for inputting each image signal should be provided as long as each video signal such as RGB is input.

After being held for one frame, the video signal charged in the capacitor Cst is supplied to the EL cell OLED to display an image on the display panel.

However, in the conventional technology, since a very small current is used as the driving current Id input to the data line DL, the storage capacitor Cst is charged / discharged with the driving current Id within a limited gate line scanning time. There is a difficulty in changing to the corresponding voltage. Here, the gate line scan time refers to the time when the third and fourth PMOS TFTs T3 and T4 are turned on at the same time.

Also, in the current mirror circuit as described above, if the ratio of the width and length of the first PMOS TFT T1 and the second PMOS TFT T2 is the same, a current having the same magnitude is equal to that of the first PMOS TFT ( T1) and the second PMOS TFT (T2).

However, if the ratio of the first PMOS TFT T1 and the second PMOS TFT T2 is K: 1, the current flowing to the second PMOS TFT T2, that is, the current I _OLED applied to the EL cell _OLED is A current having a magnitude 1 / K times the current Id flowing to the first PMOS TFT T1 flows.

Here, K is the ratio of the width and length of the first PMOS TFT (T1) to the width and length of the second PMOS TFT (T2) (W1 / L1: W2 / L2).

Therefore, the current I _OLED flowing through the EL cell OLED and the current Id flowing through the data line are proportional to the ratio of the widths of the T2 and the T1, that is, the larger the ratio, As the width of T1 is increased, the amount of current Id supplied through the data line may be proportionally increased, thereby enabling charging of the data line of a large load.

However, when the width of the T1 is increased, the size of the T1 is also increased, resulting in a decrease in the aperture ratio of the pixel.

Further, in the structure, the third and fourth PMOS TFTs T3 and T4 are connected to the same one gate line and turned on at the same time according to a gate signal applied to the gate line. In this case, the resistance of the gate line Since it gradually increases along the gate line, the gate signal is delayed and distorted.

This delay and distortion of the gate signal affects the value of the left and right luminance difference between the charged voltage of the capacitor, and thus, the luminance and the image quality of the entire panel are deteriorated.

According to the present invention, a thin film transistor (T1) for forming a current mirror provided in each of the neighboring pixels by driving the first scan signal of the pixels adjacent to each other up and down for a predetermined period in a current driven type electro luminescence panel. Is connected in parallel to generate an effect of increasing the width of the thin film transistor, and thus an object of the present invention is to provide a method of driving an electroluminescent panel that overcomes the decrease in aperture ratio.

In order to achieve the above object, a method of driving an electroluminescence panel according to the present invention includes a pair of scan lines (a first scan line and a second scan line) and data arranged to intersect the pair of scan lines. 10. A driving method of an EL panel comprising a line, a pixel having an EL cell (OLED) provided at an intersection of the pair of scan lines and a data line, and an EL cell driving circuit for driving the EL cell.

applying a first scan signal to a first scan line connected to the n-th pixel and a first scan line connected to the n + 1-th pixel by overlapping a predetermined portion; Applying a second scan signal to a second scan line of the nth pixel while the first scan signal is superimposed on the nth pixel and n + 1th pixel; Synchronizing with the second scan signal applied to the n-th pixel, and applying a second scan signal to the second scan line of the n + 1 th pixel after completion of the input of the second scan signal. It is done.

Here, the EL cell driving circuit includes: first and second driving thin film transistors D1 and D2 connected to form a current mirror on the supply voltage line VDD; A first switching TFT S1 connected to the first driving TFT D1, the data line DL, and the first scan line SCAN1 in response to a signal from the first scan line SCAN1; A second switching TFT (S2) connected in series with the first switching TFT (S1) and connected to a second scan line (SCAN2) and responsive to a signal on a second scan line (SCAN2); A storage capacitor C _S connected between the gate electrode of the second driving TFT D2 and the supply voltage line VDD is included.

The method may further include applying a video signal having a predetermined size to each pixel in synchronization with the sequentially applied second scan signal.

The first scan signal superimposed on the n + 1 th pixel may be simultaneously applied to the first scan signal applied to the n th pixel.

In addition, the second scan signal applied to the nth pixel may be simultaneously applied to the first scan signal applied to the nth pixel.

The pulse width of the second scan signal may be 1/2 of the pulse width of the first scan signal.

According to the present invention, the effect of increasing the width of the thin film transistor forming the current mirror occurs, thereby overcoming the reduction of the aperture ratio, thereby improving the brightness and image quality due to the high aperture ratio.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

Fig. 4 is a circuit diagram showing a pixel element formed in the EL panel according to the present invention, which shows the circuit structure of predetermined pixel elements adjacent up and down with respect to the current driving EL panel.

Referring to FIG. 4, the pixel elements are respectively provided at the intersections of the gate lines SCAN1 and SCAN2 and the data line DL, which are EL cells OLED connected to the base electrode GND, and EL. An EL cell OLED driving circuit 46 connected between the cell OLED and the data line DL is provided.

In the present invention, the gate lines SCAN1 and SCAN2 are formed in pairs, and thus, each pixel includes a first scan line SCAN1_n, SCAN1_n + 1, ..., and a second scan line SCAN2_n, SCAN2_n +. 1, ...) is connected.

Further, the EL cell driving circuit 46 is composed of a pair of switching TFTs, a pair of driving TFTs, and a capacitor Cs, and the pair of switching TFTs is formed of a second TFT. It is divided into a first switching TFT (S1) and a second switching TFT (S2), and the pair of driving thin film transistors are divided into a first driving TFT (D1) and a second driving TFT (D2).

Here, a gate electrode of the first switching TFT S1 is connected to the first scan line SCAN1, a source electrode is connected to a data line, and the second switching TFT S2 is a first switching TFT ( It is connected in series with S1).

In addition, the gate electrode of the second switching TFT S2 is connected to the second scan line SCAN2, and the drain electrode of the second switching TFT S2 faces the first and second driving TFTs D1, which face each other. In D2), the gate electrode of the second driving TFT D2 is connected, and the drain electrode of the second driving TFT D2 is connected with the anode electrode of the EL cell OLED.

Further, the gate electrode of the first driving TFT D1 and the drain electrode are connected between the first and second switching TFTs S1 and S2 connected in series, that is, the drain electrode of the first switching TFT S1 and the second switching TFT. It is connected to the source electrode of S2, and as a result, the first driving TFT D1 serves as a diode.

In addition, the source electrodes of the first and second driving TFTs D1 and D2 are connected to the supply voltage line VDD, the cathode electrode of the EL cell OLED is grounded, and the storage capacitor Cs is the first electrode. The gate electrodes of the second driving TFTs D2 and the source electrodes of the first and second driving TFTs D1 and D2 are connected.

That is, the pixel element includes an EL cell (OLED); First and second driving TFTs D1 and D2 connected to supply voltage lines VDD to form current mirrors; A first switching TFT S1 connected to the first driving TFT D1, the data line DL, and the first scan line SCAN1 in response to a signal on the first scan line SCAN1; A second switching TFT S2 connected in series with the first switching TFT S1 and connected to a second scan line SCAN2 and responsive to a signal on the second scan line SCAN2; A storage capacitor C _S is connected between the gate electrode of the second driving TFT D2 and the supply voltage line VDD.

Here, the gate electrode and the drain electrode of the first driving TFT D1 are connected between the first and second switching TFTs S1 and S2 connected in series, and as a result, serve as a diode.

5 is a timing diagram of a signal applied to drive a pixel element of an EL panel according to an embodiment of the present invention.

For convenience of description, FIG. 5 illustrates that the first scan signals for two adjacent pixels are overlapped and driven, but the embodiment is not limited thereto.

4 and 5, the operation of the pixel element of the EL panel according to the present invention will be described.

As shown in FIG. 5, when a low input signal (first scan signal SCAN1_n) is input to the first scan line for the nth pixel, the first scan line for the n + 1th pixel is input to the nth pixel. Also, the row input signals SCAN1_n + 1 having the same pulse width are overlapped and input.

In addition, although the input signal of the second scan line (second scan signal SCAN2_n) for the nth pixel is input simultaneously with the first scan signal SCAN1_n, the pulse width thereof is the first scan signal pulse width. Less than, and the input signal SCAN2_n + 1 of the second scan line with respect to the n + 1th pixel is synchronized with the second scan signal SCAN2_n input to the nth pixel with the second scan signal SCAN2_n Input is completed after). That is, the second scan signals SCAN2_n, SCAN2_n + 1, SCAN2_n + 2, and SCAN2_n + 3 ... are sequentially applied to each pixel.

In addition, a video signal having a predetermined size is also applied to each pixel in synchronization with the sequentially applied second scan signals SCAN2_n, SCAN2_n + 1, SCAN2_n + 2, and SCAN2_n + 3. 2 is charged in the capacitor Cs via the switching TFTs S1 and S2. As described above, the input of the signal is performed in the same manner with respect to the n + 2 and n + 3 th pixels.

As a result, the first scan signals SCAN1_n and SCAN1_n + 1 input to the pixels adjacent to each other (upper and lower) (nth pixel and n + 1th pixel, n + 2th pixel and n + 3th pixel, ...). ) Is applied to the pixels adjacent to each other up and down with the same pulse width and overlapped with each other, whereas the second scan signal SCAN2 is applied from top to bottom, that is, the nth pixel regardless of whether the pixels are adjacent to each other. Are sequentially applied with a predetermined pulse width in order of the n + 1 th pixel.

Here, for example, the pulse width of the second scan signal SCAN2 may be driven at half the pulse width of the first scan signal SCAN1. However, this is not limited thereto.

However, in order to reduce distortion caused by feed through, it is preferable to drive the second scan signal smaller than the first scan signal.

When the first scan signals SCAN1_n and SCAN1_n + 1 are superimposed on the above-described method, that is, when the first scan signals SCAN1_n and SCAN1_n + 1 are applied to each other, the upper and lower adjacent ones are applied. The first switching TFTs of the pixels (for example, the nth pixel and the n + 1th pixel) are turned on at the same time.

As described above, when the first switching TFTs of the upper and lower adjacent pixels are turned on at the same time, the first driving TFT of the nth pixel and the first driving TFT of the n + 1th pixel are connected in parallel.

In addition, the second scan signal SCAN2_n applied to the n-th pixel is input with a pulse width smaller than the pulse width of the first scan signal SCAN1_n simultaneously with the first scan signal SCAN1_n. After the second scan signal SCAN2_n is input, the second scan signal SCAN2_n + 1 having the same pulse width as the second scan signal input to the nth pixel is sequentially input to the n + 1th pixel. Is entered.

 Therefore, even if the first scan signals SCAN1_n, SCAN1_n + 1, ... are superimposed on the pixels adjacent to each other, the second scan signals SCAN2_n, SCAN2_n + 1, ... are sequentially applied to each pixel. ) And a second switching TFT S2 turned on by the second scan signals SCAN2_n, SCAN2_n + 1, ... to control the second driving TFT D2. As a result, independent operation of each pixel is guaranteed.

In addition, when the first switching TFTs are turned on at the same time by driving the first scan signals SCAN1_n and SCAN1_n + 1 to the pixels adjacent to each other in the upper and lower regions, a data line is provided through the first switching TFT. The video signal applied from is simultaneously applied to the first driving TFT of the nth pixel and the first driving TFT of the n + 1th pixel. That is, the first driving TFT of the nth pixel and the first driving TFT of the n + 1th pixel are connected in parallel.

In this case, when the second scan signal SCAN2_n is applied to the nth pixel while the first scan signals SCAN1_n and SCAN1_n + 1 are overlapped, the nth pixel is driven, where the first pixel of the nth pixel is driven. Since the driving TFT D1 is connected in parallel with the first driving TFT D1 of the n + 1 th pixel, the width of the first driving TFT D1 of the n th pixel is doubled. And eventually increase the current in the data line.

Similarly, when the second scan signal SCAN2_n + 1 is applied to the n + 1 th pixel while the first scan signals SCAN1_n and SCAN1_n + 1 are overlapped, the n + 1 th pixel is driven, where n + Since the first driving TFT D1 of the first pixel is connected in parallel with the first driving TFT D1 of the nth pixel, the width of the first driving TFT D1 'of the n + 1th pixel is consequently. This doubling effect occurs, resulting in a doubling of the current in the data line.

6 is a timing diagram of a signal according to another embodiment applied to drive a pixel element of an EL panel according to the present invention.

This causes the effect of doubling the width of the first driving TFT of each pixel by driving the pixels in the same manner as described with reference to FIG. 5 so that the current of the data line is also doubled.

That is, the first scan signals SCAN1_n, SCAN1_n + 1, ... are superimposed on the pixels adjacent to each other up and down, except that the embodiment of FIG. 6 has the same pulse width as shown in FIG. Instead of applying the first scan signals SCAN1_n, SCAN1_n + 1, ... at the same time, the first scan signals SCAN1_n, SCAN1_n + 1, ... with a certain time difference so as to overlap only a predetermined portion. Is to apply.

Accordingly, referring to FIGS. 4 and 6, the second scan signal SCAN2_n is applied to the nth pixel while the first scan signals SCAN1_n and SCAN1_n + 1 are applied to the nth pixel and the n + 1th pixel. When the n th pixel is driven, the first driving TFT D1 of the n th pixel is connected in parallel with the first driving TFT D1 ′ of the n + 1 th pixel. An effect in which the width of the first driving TFT D1 of the second pixel is doubled occurs, and thus, the current of the data line can also be doubled.

Similarly, if the second scan signal SCAN2_n + 1 is applied to the n + 1 pixel while the first scan signals SCAN1_n and SCAN1_n + 1 are overlapped and applied to the n + 1 th pixel and the n + 2 th pixel, the n The +1 th pixel is driven, where the first driving TFT D1 ′ of the n + 1 th pixel is connected in parallel with the first driving TFT D1 ″ of the n + 2 th pixel. The width of the first driving TFT D1 ′ of the n + 1 th pixel is increased by two times, and thus the current of the data line can also be doubled.

The embodiments of the present invention described above are merely illustrative for explaining the method of driving the electro luminescence according to the present invention, and those skilled in the art will understand that various and equivalent examples are possible therefrom. will be. Therefore, the true scope of the present invention will be defined by the claims.

According to the electroluminescence driving method of the present invention, the width of the thin film transistor forming the current mirror is increased, thereby overcoming the reduction of the aperture ratio, thereby improving the brightness and image quality due to the high aperture ratio. There is this.

1 is a diagram schematically showing a conventional EL panel.

FIG. 2 is a circuit diagram illustrating an embodiment of the pixel device shown in FIG. 1. FIG.

3 is a timing diagram for driving the pixel element of FIG. 2;

4 is a circuit diagram showing a pixel element formed in an EL panel according to the present invention;

5 is a timing diagram of a signal applied to drive a pixel element of an EL panel according to the present invention;

Fig. 6 is a timing diagram of a signal according to another embodiment applied to drive a pixel element of an EL panel according to the present invention.

<Explanation of symbols for the main parts of the drawings>

46: EL cell driving circuit

Claims (9)

An EL cell provided at a pair of scan lines (first scan line and second scan line), a data line arranged to intersect the pair of scan lines, and an intersection of the pair of scan lines and data lines A method for driving an EL panel comprising an OLED and a pixel provided with an EL cell driving circuit for driving the EL cell, applying a first scan signal to a first scan line connected to the n th pixel and a first scan line connected to the n + 1 th pixel by a predetermined overlap; Applying a second scan signal to a second scan line of the nth pixel while the first scan signal is superimposed on the nth pixel and n + 1th pixel; Synchronizing with the second scan signal applied to the n-th pixel, and applying a second scan signal to the second scan line of the n + 1 th pixel after completion of the input of the second scan signal. A method of driving an electroluminescent panel. The method of claim 1, The EL cell driving circuit includes: first and second driving thin film transistors D1 and D2 connected to form a current mirror on a supply voltage line VDD; A first switching TFT S1 connected to the first driving TFT D1, the data line DL, and the first scan line SCAN1 in response to a signal from the first scan line SCAN1; A second switching TFT (S2) connected in series with the first switching TFT (S1) and connected to a second scan line (SCAN2) and responsive to a signal on a second scan line (SCAN2); And a storage capacitor (C _S ) connected between the gate electrode of the second driving TFT (D2) and the supply voltage line (VDD). The method of claim 1, And applying a video signal having a predetermined size to each of the pixels in synchronization with the sequentially applied second scan signal. The method of claim 1, And the first scan signal superimposed on the n + 1 th pixel is simultaneously applied with the first scan signal applied to the n th pixel. The method of claim 1, And the second scan signal applied to the nth pixel is simultaneously applied with the first scan signal applied to the nth pixel. The method of claim 1, And the pulse width of the second scan signal is 1/2 of the pulse width of the first scan signal. The method of claim 1, A method of driving an electroluminescence panel, wherein a first scan signal having a same pulse width is applied to a first scan line connected to the nth pixel and a first scan line connected to the n + 1th pixel by overlapping a predetermined portion. . The method of claim 1, The second scan signal having a pulse width smaller than the pulse width of the first signal is applied to the second scan line of the nth pixel while the first scan signal is superimposed on the nth pixel and the n + 1th pixel. A method of driving an electroluminescent panel, characterized in that the. The method of claim 1, The second scan signal having the same pulse width as the second scan signal after the completion of the input of the second scan signal is synchronized with the second scan signal applied to the nth pixel, and thus the second scan signal of the n + 1 th pixel. A method for driving an electro luminescence panel, characterized in that applied to the scan line.