KR20050027390A - Semicoductor apparatus having load lock chamber - Google Patents

Abstract

A bit of semiconductor equipment with a loadlock chamber is provided to restrain a native oxide layer from being formed on an uppermost wafer in a wafer cassette by using a vacuum port with a higher position than that of the uppermost wafer. A plurality of wafers are stored in a cassette(150). A loadlock chamber(120) includes an inner space for loading the cassette enough and at least one vacuum port. A bit of process equipment(100) is connected through the inner space of the loadlock chamber by using an opening/closing part. The vacuum port is arranged at a higher position than that of an uppermost wafer of the cassette.

Description

Semiconductor equipment having a load lock chamber

The present invention relates to semiconductor equipment, and more particularly, to semiconductor equipment having a load lock chamber.

Among semiconductor processes for manufacturing semiconductor devices, there are semiconductor processes performed in a space in which ultra vacuum is formed. This is because various gases included in the air directly or indirectly affect the semiconductor device according to the tendency of the semiconductor device to be ultra-fine. For example, oxygen or water vapor in the air may form a native oxide film on the surface of the wafer used as the semiconductor substrate. When the natural oxide film, which is an insulating film, is formed between patterns requiring electrical connection, the contact resistance between the patterns can be greatly increased. In some cases, the natural oxide layer may completely insulate the patterns. In addition, when certain gases in the air are included in the deposition film, the properties of the deposition film may be degraded, causing defects in the semi-element.

In general, since forming a super vacuum requires a long process time and a lot of energy, semiconductor equipment performing the semiconductor processes requiring the ultra-vacuum always maintains the inside of the process equipment in which the process is performed. . In particular, long process times for ultra-vacuum are one of the important factors that reduce the throughput of semiconductor processes. As a result, the semiconductor equipment requiring the ultra-vacuum may generally have a load lock chamber connected to the process equipment.

Typically, the load lock chamber is used as a buffering area for drawing wafers from the outside into the process equipment which is in a super vacuum state or from the process equipment. Briefly, a method of drawing external wafers into the process equipment is first introduced into the load lock chamber, the load lock chamber is sealed, and the inside of the load lock chamber is evacuated. The load lock chamber has a relatively smaller internal space than the process equipment. Because of this, the process time required for evacuating the load lock chamber is very short compared to the process time required for evacuating the process equipment. Subsequently, when the internal vacuum degree of the load lock chamber is equal to or close to the vacuum degree of the process equipment, the load lock chamber and the process equipment are in communication with each other, and the wafers in the load lock chamber are moved to the process equipment to provide a semiconductor Perform the process.

The structure of the conventional load lock chamber is briefly described with reference to FIG.

1 is a schematic view showing a load lock chamber of a conventional semiconductor equipment.

Referring to FIG. 1, the load lock chamber 1 has an internal space in which the cassette 5 can be loaded. The cassette 5 may be equipped with a plurality of wafers (W). Typically, the wafers W are mounted in the cassette 5 and moved or stored.

A vacuum port 2 is disposed on the lower sidewall of the load lock chamber 1. At this time, the vacuum port 2 is disposed below the cassette 5 when the cassette 5 is loaded. A vacuum pipe 3 is connected to the vacuum port 2, and a vacuum pump (not shown) is connected to the vacuum pipe 3.

In the above-described conventional load lock chamber 1, while evacuating the internal space of the load lock chamber 1, the load lock chamber 1 of the load lock chamber 1 by the vacuum pressure transmitted through the vacuum port (2) In the internal space, a flow of gas 6 can occur. At this time, the vacuum port 2 is disposed on the lower side wall of the load lock chamber 1, so that the gas flow 6 is directed from the top to the bottom in the load lock chamber. As a result, the upper surface (the surface on which the semiconductor element is formed) of the wafer W disposed on the uppermost layer in the cassette 5 may be exposed to the gas flow 6. That is, the amount of oxygen or water vapor in the gases in contact with the upper surface of the uppermost wafer W may be increased. As a result, the amount of natural oxide film formed on the upper surface of the wafer W of the uppermost layer can be increased.

The thickness of the natural oxide film formed on the uppermost wafer W will be described with reference to FIGS. 2 and 3.

FIG. 2 is a view showing a cassette loaded and unloaded in a conventional load lock chamber in the A direction, and FIG. 3 is a graph showing thicknesses of natural oxide films of regions of a wafer located at an uppermost layer in the cassette of FIG. 2.

1, 2 and 3, the cassette 5 is introduced into the load lock chamber 1, the inside of the load lock chamber 1 is formed to a predetermined vacuum, and then air is again injected. And the cassette 5 was unloaded.

In FIG. 2, planar regions 10, 11, 12, 13, 14, 15, and 16 of the top layer wafer W in the unloaded cassette 5 are measured. The first region 10 corresponds to the central region of the uppermost wafer W, and is covered by the cassette 5 but adjacent to the portion exposed downward. The second and third regions 11 and 12 correspond to the left and right regions of the uppermost wafer W, respectively, all of which are completely covered by the cassette 5. In other words, the lower and upper portions adjacent to the second and second regions 11 and 12 are also covered by the cassette 5. The fourth region 13 corresponds to the top region of the wafer W, a portion of which is covered by the cassette 5 and another portion thereof is exposed. The fifth region 14 is located between the central region and the bottom region of the uppermost wafer W, and the fifth region 14 is also partially covered by the cassette 5, and its The other part is exposed. The sixth and seventh regions 15 and 16 correspond to the lower regions of the uppermost wafer W, all of which are exposed.

The thicknesses of the natural oxide films measured in the regions 10, 11, 12, 13, 14, 15, and 16, respectively, are shown in FIG. 3. As shown in FIG. 3, the regions 10, 13, 14, and 15 having different thicknesses of the natural oxide film measured in the second and third regions 11 and 12 completely covered by the cassette 5. It is relatively thin as compared with (16). In contrast, the thicknesses of the natural oxide film measured in the sixth and seventh regions 15 and 16, which are completely exposed regions, are formed relatively thicker than the other regions 10, 11, 12, 13, and 14. . The first, fourth, and fifth regions 10, 13, and 14, which are partially exposed or adjacent to the exposed portion, are thicker than the second and third regions 11, 12, and the sixth and sixth and third regions, respectively. A thin natural oxide film was measured as compared with the seventh regions 15 and 16. This means that the sixth and seventh regions 15 and 16 are in contact with a larger amount of water vapor or oxygen than the other regions 11, 12, 13 and 14. That is, due to the flow of gas 6 generated by the vacuum pressure supplied to the vacuum port 5, it means that the exposed part is in contact with a greater amount of gas. The natural oxide layer may increase the contact resistance of the semiconductor device, and may insulate the patterns to be electrically connected to each other. As a result, a defect of a semiconductor element may arise and productivity may fall.

An object of the present invention is to provide a semiconductor device having a load lock chamber that can minimize the generation of a natural oxide film that can be formed on the upper surfaces of the wafers.

To provide a semiconductor device having a load lock chamber for solving the above technical problem. The equipment includes a load lock chamber having an internal space in which a cassette in which a plurality of wafers are mounted can be loaded, and in which at least one vacuum port is formed. On one side of the load lock chamber is disposed a process facility in communication with the internal space of the load lock chamber by the opening and closing means. The vacuum port is disposed higher than the top wafer of the cassette loaded into the load lock chamber.

Specifically, the semiconductor device preferably further comprises a vacuum pipe connected to the vacuum port, and a vacuum generating means connected to the vacuum pipe. The vacuum port may be formed on an upper side wall or an upper wall of the load lock chamber. The semiconductor equipment may further include particle blocking means disposed in the load lock chamber. The particle blocking means is spaced apart from the cassette loaded in the load lock chamber, and preferably covers the top wafer in the cassette. In this case, the vacuum port may be disposed higher than the particle blocking means.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the present invention is not limited to the embodiments described herein and may be embodied in other forms. Rather, the embodiments introduced herein are provided to ensure that the disclosed subject matter is thorough and complete, and that the spirit of the present invention to those skilled in the art will fully convey. Therefore, the shape of the elements in the drawings are exaggerated to emphasize a clearer description. Portions denoted by like reference numerals denote like elements throughout the specification.

4 is a diagram illustrating a semiconductor device having a load lock chamber according to a preferred embodiment of the present invention, and FIG. 5 is a cross-sectional view illustrating the load lock chamber of FIG. 4.

4 and 5, a semiconductor device according to a preferred embodiment of the present invention includes a process equipment 100 in which a predetermined semiconductor process is performed. The process facility 100 may perform semiconductor processes performed in ultra vacuum. For example, the process facility 100 may perform a process of depositing a material film by chemical vapor deposition, a process of depositing a material film by physical vapor deposition, or a process of dry etching the material film. The process facility 100 may include at least one process chamber (not shown) having an internal space in which a predetermined semiconductor process is performed. In addition, a transfer chamber (not shown) that may be opened and closed with respect to the process chamber may be further included.

The load lock chamber 120 is disposed on one side of the process facility 100. The load lock chamber 120 has an internal space in which the cassette 150 on which the plurality of wafers 155 is mounted can be loaded. The process facility 100 may communicate with an internal space of the load lock chamber 120 by the opening and closing means 110. When the process facility 100 has only the process chamber, the load lock chamber 120 may be directly connected to the process chamber. In this case, the opening and closing means 110 may communicate or block the process chamber and the load lock chamber 120. Alternatively, when the process facility 100 has the process chamber and the transfer chamber, the load lock chamber 120 may be connected to the transfer chamber. That is, the opening and closing means 110 may communicate or block the load lock chamber 120 and the transfer chamber, and the transfer chamber may be connected to the load lock chamber 120 so as to be open and close. The semiconductor device may have a plurality of the load lock chambers 120 in order to improve throughput. A cassette loading part (not shown) may be connected to one side of the load lock chamber 120 opposite to the process equipment 100. The cassette loading unit is where the cassette 150 drawn into the load lock chamber 120 from the outside or drawn out from the load lock chamber 120 is loaded. Of course, the cassette loading unit may be omitted, and the cassette 150 may be directly introduced into the load lock chamber 120, or the cassette 150 may be directly extracted from the load lock chamber 120.

At least one vacuum port 125 is formed in the load lock chamber 120. The vacuum port 125 is a passage capable of supplying a vacuum pressure to the load lock chamber 120. The vacuum port 125 may be disposed higher than the uppermost wafer 155 ′ in the cassette 150 loaded in the load lock chamber 120. The number of vacuum ports 125 formed in the load lock chamber 120 may be one or more. The vacuum port 125 may be formed on an upper sidewall or an upper wall of the load lock chamber 120.

The vacuum pipe 127 is connected to the vacuum port 125, and the vacuum pipe 127 is connected to the vacuum generating unit 130. The vacuum generating means 130 may be a vacuum pump. At least one supply port (not shown) may be disposed in the load lock chamber 120. The supply port is configured to withdraw the cassette 150 on which the wafers 155 on which a predetermined semiconductor process has been performed in the process facility 100 from the load lock chamber 120. It is a passage that can supply predetermined gases to the 120. That is, the inside of the load lock chamber 120 is a passage for supplying predetermined gases to form the same or similar pneumatic to the outside. Alternatively, the vacuum port 125 may serve as the supply port. In this case, a supply pipe (not shown) may be connected to a predetermined region of the vacuum pipe 127.

Particle blocking means 135 is preferably disposed in the load lock chamber 120. The particle blocking means 135 is spaced apart from the uppermost wafer 155 ′ in the cassette 150 loaded in the load lock chamber 120. In addition, the particle blocking unit 135 may cover the uppermost wafer 155 ′. The particle blocking means 135 may be connected to the upper inner wall of the load lock chamber 120 by a connecting means 132, as shown in FIG. Alternatively, the particle blocking means 135 may be connected to the upper inner wall of the load lock chamber 120.

The vacuum port 125 is preferably arranged higher than the particle blocking means 135.

In the semiconductor device having the above-described structure, a method of operating the semiconductor device will be described. After the cassette 150 in which the plurality of wafers W are loaded into the load lock chamber 120 is loaded, the load lock chamber 120 is closed. Subsequently, the vacuum pressure generated from the vacuum generating means 130 is supplied into the load lock chamber 120 via the vacuum pipe 127 and the vacuum port 125. The vacuum degree of the load lock chamber 120 is reduced by the vacuum pressure. In this case, the vacuum port 125 is positioned higher than the top wafer 155 ′ of the cassette 150. Accordingly, the gas flow 140 generated by the vacuum pressure is directed from the bottom of the load lock chamber 120 to the top. As a result, the top surface of the top wafer 155 ′ may be protected from the gas flow 140. Due to the gas flow 140 from bottom to top, the wafer 155 " located at the bottom layer in the cassette 150 is most exposed to the gas flow 140, and the top wafer 155 ') Is least exposed to the gas flow. In this case, the upper surface of the lowermost wafer 155 "is protected by the wafer 155 disposed directly above and the backside of the lowermost wafer 155". This gas flow is affected by 140. Thus, the top surface of the bottom wafer 155 ", on which semiconductor elements are formed, is also protected. As a result, the vacuum port 125 is disposed on top of the top wafer 155 ′, so that the top surfaces of the wafers 155 in the cassette 150 are all protected from the flow of gas 140. . As a result, it is possible to minimize the natural oxide film formed on the upper surfaces of all the wafers 155 on which the semiconductor device is formed. By minimizing the generation of the natural oxide film, it is possible to prevent the failure of the conventional semiconductor device.

In addition, the particle blocking means 135 covers an upper portion of the uppermost wafer 155 ′. Thus, even if relatively heavy particles present on top of the top wafer 155 'fall down by gravity, the top surface of the top wafer 155' is protected. In addition, the particle blocking means 135 protects the upper surface of the uppermost wafer 155 ′ from the reversed gases, even if gas reverse flow occurs.

Subsequently, when the degree of vacuum inside the load lock chamber 120 is the same as or similar to that of the process equipment 100, the opening / closing means 110 is opened so that the wafers 155 are drawn into the process equipment 100. After the opening / closing means 110 is closed to seal the process facility 100, a predetermined semiconductor process is performed. The wafers 155 on which the semiconductor process is performed may be unloaded in the reverse order of the above-described loading method.

6 shows the thickness of the native oxide film for each region of the uppermost wafer 155 ′ in the cassette 150 loaded in the load lock chamber according to the present invention.

FIG. 6 is a graph illustrating thicknesses of regions of a native oxide film of a top wafer in a cassette loaded and unloaded into the load lock chamber of FIG. 4.

5 and 6, in FIG. 6, regions 10 ′, 11 ′, 12 ′, 13 of top wafer 155 ′ in cassette 150 loaded and unloaded into load lock chamber 120. ', 14', 15 ', and 16') are shown the thicknesses of the natural oxide film measured respectively. The first, second, third, fourth, fifth, sixth and seventh regions 10 ', 11', 12 ', 13', 14 ', 15' and 16 'are shown in FIG. Corresponding to the first, second, third, fourth, fifth, sixth, and seventh regions 10, 11, 12, 13, 14, 15, and 16. As shown in FIG. 6, the thickness of the natural oxide film measured in the sixth and seventh regions 15 ′ and 16 ′, which are the exposed regions, is different from the other regions 10 ′, 11 ′, 12 ′, 13 ′. 14 '). That is, it can be seen that the generation of the native oxide film is minimized in the exposed regions 15 'and 16' of the uppermost wafer 155 '. As a result, the vacuum port 125 is disposed higher than the top wafer 155 ′, thereby forming a native oxide film that may be formed in the exposed regions 15 ′ and 16 ′ of the top wafer 155 ′. It can be minimized. Thereby, the defect of a semiconductor element can be prevented and productivity can be improved.

As mentioned above, the equipment according to the invention has a load lock chamber in which a vacuum port is formed. The vacuum port is placed higher than the top wafer in the cassette loaded into the load lock chamber. Accordingly, when a vacuum pressure is supplied to the load lock chamber through the vacuum port, a flow of gas from the bottom to the top in the load lock chamber occurs. As a result, it is possible to minimize the native oxide film that can be formed on the upper surfaces of the wafers loaded in the load lock chamber. As a result, productivity of the semiconductor device may be improved by minimizing defects of semiconductor devices formed on the upper surfaces of the wafers.

In addition, a particle blocking means covering the uppermost wafer is disposed in the load lock chamber. The particle blocking means protects the upper surface of the top layer wafer exposed from particles. In addition, even if a backflow of gas occurs in the load lock chamber, the amount of contact of the upper surface of the uppermost wafer with water vapor or oxygen in the gas can be reduced. As a result, the upper surface of the uppermost wafer can be protected from contamination of particles, and even if the backflow of the gas does not occur, it is possible to minimize the generation of the native oxide film.

1 is a schematic view showing a load lock chamber of a conventional semiconductor equipment.

2 is a view of a cassette loaded and unloaded in a conventional load lock chamber in the A direction.

FIG. 3 is a graph showing thicknesses of natural oxide films of regions of a wafer located on a top layer in the cassette of FIG. 2.

4 is a diagram illustrating a semiconductor device having a load lock chamber according to a preferred embodiment of the present invention.

5 is a cross-sectional view illustrating the load lock chamber of FIG. 4.

FIG. 6 is a graph illustrating thicknesses of regions of a native oxide film of a top wafer in a cassette loaded and unloaded into the load lock chamber of FIG. 4.

Claims (5)

A load lock chamber having an internal space in which a cassette in which a plurality of wafers are mounted can be loaded, and having at least one vacuum port formed therein; And A process equipment disposed on one side of the load lock chamber, the process equipment communicating with an inner space of the load lock chamber by an opening and closing means, wherein the vacuum port is a top wafer in the cassette loaded in the load lock chamber. Semiconductor equipment having a load lock chamber, characterized in that it is arranged higher. The method of claim 1, A vacuum pipe connected to the vacuum port; And And a vacuum generating means connected to said vacuum piping. The method of claim 1, And the vacuum port is formed on an upper side wall or an upper wall of the load lock chamber. The method of claim 1, A particle blocking means disposed in the load lock chamber, the particle blocking means spaced upwardly from a cassette loaded in the load lock chamber, wherein the particle blocking means covers a top wafer in the cassette. Semiconductor equipment. The method of claim 4, wherein And the vacuum port is disposed higher than the particle blocking means.