KR20050013781A - Manufacturing Method of Lithography Mask - Google Patents

Abstract

PURPOSE: A manufacturing method of a lithography mask is provided to form and reproduce an original mask by performing a rearranging exposure process for a good chip region selected from a stencil mask. CONSTITUTION: A stencil mask sample having unit chips arranged in grating patterns is formed on a transparent region. A chip region having a good pattern characteristic is selected by performing an exposure process using the stencil mask sample. Only a good chip region is opened selectively by using a blind. An original mask(25a) having the same structure as the chip region is formed by using a proximate exposure system. A reproduced exposure mask is fabricated by using the original mask.

Description

Manufacturing Method of Lithography Mask

The present invention relates to a method of manufacturing an exposure mask, and more particularly, in the case of using a proximity printing process during an ultra-fine pattern forming process, after manufacturing a first stencil mask for a sample, The present invention relates to a method capable of forming a uniform fine pattern by repeatedly replicating this as it is, to fabricate a disc mask, and to produce a lithography mask replicated from the completed disc mask and to use it in an exposure process.

At present, the process of forming a pattern on a photoresist film uses a general optical lithography process. However, in the above process, a chromium layer is formed on a quartz substrate, a pattern is formed by an electron beam, and then the pattern is used as an original plate of an optical exposure apparatus to develop a photoresist film by dividing contrast between the photoresist film on a substrate. Since the pattern is formed, it is difficult to implement the pattern size required for the highly integrated device as the minimum line width of the device and the connectivity becomes smaller, thereby limiting the use range.

In order to overcome this problem, an electron beam projection lithography process, which is a non-optical lithography process using an electron beam as a light source, is recently used.

The non-optical lithography process is a process using a stencil mask and a light source such as an ion beam, x-ray or electron beam, has the advantage of providing a high pattern resolution and throughput.

The stencil mask has a pattern having the same shape as a pattern formed on a wafer in a proximity exposure process using an electron beam or X-ray, and is used to form a pattern by using the same. In general, a “membrane” Mask ”.

As shown in FIG. 1, the stencil mask includes a membrane 1 having a thin film having no opening and a strut 2 disposed at both edges of the lower portion of the membrane 1. After the absorption layer (3) is a scattering layer (scatterer) disposed in the form of a pattern on the membrane (1), it has a structure in which the membrane region in which the absorption layer is not formed later is removed.

However, the stencil mask can be used only for wafers of 6 to 8 inches in order to improve productivity, which is a disadvantage of the electron beam exposure equipment, and because the membrane is thin, the mask bends due to gravity against the scattering layer. In addition, when the pattern is formed, damage is received from a light source having a high energy and is deformed, thereby making it difficult to obtain a uniform ultrafine pattern with a ratio of 1: 1, and there is a problem that the service life is also very short.

Accordingly, the present inventors aim to provide a method of manufacturing an exposure mask using the replication capability of proximity lithography in order to solve the above problems.

1 is a cross-sectional view showing a conventional stencil mask.

2A to 2D are schematic views showing the manufacturing method of the exposure mask of the present invention.

<Brief description of the main parts of the drawing>

1: membrane of thin film 2: support

3: absorber layer 21: stencil mask for sample

23, 23a: chip 23b: portion formed according to the chip

24: Sample mask which opens only the selected area using blind

25: disc mask substrate 25a: disc mask with a pattern formed

27: an exposure mask duplicated from the original

In order to achieve the above object,

In the present invention

Forming a stencil mask for a sample in which unit chips are divided into a lattice shape at regular intervals in the transmissive region;

Selecting a chip region having good pattern characteristics by performing an exposure process using the sample stencil mask;

Selectively opening only the good chip region using a blind, and then using a proximity exposure device to produce a disc mask having the same structure as the chip alignment of the pattern; And

It provides a method of manufacturing an exposure mask comprising the step of manufacturing a replica exposure mask using the disc mask.

Hereinafter, the present invention will be described in detail with reference to FIGS. 2A to 2D.

Referring to FIG. 2A, the unit chips 23 of the light transmissive region form a stencil mask 21 divided into a lattice at regular intervals.

The stencil mask is generally used in not only ArF or F ₂ but also in a 70 μm semiconductor process, and has a silicon on insulator (SOI) wafer (not shown) having a stacked structure in which a buried oxide layer and an silicon layer are sequentially formed on a silicon substrate. It is preferable to form using).

The method for manufacturing a general stencil mask as described above will be described in detail. A SOI wafer (not shown) in which a buried oxide film and a silicon layer are stacked is formed on a silicon substrate, and then a silicon oxide film for hard mask is formed on the entire surface of the SOI wafer. After forming, it is patterned. The silicon layer is patterned using the patterned hard mask to form an absorbing layer made of silicon.

In the state where the hard mask is removed, in order to prevent the absorbing layer from being damaged during the subsequent patterning process, a nitride film is deposited on the entire surface of the resultant, and then a portion of the nitride film deposited on the back surface of the silicon substrate is patterned. do. The silicon substrate is patterned using the patterned nitride layer as a mask to form a frame serving as a support. By removing the silicon nitride film and the portion of the buried oxide film exposed, the on / off stencil mask 21 including the frame and the buried oxide film pattern and the absorbing layer is completed. In this case, the membrane is preferably formed by removing a predetermined region later to minimize the scattering of X-rays or to enable electron beam transmission.

Referring to FIG. 2B, by performing an exposure process on the stencil mask 21, there is no defect and the unity of the critical dimension of the pattern is high, and the fidelity of the pattern is the highest. The good chip region 23a is selected.

Then, using the blind, a sample mask 24 in which only the selected chip region 23a is opened is formed.

In this case, it is preferable that the sample mask 24 arranges the chip region 23a in the same manner as the chip array used in the actual product by performing a close exposure process on the disc mask 25.

Since the proximity exposure process is performed by a 1: 1 proximity printing exposure system using X-ray or e-beam as a light source, the shape of the pattern existing on the mask for a sample is transferred to the original mask as it is.

In addition, since only one of the best chip areas is selected and moved, the exposure process is performed on the entire surface of the original mask while not only forming a uniform pattern, but also a chip used in an actual product regardless of the wafer size. There is an advantage that can be formed by rearranging the alignment shape.

Referring to FIG. 2C, an etching process is performed on the exposed master mask 25 to form a pattern in the shape of a chip 23b in which the shape of the good chip 23a is formed in the same manner as the chip alignment used in the actual product. The disk mask 25a is formed.

In this case, the disc mask uses an SOI wafer, and the etching process is performed by etching the pattern exposed on the front surface of the SOI wafer as a barrier, and by etching the transmissive area from the back side, the pattern portion is X-ray or e. It is preferable to carry out in order to allow transmission to the -beam.

In addition, since the test pattern portion or the alignment key portion around the chip region other than the chip region is not repeated like the chip region, these patterns form a final disc mask and then use an e-beam system. It is preferable to form directly on the original mask.

Referring to FIG. 2D, an exposure process is performed on the second and third replica masks 27 using the disc masks 25a having patterns formed in chip shapes 23b.

In this case, it is preferable that the disc mask uses an SOI wafer, and the exposure process is performed in the same manner as the wafer process.

Subsequently, a subsequent etching process on the exposed replica mask 27 is performed to form several exposure mask replicas (not shown).

In this way, a pattern is formed using the manufactured exposure mask replica, and if the exposure mask replica is damaged by a light source, an exposure mask replica is manufactured and used again from the original mask 25a, thereby minimizing damage of the exposure mask. And a uniform pattern can be obtained.

As described above, in the present invention, by selecting only a good chip region in the stencil mask, and performing a rearrangement exposure process using the same to form a disc mask, it is possible to form a uniform fine pattern without limiting the size of the wafer. .

In addition, by copying and using a plurality of exposure masks using the disc mask, damage to the exposure mask can be prevented in a subsequent pattern formation process, thereby forming a uniform pattern, thereby reducing the manufacturing cost of the device. Can be.

Claims (7)

Forming a stencil mask for a sample in which unit chips are divided into a lattice shape at regular intervals in the transmissive region; Selecting a chip region having good pattern characteristics by performing an exposure process using the sample stencil mask; Selectively opening only the good chip region using a blind, and then using a proximity exposure device to produce a disc mask having the same structure as the chip alignment of the pattern; And A manufacturing method of an exposure mask comprising the step of manufacturing a replica exposure mask using the disc mask. The method of claim 1, The stencil mask is a method of manufacturing an exposure mask, characterized in that using a silicon on insulator (SOI) wafer stacked with an investment oxide (insulator) and a silicon layer. The method of claim 1, The stencil mask is a manufacturing method of the exposure mask, characterized in that the on / off stencil mask consisting of a frame and the buried oxide film pattern and the absorption layer. The method of claim 1, Wherein said exposing step is performed with a 1: 1 proximity printing exposure system using X-ray or e-beam as a light source. The method of claim 1, The original mask is a manufacturing method of the exposure mask, characterized in that using an SOI wafer. The method of claim 1, And the disc mask directly forms a test pattern outside the chip region and a pattern of an alignment key portion using an e-beam system. The method of claim 1, The exposure mask is a manufacturing method of the exposure mask, characterized in that using the SOI wafer.