KR20050003280A - Method of fabricating liquid crystal display device for improving crystallization characteristics - Google Patents

Abstract

PURPOSE: A method for fabricating an LCD device is provided to crystallize a pixel portion and a driving circuit portion without deteriorating device characteristics using different methods suitable for required device characteristics. CONSTITUTION: In a method for fabricating an LCD device, a first substrate divided into a pixel portion(120) and a driving circuit portion(130) is prepared. Amorphous polysilicon thin films(112a,112b) are deposited on the entire surface of the first substrate. The amorphous polysilicon thin film of the driving circuit portion is crystallized. The entire surface of the polysilicon thin film formed on the first substrate is etched at a predetermined thickness. The amorphous polysilicon thin film of the pixel portion is crystallized, and a thin film transistor is formed using the crystallized polysilicon thin film as an active layer. A second substrate bonded to the first substrate is prepared, and a liquid crystal layer is formed between the first and second substrates.

Description

Manufacturing method of liquid crystal display device with improved crystallization property {METHOD OF FABRICATING LIQUID CRYSTAL DISPLAY DEVICE FOR IMPROVING CRYSTALLIZATION CHARACTERISTICS}

The present invention relates to a method for manufacturing a liquid crystal display device, and more particularly, to a method for manufacturing a polycrystalline silicon thin film transistor liquid crystal display device having an improved crystallization method.

Recently, with increasing interest in information display and increasing demand for using a portable information carrier, a lightweight flat panel display (FPD), which replaces a conventional display device, a cathode ray tube (CRT), is used. The research and commercialization of Korea is focused on. In particular, the liquid crystal display (LCD) of the flat panel display device is an image representing the image using the optical anisotropy of the liquid crystal, is excellent in resolution, color display and image quality, and is actively applied to notebooks or desktop monitors have.

The active matrix (AM) method, which is a driving method mainly used in a liquid crystal display device, is a method of driving a liquid crystal in a pixel part by using an amorphous silicon thin film transistor (a-Si TFT) as a switching element. .

Amorphous silicon thin film transistor technology was established in 1979 by LeComber et al., UK, and commercialized as a 3 "liquid crystal portable television in 1986. Recently, a large area thin film transistor liquid crystal display device of 50" or more has been developed.

However, the electrical mobility (˜1 cm ² / Vsec) of the amorphous silicon thin film transistor is limited to use in peripheral circuits requiring high-speed operation of 1 MHz or more. As a result, studies are being actively conducted to simultaneously integrate the pixel portion and the driving circuit portion on a glass substrate by using a polycrystalline silicon (poly-Si) thin film transistor having a larger field effect mobility than the amorphous silicon thin film transistor. It's going on.

Polycrystalline silicon thin film transistor technology has been applied to small modules such as camcorders since liquid crystal color television was developed in 1982, and has the advantage of being able to manufacture driving circuits directly on the board because of its low sensitivity and high field effect mobility. .

Increasing the mobility may improve the operating frequency of the driving circuit unit that determines the number of driving pixels, thereby facilitating high definition of the display device. In addition, due to the reduction in the charging time of the signal voltage of the pixel portion, the distortion of the transmission signal may be reduced, thereby improving image quality.

In addition, the polycrystalline silicon thin film transistor can be driven at less than 10V compared to the amorphous silicon thin film transistor having a high driving voltage (˜25V) has the advantage that the power consumption can be reduced.

As a method of fabricating a polycrystalline silicon thin film transistor, there are largely a method of directly depositing (as-deposition) a polycrystalline silicon thin film and a method of depositing an amorphous silicon thin film and then performing heat treatment to crystallize. In particular, in order to use a low-cost glass substrate, there is a need for a method capable of a low temperature process and improving the field effect mobility of the thin film transistor.

Heat treatment methods for crystallizing an amorphous silicon thin film include a solid phase crystallization (SPC) method and an excimer laser annealing (ELA) method.

Solid phase crystallization is a method for forming a polycrystalline silicon thin film at a low temperature of about 600 ° C. After forming an amorphous silicon thin film on a low melting glass substrate, the amorphous silicon thin film is crystallized by heating at about 600 ° C for several hours to several tens of hours. That's how. The polycrystalline silicon thin film obtained by the solid phase crystallization method has a relatively large grain (grain) of the order of several micrometers, but has a disadvantage in that there are many defects in the grain. The defect is known to adversely affect the performance of the thin film transistor after the grain boundary region.

Excimer laser annealing is a key method for fabricating polycrystalline silicon thin film transistors at low temperatures, and is a method of crystallizing an amorphous silicon thin film by instantaneous irradiation of several tens of nsec to an amorphous silicon thin film with a high energy laser beam. The melting and crystallization of amorphous silicon in a very short time has the advantage that the glass substrate is not damaged at all.

In addition, the polycrystalline silicon thin film manufactured using the excimer laser has better electrical characteristics than the polycrystalline silicon thin film manufactured by other general heat treatment methods. For example, the field effect mobility of an amorphous silicon thin film transistor is about 0.1 to 0.2 cm ² / Vsec and the field effect mobility of a polycrystalline silicon thin film transistor manufactured by a general heat treatment method is about 10 to 20 cm ² / Vsec. Polycrystalline silicon thin film transistors fabricated using excimer lasers have field effect mobility values in excess of 100 cm ² / Vsec (IEEE Trans. Electron Devices, vol. 36, no. 12, p. 2868, 1989).

Hereinafter, the crystallization method using the excimer laser will be described in detail.

1 is a graph showing the grain size of a polycrystalline silicon thin film with respect to the irradiated laser energy density.

As shown in the figure, it can be seen that the grain size of the crystallized polycrystalline silicon thin film increases as the laser energy density increases in regions I and II (IEEE Electron Dev. Lett., DEL-7, 276, 1986) However, in the region III, when the energy of the specific energy density (E _c ) is irradiated, the grain size of the crystallized polycrystalline silicon thin film is rapidly decreased.

In other words, it can be seen that the crystallization mechanism of the silicon thin film varies depending on the laser energy density to be irradiated.

2A to 2C are cross-sectional views illustrating a silicon crystallization mechanism according to laser energy density of the graph shown in FIG. 1.

The crystallization mechanism of amorphous silicon by laser annealing is characterized by laser irradiation conditions (laser energy density, irradiation pressure, substrate temperature, etc.) and physical and geometrical properties (absorption coefficient, thermal conductivity, mass, impurity content, thickness, etc.) of the amorphous silicon thin film. Are affected by a number of factors.

Amorphous silicon has a very high absorption coefficient near the wavelength of the excimer laser, so when the laser beam is irradiated, energy is absorbed and melted and recrystallized within 30 to 200 ns.

First, as shown in FIG. 2A, region I of the graph of FIG. 1 is a partial melting region. The amorphous silicon thin film 12 is crystallized only to a dotted line portion, and the size of grain G ₁ formed therein is Hundreds of pounds.

When the laser is irradiated to the amorphous silicon thin film 12 on the substrate 10 on which the buffer layer 11 is formed as described above, the amorphous silicon thin film 12 is melted, and the surface of the amorphous silicon thin film 12 directly exposed to the laser beam. When the laser energy is irradiated and relatively weak laser energy is irradiated to the lower portion of the amorphous silicon thin film 12, crystallization occurs only to a certain portion of the amorphous silicon thin film 12.

At this time, the crystal growth process by laser crystallization is first primary melting of the amorphous silicon surface layer by the laser irradiation, second is the latent heat generated by the solidification of the primary molten layer and the secondary melting of the lower layer melting), and the third is crystal growth through solidification. The crystal growth process will be described in detail as follows.

The amorphous silicon thin film irradiated with the laser is above the melting temperature (1000 ° C.) and is melted in a liquid state. Subsequently, the primary molten layer is rapidly cooled at a cooling speed of 10 ⁹ K / s or more until a high temperature difference occurs between the underlying silicon and the substrate to cause solid phase nucleation and solidification. become. The molten layer according to the laser irradiation is maintained until the solid phase nucleation and solidification occurs, and such a molten state lasts longer as the laser energy density is higher or the heat is released to the outside in the range where no ablation occurs. do. In addition, since the primary molten layer is melted at a temperature lower than the melting temperature of the crystalline silicon (1400 ° C) (1000 ° C), the molten layer is maintained in a supercooling state where the molten layer is cooled and lowered to a temperature below the phase change. The larger the state, that is, the lower the melting temperature of the thin film or the higher the cooling rate, the higher the nucleation rate during solidification, resulting in fine crystal growth.

When the primary melted layer is cooled and solidification starts, crystal growth is performed in the upper direction centering on the crystal nuclei. At this time, the latent heat of the primary melted layer is released by the phase change from the liquid phase to the solid phase to form a lower amorphous silicon thin film in the solid state. Secondary melting is repeated and this process through solidification is repeated to grow crystals. In this case, the lower secondary molten layer is more supercooled than the primary molten layer, and the nucleation rate is increased (˜10 ²⁹ m ⁻³ s ⁻¹ ) to reduce the crystal size. Therefore, in order to improve the crystallization characteristics during crystallization by laser annealing, it is effective to slow down the cooling rate due to solidification, and accordingly, heat to the outside of absorbed laser energy such as substrate heating, double beam irradiation, buffer insulation layer insertion, etc. A method of slowing down the cooling rate by suppressing the release can be used.

FIG. 2B is a cross-sectional view illustrating the silicon crystallization mechanism for region II of the graph of FIG. 1, wherein region II represents a near-complete melting region.

As shown in the figure, a polycrystalline silicon thin film having a relatively large grain (G ₂ ) of about 3000 to 4000 GPa is formed to the interface of the lower buffer layer 11. That is, according to the energy density corresponding to the region, particles of the amorphous silicon thin film 12 are melted to the region adjacent to the buffer layer 11 and are concentrated at the interface between the amorphous silicon thin film 12 and the buffer layer 11. It acts as a nucleus (N) and grows in the direction of the arrow to form relatively large grains. (J. Appl. Phys. 82, 4086) However, the distribution density of the nuclei (N) is not constant, resulting in nonuniform grains. The formation of a protuberance (P) region having a grain boundary (G ₂ ) boundary surface higher than that of the periphery results in deterioration of the polycrystalline silicon thin film.

Finally, FIG. 2C is a cross-sectional view illustrating a crystallization mechanism corresponding to region III of the graph of FIG. 1 and for a complete melting region.

As shown in the figure, at the energy density corresponding to the region, very small grains G ₃ are irregularly formed.

That is, when the laser energy density is higher than a predetermined level (E _c ), all of the amorphous silicon thin film 12 in the irradiated region is melted and there is no nucleus capable of growing into grain. Subsequently, when the amorphous silicon thin film 12 irradiated with a strong energy laser undergoes a rapid cooling process, a large number of crystal nuclei N are generated and fine grains G ₃ are formed by the crystal nuclei.

Unlike a single crystal, a polycrystalline silicon thin film formed by such a crystallization mechanism inevitably has grain boundaries, which are larger than defects in grains. The grain boundary is caused by thermal stress caused by the solidification of molten amorphous silicon and is a major factor in deteriorating device characteristics.

Various grain control techniques used to prevent deterioration of device characteristics due to the grain boundaries have problems such as the need for expensive equipment and complicated processes.

In addition, the thin film transistor of the pixel portion may crystallize the amorphous silicon thin film so as to have sufficient characteristics to function as a switching element, but in general, the pixel portion performs crystallization using the same crystallization method as that of the driving circuit portion. There were problems such as increase and increase in cost.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and provides a method of manufacturing a liquid crystal display device in which the crystallization process is improved without deterioration of device characteristics by crystallizing the pixel portion and the driving circuit portion in a different manner according to the required device characteristics. It aims to do it.

Another object of the present invention is to provide a method of manufacturing a liquid crystal display device having an improved quality by implementing an element suitable for the characteristics of the driving circuit unit and the pixel unit by adding a step of etching the silicon thin film between the crystallization of the driving circuit unit and the pixel unit.

1 is a graph showing the grain size of a polycrystalline silicon thin film with respect to the irradiated laser energy density.

2A-2C are cross-sectional views illustrating a silicon crystallization mechanism according to the laser energy density of the graph shown in FIG.

3 is a plan view illustrating an array substrate of a general liquid crystal display device.

4A-4D are flowcharts illustrating a crystallization method according to an embodiment of the present invention.

** Explanation of symbols for main parts of drawings **

10,110: array substrate 11,111: buffer layer

12,112: amorphous silicon thin film 112a, 112b: polycrystalline silicon thin film

120: pixel portion 130: driving circuit portion

130a: gate driving circuit section 130b: data driving circuit section

In order to achieve the above object, the manufacturing method of the liquid crystal display device of the present invention comprises the steps of providing a first substrate divided into a pixel portion and a driving circuit portion, depositing amorphous silicon on the entire surface of the first substrate, the driving circuit portion Crystallizing the amorphous silicon of the silicon, etching the entire surface of the silicon formed on the first substrate to a predetermined thickness, crystallizing the amorphous silicon of the pixel portion, and using the crystallized polycrystalline silicon thin film as an active layer Forming a thin film transistor, providing a second substrate bonded to the first substrate, and forming a liquid crystal layer between the first substrate and the second substrate.

The forming of the thin film transistor using the crystallized polycrystalline silicon thin film as an active layer may include forming a first insulating film and a gate electrode on the active layer region, and implanting impurities into a predetermined region of the active layer to source / drain Defining a region, forming a second insulating film on the entire surface of the first substrate, and forming a source electrode and a drain electrode on the region of the active layer.

The amorphous silicon may be deposited to a thickness of 700 to 2000 GPa, and in the etching of the silicon, the silicon thin film may be etched to have a thickness of 300 to 700 GPa.

In addition, the amorphous silicon of the driving circuit part may be crystallized by a horizontal crystallization method, and the amorphous silicon of the pixel part may be crystallized by a metal induction crystallization method or an excimer laser annealing method.

Hereinafter, the present invention will be described in detail.

The present invention provides a method of manufacturing a polycrystalline silicon thin film transistor liquid crystal display device having improved device characteristics by improving a crystallization method.

In particular, the present invention provides a method of manufacturing a liquid crystal display device in which the pixel portion and the driving circuit portion are crystallized with different crystallization qualities, thereby reducing costs and improving processes without deterioration of device characteristics.

In general, in a liquid crystal display device, a thin film transistor is formed at two parts of a pixel part and a peripheral driving circuit part.

Among these, the thin film transistor of the pixel portion only needs to satisfy a mobility of about 20 to 50 cm 2 / Vs, and thus does not require very excellent characteristics. On the other hand, in the driving circuit unit, both the N-channel thin film transistor and the P-channel thin film transistor should be formed, and the characteristics of the thin film transistor have a decisive influence on the driving of the liquid crystal display device, so the mobility of several hundred cm 2 / Vs must be satisfied. do.

3 is a plan view illustrating an array substrate of a general liquid crystal display, and illustrates an array substrate including the pixel portion and the driving circuit portion.

As shown in the drawing, the array substrate 110 includes a pixel portion 120, which is a pixel region, and a driving circuit portion 130 including a gate driving circuit portion 130a and a data driving circuit portion 130b.

The pixel unit 120 is composed of a thin film transistor which is a switching element for applying and blocking a signal voltage to the liquid crystal. The thin film transistor is a field effect transistor (FET) that controls the flow of current by an electric field.

The gate driving circuit unit 130a and the data driving circuit unit 130b use a thin film transistor having a complementary metal oxide semiconductor (CMOS) structure as an inverter to properly output an input signal.

The CMOS is a type of integrated circuit having a MOS structure used in a thin film transistor of a driving circuit that requires high-speed signal processing, and requires a P-channel and an N-channel transistor. The speed and density characteristics are intermediate between NMOS and PMOS. Indicates.

The switching element of the pixel portion of the liquid crystal display device configured as described above is important to suppress the off-state current, that is, the leakage current, and the unit elements of the driving circuit portion have high field effect mobility.

For reference, the reduction of the leakage current makes it possible to suppress the deterioration in image quality due to the signal leakage due to the increase in the signal holding time of the pixel portion. The source of leakage current is a thermal generation model in which trapped holes move to the valence band due to thermal excitation, and the trapped holes flow through the potential barrier by a voltage applied to the drain. There is a tunneling model and a thermal ion field emission model in which the trapped holes are thermally excited and move to the valence band by the voltage applied to the drain. As a method of suppressing the leakage current, a lightly doped drain (LDD), an offset structure, a field induced drain (FID), etc. may be used to mitigate high electric field generation at the source / drain pn junction that causes the leakage current. have.

In addition, the grain boundary inside the polycrystalline silicon thin film is a factor that lowers the field effect mobility of the device even in the switched-on state, the electron is moved as the grain boundary is broken or incompletely bonded between silicon atoms. Because it works as a disabled person.

The fundamental method to solve the above problem is to increase the grain size to lower the grain boundary density, and the general method to increase the grain size is to increase the laser energy density during annealing or to heat the substrate. have.

As such, since the pixel unit and the driving circuit unit require elements having different characteristics, the pixel unit and the driving circuit unit may be crystallized by using a crystallization method that meets the requirements.

Accordingly, in the present invention, the crystallization process can be improved without degrading the device characteristics by crystallizing the pixel portion and the driving circuit portion in different manners according to the desired device characteristics.

In particular, unlike the driving circuit unit requiring excellent crystallization characteristics, the pixel portion may be crystallized to satisfy a characteristic necessary to function as a switching element, thereby reducing the cost and time of the entire process.

In general, the amorphous silicon thin film used for the crystallization is brought to a thickness of about 500 kW for the purpose of securing the productivity and electrical properties of the deposition equipment. In particular, when the active layer is thick, problems such as an increase in leakage current and a decrease in on-off ratio occur.

In this case, in order to alleviate defects at the grain boundary, the duration of the molten state of the amorphous silicon may be increased, and the method of lengthening the duration of the amorphous silicon thin film used for the crystallization may be a thick method. have. According to the above method, when the thickness of the deposited amorphous silicon thin film is 1000 μs, the grain size of the crystallized polycrystalline silicon thin film is doubled and the device characteristics are also improved compared to the case where the thickness of the thin film is 500 μs.

Therefore, in the present invention, the driving circuit portion having a large mobility, that is, the grain size must be large, is deposited to crystallize by thickly depositing amorphous silicon, and then a silicon thin film of the pixel portion and the driving circuit portion to secure electrical characteristics such as a reduction of leakage current. By etching to a predetermined thickness and crystallizing the amorphous silicon of the pixel portion it is possible to improve the productivity while ensuring the electrical properties for each device characteristic.

Hereinafter, exemplary embodiments of a liquid crystal display according to the present invention will be described in detail with reference to the accompanying drawings.

4A to 4D are flowcharts illustrating a crystallization method according to an exemplary embodiment of the present invention, which are enlarged plan views and cross-sectional views of a portion A of the array substrate illustrated in FIG. 3.

First, as shown in FIG. 4A, a buffer layer 111 is formed on an entire surface of an array substrate 110 divided into a pixel unit 120 and a driving circuit unit 130, and then an amorphous layer to be used as an active layer on the buffer layer 111. Silicon 112 is deposited to a predetermined thickness.

In general, an amorphous silicon thin film may be deposited by various methods, and in some cases, a buffer layer made of a silicon oxide film may be formed under the amorphous silicon thin film.

Representative methods for depositing an amorphous silicon thin film include a low pressure chemical vapor deposition (LPCVD) method and a plasma enhanced chemical vapor deposition (PECVD) method. In the case of depositing the amorphous silicon thin film by the plasma chemical vapor deposition method, the hydrogen atoms of about 20% are included in the amorphous silicon thin film although there are some differences depending on the temperature of the substrate during deposition. At this time, a dehydrogenation process, which is an annealing process for discharging the hydrogen atoms to the outside, must be followed. The reason is that when the amorphous silicon thin film containing hydrogen atoms is crystallized with a laser, the hydrogen atoms stick out and a cavity is formed inside the thin film, thereby degrading the quality of the polycrystalline silicon thin film.

Here, the optimum thickness of the amorphous silicon thin film used for crystallization can be from 700 kW to 2000 kW without requiring very large laser energy. In particular, the thicker the thickness of the deposited amorphous silicon thin film, the longer the duration of melting increases the grain size of the crystallized polycrystalline silicon thin film, thereby improving the device characteristics.

Next, as shown in FIG. 4B, only the driving circuit unit 130 is crystallized using the horizontal crystallization method.

At this time, the driving circuit unit 130 may obtain grains G of uniform size that are horizontally grown by laser annealing, and sub-grains G _s are formed between the grains G.

Since the thin film transistor of the driving circuit unit requires high speed signal processing, a horizontal crystallization method may be used to have a relatively large grain size.

In the present embodiment, crystallization is performed by using a sequential lateral solidification (SLS) method of the horizontal crystallization method, but another horizontal crystallization method (eg, SELAX (Selectively Enlarging LAser Xtallization) that satisfies device characteristics of the driving circuit unit). , MILC (Metal Induced Lateral Crystallization, etc.) can be used.

The sequential horizontal crystallization is a technique using the fact that the silicon grains grow in the direction perpendicular to the interface at the interface between the liquid and solid silicon (Robert S. Sposilli, MA Crowder, and James S. Im, Mat. Res. Soc.Symp.Proc.Vol. 452, 956-957, 1997)

In particular, in the sequential horizontal crystallization technology, the amorphous silicon thin film can be crystallized to a single crystal level by horizontally growing silicon crystal grains by a predetermined length by appropriately adjusting the laser energy density and the irradiation range of the laser.

Hereinafter, the sequential horizontal crystallization method used in this embodiment will be described.

First, the amorphous silicon thin film is completely melted by irradiating a laser having an energy density or more at which the amorphous silicon thin film is completely melted.

At this time, immediately after the irradiation of the laser energy, the amorphous silicon is cooled through both sides, i.e., the non-irradiated area where the laser is not irradiated. This is because the solid-state amorphous silicon thin film on the side has greater thermal conductivity than the buffer layer or glass substrate under the amorphous silicon thin film.

Therefore, the liquid amorphous silicon thin film preferentially reaches the nucleation temperature at the interface between the solid phase and the liquid phase on both sides rather than the central portion, and crystal nuclei are formed at the portion. After the nuclei are formed, the horizontal growth of grain occurs from the lower side to the higher side.

In this method, the crystal particles can be grown in the horizontal direction along the irradiation direction of the laser by irradiating the amorphous silicon thin film at intervals substantially equal to the distance at which the lateral growth by single melting can be achieved. In particular, considering the maximum size of grain that can be grown by sequential horizontal crystallization, if sequential horizontal crystallization is performed on both sides, grains have crystal grains having a larger grain size with only one grain boundary.

The grain size of the polycrystalline silicon thin film crystallized by general laser annealing shows several hundred nm, while the grain size of the polycrystalline silicon thin film obtained by the sequential horizontal crystallization method reaches several micrometers, so that a device having high mobility can be realized. do. That is, when the horizontally grown polycrystalline silicon is used in the channel of the thin film transistor, it is possible to implement a device having high speed operation characteristics.

At this time, the channel of the thin film transistor is formed with a polycrystalline silicon region composed of horizontal growth grains, but is arranged in parallel with the grain growth direction.

In addition, the deterioration of device characteristics due to the sub-grain boundary is negligible as long as the sub-grain boundary existing between the grains growing side by side is induced in parallel with the direction of grain growth so as not to interfere with current or electron movement at all. It becomes possible.

Although the area occupied by the actual driving circuit in the liquid crystal display device varies depending on the resolution and size of the liquid crystal display device, the width is generally very small (1 mm or less). Therefore, when only the driving circuit unit uses the sequential horizontal crystallization method, the sequential horizontal crystallization process can be effectively used despite the low throughput.

4C illustrates a step of etching the silicon thin film according to the present invention so that a predetermined thickness remains.

As shown in the figure, after the crystallization of the driving circuit unit 130, the pixel unit 120 and the silicon thin films 112 and 112a of the driving circuit unit 130 are etched so as to have a predetermined thickness for securing electrical characteristics.

In this embodiment, an etch-back method is used to etch the silicon thin films 112 and 112a exposed to the substrate 110 without a mask. At this time, the polycrystalline silicon thin film 112a formed in the driving circuit unit 130 is reduced in thickness only of the silicon 112a while maintaining grain size.

The crystallized polycrystalline silicon thin film 112a of the driving circuit unit 130 includes a raised portion on the grain boundary surface, and the raised portion is removed by etching the entire surface of the silicon 112a through the etch-back. As a result, device characteristics of the driving circuit unit 130 can be improved. At this time, since the etched portion is larger than the grained portion corresponding to the defect, the etched portion is etched before the grained portion when the silicon 112a is etched.

Finally, as shown in FIG. 4D, the crystallization of the amorphous silicon thin film 112 of the pixel portion 120 is performed using a simple crystallization method in a process other than the horizontal crystallization method. At this time, the polycrystalline silicon thin film 112a of the driving circuit unit 130 cures a surface damaged by etching while maintaining horizontal crystallization.

Since the pixel unit 120 does not require excellent device characteristics compared to the driving circuit unit 130, the pixel unit 120 may be crystallized by using a method such as metal induction crystallization or excimer laser annealing.

Here, the metal induced crystallization method (MS Haque et al., J. Appl. Phys., 79, 7529 (1996)) is a method of crystallizing by lowering the crystallization temperature of the amorphous material by contacting the specific metal with the amorphous material. For example, in the crystallization of a polycrystalline silicon thin film by nickel metal, NiSi _{2, which} is the last phase of nickel silicide, acts as a crystallization nucleus to promote crystallization. In fact, NiSi ₂ has the same structure as silicon and its lattice constant is 5.406 Å, which is very similar to that of 5.430 Å silicon, which acts as a crystallization nucleus of the amorphous silicon to promote crystallization in the (111) direction (C. Hayzelden). et al., Appl. Phys. Lett., 60, 225 (1992))

The excimer laser annealing method is a method of crystallizing a short wavelength (λ = 0.3 μm) of strong energy in order to melt an amorphous silicon thin film, and crystallization is possible with high speed and excellent crystallization characteristics of the crystallized polycrystalline silicon thin film. There is an advantage. In particular, the short wavelength of the excimer laser uses the energy concentration of the laser beam, so that it is possible to perform precise heat treatment in a short time and locally, and thus does not thermally damage the lower silicon thin film.

As such, the pixel unit 120 remains in the form of excimer laser annealing or metal induced crystallization, and the driving circuit unit 130 has a horizontal crystallized form having a large grain size, thereby improving the crystallization process without degrading device characteristics.

In addition, the driving circuit portion, which should have a high mobility, is deposited to crystallize by thickly depositing amorphous silicon, and then the silicon thin film is etched to a predetermined thickness in order to secure electrical characteristics such as reduction of leakage current, and the amorphous silicon of the pixel portion is etched. By crystallizing it is possible to improve the productivity while securing the electrical characteristics for each device characteristic.

A thin film transistor may be fabricated using the polycrystalline silicon thin film formed according to the present embodiment as an active layer. For example, a method of manufacturing a polycrystalline silicon thin film transistor having a top-gate structure will be described below.

First, an active pattern is formed by patterning a polycrystalline silicon thin film, which is an active layer formed by the crystallization method, through a photolithograpy process.

A first insulating film and a gate conductive film are sequentially deposited on the active pattern. Subsequently, the gate conductive film of the p-type thin film transistor region is etched by a photolithography process to form a gate electrode of the p-type thin film transistor, and then p + type impurities are implanted to form an ohmic contact region. Subsequently, the gate conductive layer of the n-type thin film transistor region is etched by a photolithography process to form a gate electrode of the n-type thin film transistor, and then n + -type impurities are implanted to form an ohmic contact region.

Subsequently, after laser annealing is performed to activate doped ions and heal damage to the silicon layer, a second insulating film made of an inorganic material such as SiO ₂ , SiN _x or a photosensitive organic material is formed on the gate electrode and the first insulating film. The second insulating layer is partially etched by a photolithography process to form a first contact hole exposing the source region of the active pattern and a second contact hole exposing the drain region.

A conductive film is deposited on the first contact hole, the second contact hole, and the second insulating film, and the conductive film is patterned by a photolithography process to form a source / drain electrode. Subsequently, a passivation layer made of an inorganic material or an organic material is formed on the source / drain electrode and the second insulating layer, and a via hole exposing the source electrode is formed by partially etching the passivation layer by a photolithography process. A transparent conductive film or a reflective conductive film is deposited on the via hole and the passivation layer, and then patterned by a photolithography process to form a pixel electrode connected to the source electrode through the via hole.

In the above description, a method of manufacturing a top-gate polycrystalline silicon thin film transistor using seven masks is exemplified, but the present invention is not limited to the thin film transistor according to the above method.

The first substrate, which is an array substrate including the thin film transistor formed as described above, is bonded to a second substrate, which is a color filter substrate corresponding to the first substrate, and a liquid crystal layer is formed between the first substrate and the second substrate. The panel is complete.

Many details are set forth in the foregoing description but should be construed as illustrative of preferred embodiments rather than to limit the scope of the invention. Therefore, the invention should not be defined by the described embodiments, but should be defined by the claims and their equivalents.

As described above, the manufacturing method of the liquid crystal display device according to the present invention can improve the crystallization process without deterioration of the device characteristics by crystallizing the pixel portion and the driving circuit portion using different methods according to the required device characteristics.

In addition, by adding a step of etching the silicon thin film between the driving circuit portion and the crystallization of the pixel portion, it is possible to implement a device suitable for the characteristics of the pixel portion and the driving circuit portion.

Claims (10)

Providing a first substrate divided into a pixel portion and a driving circuit portion; Depositing amorphous silicon over the first substrate; Crystallizing amorphous silicon of the driving circuit unit; Etching the entire surface of the silicon formed on the first substrate to a predetermined thickness; Crystallizing amorphous silicon of the pixel portion; Forming a thin film transistor using the crystallized polycrystalline silicon thin film as an active layer; Providing a second substrate corresponding to and bonded to the first substrate; And Forming a liquid crystal layer between the first substrate and the second substrate. The method of claim 1, wherein the forming of the thin film transistor is performed. Forming a first insulating film and a gate electrode on the active layer region; Injecting impurities into a predetermined region of the active layer to define a source / drain region; Forming a second insulating film on the entire surface of the first substrate; And Forming a source electrode and a drain electrode on a region of the active layer. The method of claim 1, wherein the amorphous silicon is deposited to a thickness of 700 to 2000 GPa. The method of claim 1, wherein the etching of the silicon to a predetermined thickness comprises etching the silicon thin film so that the thickness of the silicon thin film is 300 to 700 Å. The method of claim 1, further comprising forming a buffer layer on the provided first substrate. The method of claim 1, wherein crystallizing the amorphous silicon of the driving circuit unit is crystallized by a horizontal crystallization method. The method of claim 6, wherein the horizontal crystallization is sequential horizontal crystallization. The method of claim 1, wherein the crystallizing of the amorphous silicon of the pixel portion is performed by a metal induction crystallization method. The method of claim 1, wherein the crystallizing the amorphous silicon of the pixel portion is performed by excimer laser annealing. Providing a substrate divided into a pixel portion and a driving circuit portion; Depositing amorphous silicon over the substrate; Crystallizing amorphous silicon of the driving circuit unit to form an active layer; Etching the entire surface of the silicon formed on the substrate to a predetermined thickness; Crystallizing amorphous silicon of the pixel portion to form an active layer; Forming a first insulating film and a gate electrode on the active layer region; Injecting impurities into a predetermined region of the active layer to define a source / drain region; Forming a second insulating film on the entire surface of the substrate; And And forming a source electrode and a drain electrode on the region of the active layer.