KR20040102519A - Liquid crystal display - Google Patents

Abstract

PURPOSE: An LCD(Liquid Crystal Display) is provided to prevent a light-leakage phenomenon from generating, thereby increasing a view angle contrast ratio. CONSTITUTION: A substrate interval member(320) supports a liquid crystal layer and upper and lower display plates with a constant distance. Plural gate lines(121) are formed longitudinally on an insulation substrate. A sustain electrode line(131) electrically separated from the gate line is formed on the insulation substrate. A gate insulation film is formed on the gate line and sustain electrode line. A linear semiconductor(154) made of hydrogenated amorphous silicon is formed on the upper portion of the gate insulation film. A linear resistant contact assistant and an island resistant contact assistant are formed on the upper portion of the linear semiconductor. Plural data lines(171) and plural drain electrodes of a TFT(Thin Film Transistor) are formed on the linear resistant contact assistant, an island resistant contact assistant and the gate insulation film. Color filters(R.G.B.) having red, green and blue colors are formed on the upper portion of the linear semiconductor and the gate insulation film, not covered by the data line, the drain electrode and the sustain electrode. A protective film is formed on the color filters and has a contact hole(185) for exposing the drain electrode. A pixel electrode(190) is formed on the protective film and physically and electrically connected to the drain electrode through the contact hole. Plural contact assistants(81,82) are formed on the protective film. A light shielding film(220) is formed on the surface of an upper insulation substrate facing to the lower insulation substrate. The substrate interval material is positioned at a common electrode of the upper portion of the light shielding film.

Description

Liquid crystal display

The present invention relates to a common electrode display panel, a manufacturing method thereof, and a liquid crystal display device including the display panel.

The liquid crystal display is one of the most widely used flat panel display devices. The liquid crystal display includes two display panels on which electric field generating electrodes are formed, a liquid crystal layer interposed therebetween, and a substrate spacer that uniformly supports the gap between the two display panels. .

The liquid crystal display displays an image by applying a voltage to two electrodes to generate an electric field in the liquid crystal layer, changing the intensity of the electric field, and rearranging the liquid crystal molecules of the liquid crystal layer to adjust the transmittance of transmitted light.

Among the liquid crystal display devices, a liquid crystal display device having a thin film transistor for forming an electrode on each of two display panels and switching a voltage applied to the electrode is one of the liquid crystal display devices, and one of the two substrates includes a plurality of wirings such as a gate line and a data line. In addition, a thin film transistor for controlling a pixel electrode and a data signal transmitted to the pixel electrode is formed (hereinafter referred to as a thin film transistor display panel), and a common electrode and a light blocking film facing the pixel electrode are generally formed on the other display panel.

TN (twisted nematic) method of the liquid crystal display device displays a black screen by vertically aligning the liquid crystal molecules having positive dielectric anisotropy when the maximum voltage is applied to the surfaces of the two display panels. In this case, light may leak in an area where the field of the voltage applied between the two display panels is distorted, thereby decreasing the viewing angle contrast ratio. Accordingly, in order to prevent the liquid crystal display, the light blocking film is disposed on the upper display panel in a region where light leaks from the lower display panel.

However, in the liquid crystal display device in which the color filter is formed on the thin film transistor substrate, the common electrode display panel has a step in order to prevent light from passing through the common electrode display panel. As a result, the stepped portion of the light shielding film is exposed to the display area, and a voltage distortion occurs at the stepped portion, causing the liquid crystal to be disoriented, causing light leakage at the stepped portion.

An object of the present invention is to increase the viewing angle contrast ratio by preventing light leakage in the liquid crystal display.

1 is a layout view of a liquid crystal display according to a first exemplary embodiment of the present invention.

FIG. 2 is a cross-sectional view taken along the line II-II 'of FIG. 1;

3 is a cross-sectional view taken along line III-III 'of FIG. 1,

4A to 4C are cross-sectional views illustrating a method of manufacturing an upper panel (opposing panel) in the liquid crystal display according to the first embodiment of the present invention, in the order of their processes;

FIG. 5A is a layout view of a first step of manufacturing a lower panel (thin film transistor array panel) in a liquid crystal display according to a first exemplary embodiment of the present invention; FIG.

5B is a cross-sectional view taken along the line Vb-Vb ′ in FIG. 5A;

6A is a layout view of a thin film transistor array panel in a second step of manufacturing according to the first embodiment of the present invention;

FIG. 6B is a cross-sectional view taken along the line VIb-VIb ′ in FIG. 6A;

7A is a layout view of a thin film transistor array panel in a third step of manufacturing according to the first embodiment of the present invention;

FIG. 7B is a cross-sectional view taken along the line VIIb-VIIb 'of FIG. 7A;

8A is a layout view of a thin film transistor array panel according to a fourth step of manufacturing according to the first embodiment of the present invention;

FIG. 8B is a cross-sectional view taken along the line VIIIb-VIIIb ′ in FIG. 8A;

9 is a layout view of a liquid crystal display according to a second exemplary embodiment of the present invention.

10 and 11 are cross-sectional views of a thin film transistor array panel cut along the lines X-X 'and XI-XI' in FIG.

12A is a layout view of a thin film transistor array panel in a first step of manufacturing according to an embodiment of the present invention;

12B is a cross-sectional view taken along the line XIIb-XIIb ′ in FIG. 12A.

13, 14, and 15 are cross-sectional views taken along the line XIIb-XIIb 'of FIG. 12A, respectively, and are cross-sectional views illustrating the following steps in the order of the processes of FIG.

FIG. 16A is a layout view of a thin film transistor array panel in the next step of FIG. 15;

16B is a cross-sectional view taken along the line XVIb-XVIb ′ in FIG. 16A.

17A is a layout view of a thin film transistor array panel in a next step of FIG. 16A.

FIG. 17B is a cross-sectional view taken along the line XVIIb-XVIIb ′ in FIG. 17A;

In order to achieve such a problem, the present invention provides the following liquid crystal display device.

More specifically, a first insulating substrate, a gate line formed on the first insulating substrate, a data line formed on the first insulating substrate and intersecting with and insulated from the gate line, and a data line formed on the first insulating substrate and insulated and intersecting with the data line A storage electrode line, a thin film transistor in which two of the three terminals are respectively connected to a gate line and a data line, a pixel electrode connected to the remaining one terminal of the thin film transistor, and a second insulating substrate facing the first insulating substrate. And a light blocking film formed on the second insulating substrate, and a common electrode formed on the second insulating substrate, and the boundary of the light blocking film overlaps with the opaque pattern formed on the first insulating substrate including gate lines and data lines. A liquid crystal display device arranged at a position to be provided is provided.

The liquid crystal display device is formed on the common electrode display panel or the thin film transistor array panel, and is formed on the same layer as the data line, and is connected to the gate line or electrically separated from the gate line, and formed on the same layer. It further includes a conductor for a storage capacitor overlapping to form a storage capacitor.

In addition, the liquid crystal display may further include protrusions disposed in the pixel area to divide and align the liquid crystal molecules of the liquid crystal material layer, and formed of the same layer as the substrate spacer, and the thin film transistor array panel may be substantially the same as the data line. Patterned in shape, it is preferable to further include a semiconductor made of amorphous silicon.

DETAILED DESCRIPTION Embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like parts are designated by like reference numerals throughout the specification. When a part of a layer, film, area, plate, etc. is over another part, this includes not only the part directly above the other part but also another part in the middle. In contrast, when a part is just above another part, it means that there is no other part in between.

A common electrode display panel according to an exemplary embodiment of the present invention, a manufacturing method thereof, and a liquid crystal display including the substrate will be described in detail with reference to the accompanying drawings.

First, the structure of the liquid crystal display according to the first exemplary embodiment of the present invention will be described in detail with reference to FIGS. 1 to 2.

1 is a layout view illustrating a structure of a liquid crystal display including a display panel according to a first exemplary embodiment of the present invention, FIG. 2 is a cross-sectional view taken along the line II-II 'of FIG. 1, and FIG. 1 is a cross-sectional view taken along lines III-III and III-III.

In the liquid crystal display according to the first exemplary embodiment, the liquid crystal material layer 3 and the two display panels 100, which are formed between the upper panel 200 and the lower panel 100, and the two display panels 100 and 200. And a substrate spacer 320 supporting the 200 at regular intervals. In this case, the liquid crystal molecules 40 of the liquid crystal material layer 3 may be formed on the two display panels 100 and 200 by the alignment force of the alignment layers 11 and 21 or the characteristics of the liquid crystal material in the state where the major axis thereof is not applied to the electric field. It is arranged vertically with respect to. However, the liquid crystal molecules 40 may be arranged such that their major axes are parallel to the surfaces of the two display panels 100 and 200 and spirally twisted from the lower display panel 100 to the upper display panel 200 as necessary.

The lower display panel 100 includes a plurality of gate lines 121 extending mainly in the horizontal direction on the insulating substrate 110 and the storage electrode lines 131 electrically separated from the gate lines 121. It is. The gate line 121 and the storage electrode line 131 may be formed of a single film made of silver (Ag) or silver alloy (Ag) or aluminum (Al) or aluminum alloy (Al alloy) having low resistivity. In addition to such a single film, it may be made of a multilayer film including other films made of materials such as chromium (Cr), titanium (Ti), and tantalum (Ta) having good physical and electrical contact properties. A portion of each gate line 121 extends to form a gate electrode 124 of the thin film transistor. At this time, the side of the gate line 121 is inclined, the inclination angle is in the range of 20-80 ° from the horizontal plane.

In addition, the storage electrode line 131 receives a voltage such as a common voltage and overlaps the plurality of drain electrodes 175 and the gate insulating layer 140, which are connected to the plurality of pixel electrodes 190, with the plurality of storage capacitors interposed therebetween. To achieve. Here, the portion of the sustain electrode line 131 overlapping with the drain electrode 175 is expanded in order to increase the capacitance of the storage capacitor.

A gate insulating layer 140 made of silicon nitride (SiNx) is formed on the gate line 121 and the storage electrode line 131.

A linear semiconductor 154 made of hydrogenated amorphous silicon is formed on the gate insulating layer 140. Each linear semiconductor 154 has a portion which is periodically extended, which extends over the gate electrode 124 to form a channel of the thin film transistor. On the top of the linear semiconductor 154, a plurality of linear ohmic contacts 163 and island-type ohmic contacts 165 made of n + hydrogenated amorphous silicon doped with silicide or n-type impurities are formed. . Each of the islands of ohmic contact 165 is located on the opposite side of the linear ohmic contact 163 with respect to the gate electrode 125 and is separated therefrom.

A plurality of data lines 171 and a plurality of drain electrodes 175 of the thin film transistor are formed on the linear ohmic contact 163, the island-type ohmic contact 165, and the gate insulating layer 140. The data line 171 and the drain electrode 175 may be formed of Al or Ag having a low specific resistance, and may include a conductive material having excellent contact characteristics with other materials, such as the gate line 121. The data line 171 mainly extends in the vertical direction to intersect the gate line 121 and forms a source electrode 173 having a plurality of branches extending from each data line 171. The pair of source and drain electrodes 173 and 175 are at least partially positioned on the upper portions of the ohmic contacts 163 and 165, respectively, and are separated from each other and disposed opposite to the gate electrode 124.

The linear and island resistive contact members 163 and 165 positioned between the linear semiconductor 154 and the data line 171 and the drain electrode 175 lower the contact resistance therebetween.

Red, green, and blue color filters (R, G, and B) are disposed on the data line 171, the drain electrode 173, and the storage electrode line 131, and the linear semiconductor 154 and the gate insulating layer 140 that are not hidden from the data line 171. Is formed. Each color filter R, G, B extends in the vertical direction. In the present embodiment, the boundaries of the color filters R, G, and B are located above and coincident with the data lines 171, but according to another embodiment of the present invention, the color filters R, G, and B are connected to the data lines (the data lines). 171 may have a function of blocking light leaking overlapping each other from the top. The color filters R, G, and B are not formed at the end portions 125 and 179 of the gate line 121 and the data line 171.

An interlayer insulating film (not shown) made of an insulating material such as silicon oxide or silicon nitride may be formed below the color filters R, G, and B to cover a portion of the linear semiconductor 154 that is exposed.

On the color filters (R, G, B), a protective film made of a low dielectric constant insulating material having a low dielectric constant of 4.0 or less, formed by chemical vapor deposition such as an acrylic organic insulating material having excellent planarization characteristics and a low dielectric constant or SiOC or SiOF, etc. 180 is formed. The passivation layer 180 has a contact hole 185 exposing the drain electrode 175. As described above, when the interlayer insulating film is added to the lower portion of the color filters R, G, and B, the interlayer insulating film has the same planar shape as the interlayer insulating film. The passivation layer 180 also has a plurality of contact holes 182 exposing the end portion 179 of the data line 171, and together with the gate insulating layer 140, exposing the end portion 125 of the gate line 121. It has a plurality of contact holes 181. The contact holes 181 and 182 are for electrical connection between the gate line 121 and the data line 171 and its driving circuit (not shown).

Meanwhile, the passivation layer 180 may be omitted.

A pixel electrode 190 made of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO) is formed on the passivation layer 180. The pixel electrode 190 is physically and electrically connected to the drain electrode 175 through the contact hole 185.

The pixel electrode 190 receives the data voltage from the thin film transistor and generates an electric field together with the common electrode 270 of the other display panel 200. When the applied voltage is changed, the molecular arrangement of the liquid crystal layer 3 between the two field generating electrodes is changed. This changes. From an electrical circuit point of view, the pixel electrode 190 and the common electrode 270 form a liquid crystal dielectric capacitor that stores charge.

The pixel electrode 190 overlaps the gate line 121 and the data line 171 to increase the aperture ratio.

On the other hand, the storage capacitor formed between the storage electrode line 131 and the drain electrode 175 is connected in parallel with the liquid crystal capacitor, thereby improving the charge retention capability of the pixel electrode.

On the other hand, a plurality of contact assistants 81 and 82 are formed on the passivation film 180. The contact auxiliary members 81 and 82 are connected to the exposed end portions 129 and 179 of the gate line 121 and the data line 171 through the contact holes 181 and 182, respectively. The contact auxiliary members 81 and 82 protect the exposed ends 129 and 179 of the gate line 121 and the data line 171 and complement the adhesion between the thin film transistor array panel and the driving circuit. . The contact auxiliary members 81 and 82 are formed of the same layer as the pixel electrode 190.

On the other hand, the upper display panel 200 facing the lower display panel 100 is surrounded by a gate line 121 and a data line 171 on the surface of the upper insulating substrate 210 facing the lower insulating substrate 110. R) A light blocking film 220 is formed in the pixel area of green (G) and blue (B). The light blocking film 220 is made of an organic material including a black pigment. The light blocking film 220 covers an upper portion of the thin film transistor to block light that induces photo electrons to generate a leakage current when the light blocking film 220 is incident on the channel portion of the thin film transistor, and the boundary of the light blocking film 220 has a gate line 121 and data. And opaque patterns, including lines 171.

As such, when the light blocking film 220 extends to the upper portion of the opaque pattern such as the gate line 121 and the data line 171 so that the boundary of the light blocking film 220 is positioned above the opaque pattern, the light blocking film 220 is generated due to the boundary step of the light blocking film 220. Opaque patterns can block light leakage.

A common electrode 270 formed of a transparent conductive material is formed on the lower insulating substrate 210 on which the light blocking film 220 is formed to form an electric field for driving the liquid crystal molecules together with the pixel electrode 190.

In this case, the substrate spacer 320 is positioned on the common electrode 270 on the light blocking film 220. In the pixel region, protrusions may be formed as division alignment means for dividing the liquid crystal molecules 40 of the liquid crystal material layer 3 in the same layer as the substrate spacer 320. In this case, TN mode liquid crystal having positive dielectric anisotropy is used as the liquid crystal molecules 310 of the liquid crystal material layer 3, and the alignment force of the alignment layers 11 and 21 formed on the two display panels 100 and 200. Alternatively, the liquid crystal material layer 3 is oriented horizontally with respect to the two display panels 100 and 200.

Next, a method of manufacturing the upper panel 200 (the opposing display panel) and the lower panel 100 (the thin film transistor array panel) for a liquid crystal display according to an exemplary embodiment of the present invention will be described.

First, a method of manufacturing the upper panel of the liquid crystal display according to the exemplary embodiment of the present invention will be described in detail with reference to FIGS. 4A to 4C.

As shown in FIG. 4A, in the method of manufacturing the upper panel 200 for a liquid crystal display according to the exemplary embodiment of the present invention, first, a photosensitive organic material including a black pigment is formed on the upper insulating substrate 210. The light shielding film 220 is formed by exposure and development by a photo process using a mask. In this case, the light blocking film 220 is disposed above the thin film transistor of the thin film transistor substrate facing the upper panel 200 for the liquid crystal display, and the boundary of the light blocking film 220 is formed on the opaque pattern including the gate line and the data line. It is preferably formed to overlap with a portion, but small so as to cover only the channel region of the thin film transistor. When the light shielding film is formed of an organic film, the light shielding film may have a thickness in a range of 1.5 to 3.0 μm, and the light blocking film 220 may be disposed on the thin film transistor of the thin film transistor substrate facing the upper panel 200 for the liquid crystal display device. ) Is formed so as to overlap the upper portion inside the boundary of the opaque pattern including the gate line and the data line widely distributed in the channel region of the thin film transistor.

Subsequently, as shown in FIG. 4B, a transparent conductive material such as ITO or IZO is stacked on the upper insulating substrate 210 to form the common electrode 270 on the entire surface.

Subsequently, as shown in FIG. 4C, an acrylic photosensitive organic material is coated and exposed and developed by a photo process using a mask to form a substrate spacer 320 positioned on the light blocking film 220. In this case, when the cell gap between the two display panels 100 and 200 is set to 4.0 μm and the light shielding film 220 is formed to 1.5 μm, the substrate spacer 350 is formed to have a thickness of 2.5 μm. .

Subsequently, as shown in FIG. 2, the upper alignment layer 21 is formed on the upper insulating substrate 210.

In the method of manufacturing the liquid crystal common electrode panel according to the exemplary embodiment of the present invention, the light blocking film is formed in the pixel region so as to overlap a portion of the opaque pattern including the thin film transistor channel portion, the gate line, and the data line of the thin film transistor substrate. Light leaking from the boundary may be blocked by the gate line and the data line of the channel portion, thereby preventing light from being transmitted to the channel portion of the thin film transistor. The light shielding film may have various shapes according to the shape of the gate line and the data line of the thin film transistor substrate. In addition, the shape of the gate line and the data line of the thin film transistor substrate may be changed in various forms such that the boundary of the light blocking layer may be located inside the gate line and the data line according to the shape of the light blocking film. In this case, when changing the shape of the gate line and the data line of the thin film transistor substrate, it is desirable to change the parasitic capacitance to be minimized.

In addition, since the boundary of the light blocking film 220 is positioned above the opaque patterns such as the gate line and the data line adjacent to the thin film transistor channel portion of the thin film transistor substrate, the light leakage generated by the step difference of the boundary of the light blocking film 220 is reduced. You can block it.

Next, a method of manufacturing a thin film transistor array panel in the liquid crystal display according to the first exemplary embodiment of the present invention will be described in detail with reference to FIGS. 5A to 8C and FIGS. 1 to 3.

5A to 8A are layout views of thin film transistor array panels at each step of the method of manufacturing a thin film transistor array panel for a liquid crystal display according to an exemplary embodiment of the present invention, and FIGS. 5B to 8B are thin films of FIGS. 4A to 8A, respectively. The transistor display panel is sectional drawing which cut | disconnected and shown along Vb-Vb, VIb-VIb, VIIb-VIIb, VIIIb-VIIIb '.

First, as illustrated in FIGS. 5A through 5B, a conductive layer such as a metal is deposited on the insulating substrate 110 to a thickness of 1,000 Å to 3,000 으로 by a sputtering method, and patterned by a photo and etching process to form a plurality of gate lines. And a plurality of sustain electrode lines 131.

Next, as shown in FIGS. 6A and 6B, three layers of the gate insulating layer 140, the amorphous silicon layer 150, and the ohmic contact layer 160 are sequentially stacked, and the two layers are photographed and etched to form the gate insulating layer ( 140, a plurality of linear semiconductors 154 and a plurality of linearly doped amorphous silicon islands 161 are formed thereon.

7A and 7B, the plurality of data lines 171 and the plurality of drain electrodes 175 including the plurality of source electrodes 173 are formed by a photolithography process. Subsequently, portions of the doped amorphous silicon 161 that are not covered by the data line 171 and the drain electrode 175 are removed, so that each of the doped amorphous silicon 161 is formed into a plurality of linear and island resistive contact members 163 and 165. ), While exposing the portion of the linear semiconductor 154 between the two. Subsequently, an oxygen plasma is preferably performed to stabilize the surface of the exposed linear semiconductor 154.

Next, after forming an interlayer insulating film (not shown) made of silicon nitride, as shown in FIGS. 8A and 8B, the photosensitive organic materials including the pigments of red, green, and blue are sequentially applied to each other to form red, green, and blue colors. The color filters R, G, and B are sequentially formed, and then the passivation layer 180 is laminated. Next, the passivation layer 180 and the gate insulating layer 140 are patterned together by a photolithography process to form contact holes 181, 182, and 185.

Lastly, as shown in FIGS. 1 and 2, the ITO or IZO layer having a thickness of 1400 μs to 1600 μs is deposited and photo-etched to form the plurality of pixel electrodes 190 and the plurality of contact assistants 81 and 82. After forming, the lower alignment layer 11 is formed on the upper portion.

Meanwhile, the structure of a liquid crystal display including a thin film transistor array panel completed by a photolithography process using five masks has been described above. However, in order to minimize manufacturing costs, the thin film transistor array panel may be completed using four masks. This will be described in detail with reference to the accompanying drawings. Here, since the structure of the common electrode display panel is the same as in the first embodiment, it will not be described in detail.

9 to 11, a liquid crystal display according to a second exemplary embodiment of the present invention and a thin film transistor array panel included therein will be described in detail.

9 is a layout view of a liquid crystal display according to a second exemplary embodiment of the present invention, and FIGS. 10 and 11 are cross-sectional views taken along line XX 'and XI-XI', respectively, of FIG. 9. to be. 9 illustrates a light shielding film and a substrate spacer formed in a common electrode display panel for a liquid crystal display according to an exemplary embodiment of the present invention. In FIGS. 10 and 11, the structure of the common electrode display panel is the same as that of the first embodiment. Only the thin film transistor array panel is shown.

9 to 11, the thin film transistor array panel according to the second exemplary embodiment of the present invention includes an amorphous silicon layer, a doped amorphous silicon layer, and a data line 171 on the gate insulating layer 140 of the insulating substrate 110. It is one of the characteristics that the use of a mask is reduced by successively depositing three layers of and then photo-etching and patterning the three layers.

In addition, the storage electrode line 131 is made of the same layer as the gate line 121, is substantially parallel to the gate line 121, and is electrically separated from the gate line 121. The storage electrode line 131 receives a voltage such as a common voltage and faces each other around the plurality of drain electrodes 175 and the gate insulating layer 140 connected to the plurality of pixel electrodes 190 to form a plurality of storage capacitors. .

In addition, a plurality of linear semiconductors 154 and a plurality of ohmic contacts 163 and 165 are provided.

The linear semiconductor 154 has a substantially planar shape with the plurality of data lines 171 and the plurality of drain electrodes 175 except for the channel region of the thin film transistor. That is, although the data line 171 and the drain electrode 175 are separated from each other in the channel region, the linear semiconductor 154 is connected without being disconnected here to form a channel of the thin film transistor.

In this case, as shown in FIG. 9, the light blocking film 220 formed on the common electrode display panel covers the upper portion of the thin film transistor and the boundary of the light blocking film is formed on the gate line 121 and the data line 171.

As such, the boundary of the light blocking film 220 is positioned above the opaque patterns such as the gate line and the data line adjacent to the thin film transistor channel portion of the thin film transistor substrate, thereby preventing the light leakage generated by the step difference of the light blocking film 220. You can block this.

Next, a method of manufacturing a liquid crystal display substrate according to a second embodiment of the present invention will be described in detail with reference to FIGS. 12A to 17B and FIGS. 9 to 11.

12B is a cross-sectional view taken along the line XIIb-XIIb 'in FIG. 12A, and FIGS. 13, 14, and 15 are cross-sectional views taken along the line XIIb-XIIb' in FIG. 12A, respectively. FIG. 16A is a layout view of a thin film transistor array panel in a next step of FIG. 15, and FIG. 16B is a cross-sectional view taken along the line XVIb-XVIb ′ in FIG. 16A, and FIG. 17A is XVIIb-XVIIb in FIG. 16A. FIG. 17B is a cross-sectional view taken along the line XVIIb-XVIIb 'of FIG. 17A.

First, as shown in FIGS. 12A to 12B, a conductive layer such as a metal is deposited to a thickness of 1,000 to 3,000 mm by a sputtering method and patterned by a photo and etching process to form a plurality of gate lines 121 and a plurality of gate lines. The storage electrode line 131 is formed.

Next, as shown in FIG. 13, the gate insulating layer 140, the semiconductor layer 150, and the ohmic contact layer 160 are each 1,600 kPa to 5,000 kPa, 1600 kPa to 2,000 kPa, using chemical vapor deposition. Successive depositions with a thickness of 11400 kPa to 600 kPa. Subsequently, a data conductive layer 170 such as metal is deposited to a thickness of 1,1600 kPa to 3,000 kPa by a method such as sputtering, and then a photosensitive film 60 is applied thereon to a thickness of 1 μm to 2 μm.

Thereafter, the photosensitive film 210 is irradiated with light through a photomask and then developed to form photosensitive film patterns 61 and 62 including first and second portions 61 and 62 having different thicknesses. In this case, the second portion 62 positioned in the channel region C of the thin film transistor is smaller than the first portion 61 positioned in the data region A, and the photoresist 60 portion of the other region B is thinner. Remove all or have a very small thickness. At this time, the ratio of the thickness of the second portion 62 remaining in the channel region C and the thickness of the first portion 61 remaining in the data region A is determined according to the etching conditions in the etching step described later. The thickness of the second portion 62 is preferably 1/2 or less of the thickness of the first portion 61, for example, 4,000 kPa or less.

As such, there may be various methods of varying the thickness of the photoresist pattern according to the position. For example, a translucent area may be added to the photomask in addition to the transparent area and the light blocking area. There is a way to put it. The translucent region is provided with a slit pattern, a lattice pattern, or a thin film having a medium transmittance or a medium thickness. When using the slit pattern, it is preferable that the width of the slits and the interval between the slits are smaller than the resolution of the exposure machine used for the photographic process.

Another method of varying the thickness of the photoresist pattern is to use a photoresist that can be reflowed. That is, a thin portion is formed by forming a reflowable photoresist pattern with a normal mask having only a transparent region and a light shielding region and then reflowing so that the photoresist film flows into an area where no photoresist remains.

First, as shown in FIG. 14, the exposed portion of the data conductive layer 170 of the other region B is removed to expose the lower ohmic contact layer 160. For the data conductive layer 170 including aluminum or an aluminum alloy, either a dry etching method or a wet etching method may be used. For chromium, wet etching using CeNHO 3 as an etchant is preferable. In the case of dry etching, the photoresist patterns 61 and 62 may also be etched to reduce the thickness. Reference numeral 172 denotes a remaining portion of the data conductive layer 170 and will be referred to as conductors in the future.

Next, as shown in FIG. 15, a portion of the exposed ohmic contact layer 160 of the other region B and a portion of the semiconductor layer 150 below it are removed by dry etching to expose the lower conductor 172. Let's do it. The second portion 62 of the photoresist pattern is removed at the same time as or separately from the exposed portion of the ohmic contact layer 160 and the semiconductor layer 150. The second part 62 residue remaining in the channel region C is removed by ashing. Reference numeral 154 denotes a remaining portion of the semiconductor layer 150, and reference numeral 162 denotes a remaining portion of the ohmic contact layer 160. The exposed portion of the conductor 172 and the portion of the ohmic contact layer 162 below it in the channel region C are then removed.

At this time, as shown in FIG. 16, a portion of the upper portion of the island-like semiconductor 154 of the channel region C may be removed to reduce the thickness, and the first portion 61 of the photoresist pattern may also be etched to a certain thickness at this time.

In this way, each of the conductors 172 of the channel region C is completed by separating the data line 171 and the plurality of drain electrodes 175, and each of the ohmic contacts 162 of the channel region C is one. The linear ohmic contact 163 and the plurality of islands of ohmic contact 165 are completed.

The first portion 61 of the photoresist pattern remaining in the data region A is removed after removing the exposed conductor 172 portion of the channel region C or after removing the ohmic contact layer 162 thereunder. .

After completing the data line 171 and the drain electrode 175 in this manner, as shown in Figs. 17A to 17B, a photosensitive material containing pigments of red, green, and blue is applied, and a photo process is performed through an exposure and development process. Patterning forms red, green, and blue color filters (R, G, B) in turn.

In this case, a light blocking layer made of a red or green color filter may be formed on the channel portion C of the thin film transistor, which may more completely block or absorb visible light having a short wavelength incident to the channel portion C of the thin film transistor. For sake.

Subsequently, the passivation layer 180 covering the red, green, and blue color filters R, G, and B on the substrate 110 is laminated by chemical vapor deposition, and patterned together with the gate insulating layer 140 by a photolithography process to form a gate. Contact holes 181, 182, and 185 exposing the end portions 129 and 179 and the drain electrode 175 of the line 121 and the data line 171, respectively, are formed.

Finally, as shown in FIGS. 9 to 11, the pixel electrode 190 and the contact auxiliary members 81 and 82 having a thickness of 1400 μs to 1600 μs are formed, and then the lower alignment layer 11 is formed.

In the second embodiment of the present invention, in addition to the effect according to the first embodiment, the data line 171 and the linear and island resistive contact layer patterns 163 and 165 and the linear semiconductor 154 under the single mask may be used. In this process, the source electrode 173 and the drain electrode 175 may be separated to simplify the manufacturing process.

Such a display panel according to an exemplary embodiment of the present invention, a manufacturing method thereof, and a liquid crystal display including the substrate may be manufactured in various modified forms and methods.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

According to the present invention, the light blocking film is formed on the common electrode display panel of the pixel region, and the boundary of the light blocking film is positioned on opaque patterns such as gate lines and data lines adjacent to the thin film transistor channel portion of the thin film transistor substrate, thereby reducing the aperture ratio. While minimizing the light leakage phenomenon due to the step of the light shielding film at the end of the light shielding film can be prevented.

Claims (2)

First insulating substrate, A gate line formed on the first insulating substrate, A data line formed on the first insulating substrate and insulated from and intersecting the gate line; A thin film transistor having two of three terminals connected to the gate line and the data line, respectively; A pixel electrode connected to the remaining one terminal of the thin film transistor, A second substrate facing the first insulating substrate, A common electrode formed on the second insulating substrate, and Light blocking film formed on the second insulating substrate Wherein the light blocking film is formed at a position overlapping the thin film transistor formed on the first insulating substrate, and the boundary of the light blocking film is formed on the first insulating substrate including the gate line and the data line. The liquid crystal display device which is formed to overlap with the pattern and is disposed in the boundary line of the opaque pattern. In claim 1, And a red, green, and blue color filter formed on the first substrate.