KR20040088756A - Plasma display panel - Google Patents

Abstract

PURPOSE: A plasma display panel is provided to increase an address voltage margin and improve a display function of discharge cells by generating a wall charge enough at a display electrode and a scan electrode. CONSTITUTION: A plasma display panel comprises a first and a second substrate(2,4) spaced apart from each other and arranged in parallel to each other; a plurality of address electrode(8) covered by a dielectric layer on the first substrate; barrier ribs(10) arranged in parallel to the address electrodes between the substrates for forming a discharge space; a phosphor layer(12) formed inside the discharge space; and a plurality of discharge sustain electrodes(16) covered by a dielectric layer on the second substrate. The address electrodes include a line part and an extension part extended toward the width direction within the discharge cell.

Description

Plasma Display Panel {PLASMA DISPLAY PANEL}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel. More particularly, the present invention relates to a plasma display panel in which sufficient wall charges are accumulated on the scan electrode and the display electrode side in an address section to improve the display function of the discharge cell.

Recently, a plasma display panel (PDP), which has been spotlighted by a large screen image display device such as a flat wall-mounted television, excites a fluorescent film by vacuum ultraviolet rays caused by gas discharge occurring in a discharge cell to realize an arbitrary image. .

Such discharge cells are typically formed by barrier ribs having arbitrary patterns (stripes or grids) positioned on the rear substrate, and address electrodes on the rear substrate and orthogonal to the address electrodes on the front substrate corresponding to each discharge cell. The scan electrode and the display electrode are arranged.

As is well known, a plasma display panel is driven by being divided into an initialization section for preparing new information in a cell, an address section for selecting a cell, and a sustaining section in which actual light is emitted. Will be displayed.

FIG. 8 is a schematic diagram illustrating voltage waveforms applied to an address electrode, a display electrode, and a scan electrode in an initialization period and an address period, and FIG. 9 is a period of A, B, C, and D shown in FIG. 8 based on one discharge cell. A schematic diagram showing discharge characteristics.

First, by the initialization operation, cations are accumulated in the address electrode A side and electrons are accumulated in the scan electrode Y side (see Fig. 9A). In this state, when an address voltage is applied between the address electrode A and the scan electrode Y, an address discharge is caused while cations on the address electrode A side and electrons on the scan electrode Y side collide with each other (FIG. 9 ( B) Note).

At this time, since a bias voltage of a positive potential is applied to the display electrode X, electrons and cations move to the display electrode X and the scan electrode Y, respectively (see Fig. 9C). As a result, wall charges are generated on the display electrode X and the scan electrode Y side, and the structure is changed to a structure capable of sustain discharge (see FIG. 9 (D)). As the wall charge is generated in this manner, the address discharge is terminated to select the cell to emit light.

Recently, however, the plasma display panel has high definition, and thus, insufficient wall charges are generated in the above-described address period, resulting in a low address voltage margin and a deterioration in display function of the discharge cell. This is because each of the R, G, and B discharge cells has a fine width according to the high-definition structure of the panel, and the number of pixels increases, so that the address time for each discharge cell is insufficient.

As described above, when the address time for each discharge cell becomes insufficient, the cations on the address electrode A side and the electrons on the scan electrode Y side do not sufficiently collide in the above-described section of FIG. 9B, resulting in insufficient address discharge. As a result, weak wall charges are generated on the display electrode X and the scan electrode Y in the section of FIG. 9D.

Therefore, when the sustain voltage is applied to the display electrode X and the scan electrode Y in the sustain period, the electrons on the display electrode X side and the cations on the scan electrode Y side collide with each other to generate sustain discharge. Since the wall charges are not sufficiently generated in the section, low discharge occurs in the sustain section, resulting in a low address voltage margin and a deterioration of the display function of the discharge cell.

Accordingly, an object of the present invention is to solve the above problems, and an object of the present invention is to generate sufficient wall charges to the display electrode and the scan electrode in the address section even in a high-definition panel having an increased number of pixels, thereby increasing address voltage margin and displaying discharge cells. It is to provide a plasma display panel that can improve the function.

1 is a partially exploded perspective view of a plasma display panel according to a first embodiment of the present invention.

FIG. 2 is a schematic diagram of the address electrode and the discharge sustaining electrode shown in FIG.

3 is a partially enlarged view of an address electrode positioned in the first region and the second region illustrated in FIG. 2.

4 is a schematic diagram of an address electrode and a discharge sustaining electrode of a plasma display panel according to a second embodiment of the present invention.

FIG. 5 is a partially enlarged view of the address electrode located in the first to third regions shown in FIG. 4.

6 is a schematic diagram of an address electrode and a partition wall for explaining a first modification of the embodiment of the present invention.

7 is a schematic diagram of an address electrode for explaining a second modification to the embodiment of the present invention.

8 is a schematic diagram illustrating voltage waveforms applied to an address electrode, a display electrode, and a scan electrode in an initialization period and an address period.

9 is a schematic diagram showing discharge characteristics in sections A, B, C, and D shown in FIG. 8 based on one discharge cell.

In order to achieve the above object, the present invention,

A plurality of address electrodes covered with a dielectric layer on the first substrate, partition walls disposed in parallel with the address electrodes between the substrates to form a discharge space, a fluorescent layer formed in the discharge space, and one surface of the second substrate And a plurality of display electrodes and scan electrodes, each of which is disposed orthogonal to the address electrodes and constitutes a discharge cell, and includes a plurality of discharge sustain electrodes covered by a dielectric layer, wherein the address electrode includes a line portion along a length direction; And when the discharge cells are divided into two or more regions along the length direction of the address electrode from the pulse application unit which extends in the width direction in the discharge cell and the driving pulse is applied to the address electrode. Plasma formed in a different area than the extensions located in the other area Provide a display panel.

Preferably, the extension of the address electrode is disposed opposite the scan electrode.

The discharge cells may be classified into a first region and a second region along a length direction of the address electrode from the pulse applying unit, in which case an extension area of the address electrode located in the first region is located in the second region. It is made larger than the extension area of the electrode.

On the other hand, the discharge cells may be classified into a first region, a second region, and a third region along the length direction of the address electrode from the pulse applying unit, in which case the extension portion of the address electrode satisfies the following condition.

S3> S1> S2

Here, S1, S2, and S3 represent the area of the extension portion of the address electrode located in the first region, the second region, and the third region, respectively.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a partially exploded perspective view of a plasma display panel according to a first embodiment of the present invention, and FIG. 2 is a schematic view of an address electrode and a discharge sustaining electrode shown in FIG.

As shown, the plasma display panel arranges the two transparent first substrates 2 and the second substrates 4 substantially parallel at arbitrary intervals and implements an image by a discharge mechanism between the substrates. It is provided with a configuration that can.

Looking at the configuration thereof, first, a plurality of address electrodes 8 covered with a dielectric layer 6 are formed in a stripe pattern on the first substrate 2, and parallel to the address electrodes 8 over the dielectric layer 6. A plurality of partitions 10 positioned between these address electrodes 8 are provided. In addition, a fluorescent layer 12 made of R, G, and B phosphors is provided on the side surfaces of the barrier ribs 10 and the top surface of the dielectric layer 6.

In addition, discharge sustaining electrodes 16 disposed on one surface of the second substrate 4 opposite to the first substrate 2 and covered with the transparent dielectric layer 14 while being orthogonal to the address electrodes 8 have a stripe pattern. Is formed. Each discharge holding electrode 16 is made of a scan electrode 16Y and a display electrode 16X, and the scan electrode 16Y and the display electrode 16X are made of a transparent material such as ITO. In addition, a transparent protective film 18 made of MgO or the like is disposed on the transparent dielectric layer 14.

The partitions 10 constitute a space formed therebetween as a discharge space, and discharge gas is injected into the discharge space to form discharge cells, wherein one of the address electrode 8 and the discharge sustain electrode 16 is formed. An intersection portion, that is, an intersection portion of one address electrode 8 with the display electrode 16X and the scan electrode 16Y constitutes one discharge cell 20.

As shown in FIG. 2, the discharge sustaining electrode 16 is formed by alternately disposing the display electrode 16X and the scan electrode 16Y with respect to the entire display area in which the discharge cells 20 are formed.

Here, the plasma display panel according to the present embodiment varies the width of the address electrode 8 located inside the discharge cell 20 in consideration of the state of charge of the discharge cell 20, thereby sufficiently addressing the discharge even in a high-definition panel. It adopts the structure which makes it happen.

In more detail, in the present embodiment, the address electrode 8 includes a line part 8a along the length direction and extension parts 8b extending in the width direction in the discharge cell 20. 8b is preferably arranged opposite to each scan electrode 16Y.

As shown in FIG. 2, from the pulse applying unit 8c (the upper end of the address electrode as an example in the figure) to which the address pulse is applied to the entire display area in which the discharge cells 20 are formed, The discharge cells 20 are classified into two or more regions, preferably two regions along the longitudinal direction, and differently form areas of the extension portion 8b of the address electrode 8 positioned in different regions.

The classification of the discharge cells 20 into different regions along the longitudinal direction of the address electrode 8 is performed by applying an address pulse to the address electrode 8 through the pulse applying unit 8c. This is because the charge states of the discharge cells 20 have different characteristics according to the length direction of 8).

That is, when the discharge cells 20 are classified into two regions, the first region A closest to the pulse applying unit 8c is the portion where the address pulse is first applied, and the second region B is the first region. It can be said that the wall charges activated in (A) move to the second region (B), where address discharge occurs more easily.

3 is a partially enlarged view of the address electrodes located in the first region and the second region. In this embodiment, in consideration of the characteristics of the above-described regions, the expansion part 8b of the address electrode 8 has the following modification condition. Configure to satisfy

Here, S1 and S2 represent the area of the extended portion 8b of the address electrode 8 located in the first region A and the second region B, respectively.

The differentiation of the area of the expansion part 8b is, for example, by applying the vertical width w of the expansion part 8b along the longitudinal direction of the address electrode 8 to the entire discharge cells 20 in the same manner. As described above, the horizontal width of the expansion portion 8b along the width direction of the address electrode 8 can be easily realized for each region. At this time, the extension portion 8b of the address electrode 8 is preferably rectangular.

Here, d1 and d2 represent the widths of the extension portions 8b of the address electrodes 8 located in the first region A and the second region, respectively.

In the above-described configuration, the discharge characteristics of the respective regions are applied in the address period in which the address pulse and the scan pulse are applied to the address electrode 8 and the scan electrode 16Y while the bias voltage is applied to the display electrode 16X after the initialization operation. Looking at it as follows. (The voltage waveform in the address section is the same as in FIG. 8.)

As the area of the extended portion 8b positioned in the first region A is larger than that of the extended portion 8b positioned in the second region B, in the first region A to which the address pulse is first applied, The extension 8b activates the address discharge to generate sufficient wall charges toward the display electrode 16X and the scan electrode 16Y positioned in the first region A. FIG.

As the wall charges activated in the first area A are moved to the second area B along the discharge space, the extension part 8b positioned in the second area B is the first area A. The display electrode 16X and the scan electrode positioned in the second region B because the address discharge is activated by the wall charges moved to the second region B even though the area is smaller than the extension part 8b positioned in the second region B. FIG. Sufficient wall charges are generated on the (16Y) side.

Therefore, in the present embodiment, sufficient wall charges are generated on the display electrode 16X and the scan electrode 16Y side in the address period for all the discharge cells 20 positioned in the display area, and as a result, sufficient sustain in the subsequent sustain period. The discharge causes the address voltage margin to be increased, and the display function of the discharge cells 20 is improved.

The above embodiment is suitable for the case of dual driving in which the entire display area is divided into two sections, the upper and lower sections. This is because in the dual driving, the lower portion of the display area has better address discharge and address margin than the upper portion of the display area.

FIG. 4 is a schematic view of an address electrode and a discharge sustaining electrode of a plasma display panel according to a second embodiment of the present invention, and FIG. 5 is a partially enlarged view of the address electrodes located in the first to third regions shown in FIG. to be.

In the present embodiment, discharge is performed along the length direction of the address electrode 8 from the pulse applying unit 8c (the upper end of the address electrode as an example in the figure) to which the address pulse is applied to the entire display area where the discharge cells 20 are formed. The cells 20 are classified into three regions, and the areas of the extended portion 8b of the address electrode 8 positioned in the classified first region A, the second region B, and the third region C are mutually different. Form differently.

When the discharge cells are classified into three regions as described above, the first region A closest to the pulse applying unit 8c is the portion where the address pulse is first applied, and the second region B is the first region A. FIG. The wall charges activated at are moved to the second area (B) to facilitate the address discharge, and the third area (C) is the section where the address pulse is applied last, and is the next sustain discharge after the address discharge. It can be said that it takes the longest time.

Therefore, in the present embodiment, in consideration of the above-described characteristics of each region, the extension portion 8b of the address electrode 8 is configured to satisfy the following modification condition.

Here, S1, S2, and S3 represent the area of the extension portion 8b of the address electrode 8 located in the first region A, the second region B, and the third region C, respectively.

The differentiation of the area of the expansion portion 8b is similar to the above-described embodiment in that the vertical width w of the expansion portion 8b along the longitudinal direction of the address electrode 8 is the same for the entire discharge cells 20. It can be easily realized by setting the horizontal width of the expansion portion 8b according to the width direction of the address electrode 8 differently for each region as shown in the following modification condition.

Here, d1, d2, and d3 represent the widths of the extension portions 8b of the address electrodes 8 located in the first region A, the second region B, and the third region C, respectively.

For example, based on a 50-inch plasma display panel having 1024 × 768 pixels, in the present embodiment, the horizontal width d1 of the expansion portion 8b positioned in the first area A is 130 μm, The horizontal width d2 of the extension portion 8b positioned in the second region B can be set to 120 μm, and the horizontal width d3 of the extension portion 8b positioned in the third region C can be set to 150 μm. . In this case, the width of the line portion 8a of the address electrode 8 is 80 to 100 µm, and the vertical width w of the extension portion 8b along the longitudinal direction of the address electrode 8 is preferably 100 to 350 µm. Do.

In the above-described configuration, the discharge characteristics of the respective regions are applied in the address period in which the address pulse and the scan pulse are applied to the address electrode 8 and the scan electrode 16Y while the bias voltage is applied to the display electrode 16X after the initialization operation. Looking at it as follows. (The voltage waveform in the address section is the same as in FIG. 8.)

First, as the area of the extended portion 8b positioned in the first region A is larger than that of the extended portion 8b positioned in the second region B, the first region A to which the address pulse is applied first is applied. The expansion portion 8b activates the address discharge so that sufficient wall charges are generated toward the display electrode 16X and the scan electrode 16Y positioned in the first region A.

As the wall charges activated in the first area A are moved to the second area B along the discharge space, the extension part 8b positioned in the second area B is the first area A. The display electrode 16X and the scan electrode positioned in the second region B because the address discharge is activated by the wall charges moved to the second region B even though the area is smaller than the extension part 8b positioned in the second region B. FIG. Sufficient wall charges are generated on the (16Y) side.

In addition, as the area of the extended portion 8b positioned in the third region C is larger than that of the extended portion 8b positioned in the first and second regions A and B, the first address pulse is applied last. In the third region C, the extension 8b activates the address discharge so that sufficient wall charges are generated on the display electrode 16X and the scan electrode 16Y located in the third region C. As shown in FIG.

As described above, the present embodiment also generates sufficient wall charges on the display electrode 16X and scan electrode 16Y side in the address section for all the discharge cells 20 positioned in the display area. The sustain discharge is caused to increase the display function of the discharge cells 20.

The above effect is effective even in the case where the plasma display panel has a high definition, the discharge cells 20 have a fine width, and the number of pixels increases so that the address time for each discharge cell 20 is insufficient. Stabilization of the discharge can be achieved in the panel.

Furthermore, since the extended portion 8b of the address electrode 8 is disposed opposite to the scan electrode 16Y, the address electrode 8 is substantially unaffected by the display electrode 16X during address discharge. Therefore, the address voltage can be applied to the address electrode 8 and the scan electrode 16Y without considering the influence of the display electrode 16X, so that the margin of the address voltage is expanded and sufficient address discharge occurs even if the address voltage itself is lowered. Has an effect.

Next, modifications to the embodiment of the present invention will be described with reference to FIGS. 6 to 7.

FIG. 6 is a first modification, in which case a plurality of partitions 10 are provided over the line portion 8a of the address electrode 8, based on the structure of the above-described embodiments, and the address electrode 8 is expanded. The portion 8b extends in the width direction from one side of the line portion 8a to form a plasma display panel.

In this modification in which the partition wall 10 is formed on the line portion 8a of the address electrode 8 as described above, since the opposing areas of the address electrode 8 and the display electrode 16X in each discharge cell can be minimized, Compared with the structure of the above-described embodiment, the address voltage margin can be effectively expanded.

Fig. 7 is a second modification, in which case the base portion 8b of the address electrode 8 is composed of polygons, for example, octagons or more, having a pentagonal shape, based on the structure of the above-described embodiment to form a plasma display panel. The modification of the extension 8b is equally applied to the first modification described above, and the extension 8b of the address electrode 8 may be circular in addition to the polygon.

Although the preferred embodiments of the present invention have been described above, the present invention is not limited thereto, and various modifications and changes can be made within the scope of the claims and the detailed description of the invention and the accompanying drawings. Naturally, it belongs to the scope of the invention.

As described above, according to the present invention, even in a high-definition panel having a larger number of pixels, sufficient wall charges are generated on the display electrode and the scan electrode side during address discharge, thereby improving the display function of the discharge cells. In addition, since the structure of the extended portion of the address electrode does not substantially consider the influence of the display electrode during address discharge, the address voltage margin is improved.

Claims (10)

First and second substrates arranged in parallel at any interval; A plurality of address electrodes covered with a dielectric layer on the first substrate; Barrier ribs disposed in parallel with the address electrodes between the substrates to form a discharge space; A fluorescent layer formed in the discharge space; And A plurality of discharge sustaining electrodes formed of a pair of display electrodes and scan electrodes disposed on one surface of the second substrate in an orthogonal state with the address electrodes to constitute a discharge cell, and covered with a dielectric layer, The address electrode includes a line portion along a length direction and expansion portions extending in a width direction in the discharge cell, When the discharge cells are classified into two or more regions along the length direction of the address electrode from the pulse application unit to which the driving pulse is applied to the address electrode, the expansion portions located in one region are located in the other region; A plasma display panel formed with different areas. The method of claim 1, And an extended portion of the address electrode is disposed to face the scan electrode. The method of claim 1, And the discharge cells are classified into a first region and a second region along the longitudinal direction of the address electrode from the pulse applying unit, and an extension of the address electrode satisfies the following condition. S1> S2 Here, S1 and S2 represent the area of the extension portion of the address electrode located in the first region and the second region, respectively. The method of claim 3, wherein And the extension portion of the address electrode has the same first width along the longitudinal direction of the address electrode for all the discharge cells, and the second width along the width direction of the address electrode satisfies the following conditions. d1> d2 Here, d1 and d2 represent the second widths of the address electrode extension portions positioned in the first region and the second region, respectively. The method of claim 1, And the discharge cells are classified into a first region, a second region, and a third region along the longitudinal direction of the address electrode from the pulse applying unit, and an extension of the address electrode satisfies the following condition. S3> S1> S2 Here, S1, S2, and S3 represent the area of the extension portion of the address electrode located in the first region, the second region, and the third region, respectively. The method of claim 5, And an extension portion of the address electrode having the same first width in the longitudinal direction of the address electrode for all the discharge cells, and a second width in the width direction of the address electrode satisfying the following conditions. d3> d1> d2 Here, d1, d2, and d3 represent second widths of the address electrode extension portions positioned in the first region, the second region, and the third region, respectively. The method of claim 1, And the barrier ribs are positioned between the address electrodes. The method of claim 1, And the barrier ribs are disposed on a line portion of the address electrode. The method of claim 1, And an extension of the address electrode in a rectangular shape. The method of claim 1, And an extension of the address electrode in a polygonal shape.