KR20040071836A - Cmos active pixel for improving the minimum illumination chracteristics in image sensor and operating methord therefor - Google Patents

Abstract

PURPOSE: A method for driving an optical image receiving device is provided to minimize a non-response region of a pixel of an initial state. CONSTITUTION: A reset interval includes a timing interval of a reset control signal and a transmission control signal generated in a read interval. The reset interval includes the timing interval of the reset control signal and the transmission control signal for forming a potential barrier corresponding to a level of a potential barrier formed between a photo diode(PH) and a transmission transistor(25). The reset control signal maintains an inactive state. The transmission control signal includes an interval which is activated and inactivated.

Description

CMOS ACTIVE PIXEL FOR IMPROVING THE MINIMUM ILLUMINATION CHRACTERISTICS IN IMAGE SENSOR AND OPERATING METHORD THEREFOR}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image sensor and, more particularly, to a pixel of a CMOS metal sensor and a driving method thereof.

An image sensor is a device that captures an image by using a property of a semiconductor device that responds to external energy (eg, photons). Light generated from each subject in the natural world has its own energy value in wavelength and the like. The pixel of the image sensor detects light generated from each subject and converts it into an electric value.

FIG. 1 is a conventional timing diagram of related signals for driving an image sensor using a 4-transistor CMOS active pixel, and is a timing diagram of reading data using a correlated double sampling (CDS) technique. FIG. 2 is a diagram illustrating a conventional 4-transistor CMOS active pixel, and illustrates a potential of each region based on a cross-section of a photo-diode and the timing diagram of FIG. 1.

Referring to FIG. 2, the 4-transistor CMOS active pixel includes a transfer transistor 11 connecting the photodiode region A1 and the floating diffusion node region A3, and a reset transistor for initializing the photodiode region A1. (13) is included. The photodiode PH is formed at a depth away from the surface of the semiconductor, which is a dark current source, to reduce the dark current. Therefore, an electrical potential barrier or potential well is formed in accordance with the state of the semiconductor impurity implantation of the portion K connecting the transfer transistor 11 and the photodiode PH.

On the other hand, since the potential well has a property of retaining the generated charge as it is, most semiconductor manufacturers exclude the shape of the potential well, and manufacture the pixel in the form of the potential barrier. In addition, semiconductor manufacturers are trying to improve the process to minimize potential barriers. However, since the potential barriers are of different sizes due to process condition variations, there is a considerable difficulty in removing the potential barriers by the process technique.

As the potential barrier increases, the amount of charge remaining in the photodiode PH does not move to the floating diffusion node PH. As a result, the dead region of the image sensor is increased. This increase in the non-response region is more evident when reading data using the Correlated Double Sampling (CDS) technique of timing shown in FIG. In FIG. 1, the reset sampling signal RHS is a signal for sampling and storing reset data (that is, an electrical potential of an initial state of the floating diffusion node FD), and the signal sampling signal DSH is a signal data (ie, A signal for sampling and storing the electrical potential of the floating diffusion node FD after receiving the charge generated by the photodiode PH.

In the electron potential of FIG. 2, the solid line n1 represents the electron potential in the state in which both the transfer transistor 11 and the reset transistor 13 are "turned on", that is, in the reset section Z1 of FIG. However, as can be seen from the solid line n1 of FIG. 2, the transfer transistor 11 and the reset transistor are formed by the potential barrier w1 formed at the interface K between the photodiode PH and the transfer transistor region A2. Even if all 13 are "turned on", a certain amount of residual charge remains in the photodiode region A1. In this state, when the transfer transistor 11 is " turned off ", the sensing operation of the photodiode PH is started (time t1). Then, when the sensing operation ends and starts reading the sensed signal charge, the reset transistor GRX is " turned off " to isolate the floating diffusion node FD (time t2). Then, at this time, the potential of the floating diffusion node FD is lowered. Due to this effect, when the transfer transistor 11 is " turned on " (time t3), the potential barrier between the photodiode PH and the interface K of the transfer transistor 11 is in a reset state, that is, a solid line n1. (W1 + w2), which is higher than the case of (the electron potential at this time point t3 is shown by the dotted line n2 in FIG. 2). Thus, the transfer transistor 11 is read to read signal data. When turned "on", the charge generated in the initial state remains in the photodiode region A1 until the electron potential of the photodiode PH becomes (w1 + w2). That is, a problem occurs that the unresponsive region of the pixel continues.

SUMMARY OF THE INVENTION An object of the present invention is to solve the above problems of the prior art, and to provide a CMOS active pixel and a method of driving the same, which minimize an unresponsive region of a pixel in an initial state.

In order to more fully understand the drawings used in the detailed description of the invention, a brief description of each drawing is provided.

1 is a conventional timing diagram of related signals for driving an image sensor using a four-transistor CMOS active pixel.

FIG. 2 is a diagram illustrating a conventional 4-transistor CMOS active pixel, and illustrates a potential of each region based on a cross-section of a photo-diode and the timing diagram of FIG. 1.

3 is a circuit diagram illustrating an image sensor using a four-transistor CMOS active pixel.

FIG. 4 is a timing diagram according to an embodiment of the present invention, and is a timing diagram of signals for driving an image sensor using the 4-transistor CMOS active pixel of FIG. 3.

5 is a modified timing diagram of FIG. 4.

6 is a circuit diagram illustrating an example of a control signal generator that generates a transmission control signal and a reset control signal in the timing diagram of FIG. 4.

One aspect of the present invention for achieving the above technical problem relates to a method of driving a CMOS active pixel included in the image sensor. The CMOS active pixel may include a photodiode for generating signal charges according to photons received; A transfer transistor configured to provide the signal charge to a predetermined floating diffusion node in response to a transfer control signal activated during a read period of the image sensor; The floating diffusion node receiving the signal charge transmitted by the transfer transistor; A reset transistor configured to reset the floating diffusion node in response to a reset control signal activated in a predetermined reset period in which the readout period is not conflicted with the read period; The driving transistor controlled by the voltage level of the floating diffusion node; And a selection transistor that transmits a voltage transmitted by the driving transistor to a corresponding data line in response to a predetermined row selection signal. The reset period is a timing period of the reset control signal and the transfer control signal generated in the read period, and forms a potential barrier corresponding to the size of the potential barrier formed between the photodiode and the transfer transistor. And a timing interval of a reset control signal and the transmission control signal.

One aspect of the present invention for achieving the above technical problem relates to a CMOS active pixel included in the image sensor. The CMOS active pixel of the present invention comprises: a photodiode for generating signal charges according to photons received; A transfer transistor configured to provide the signal charge to a predetermined floating diffusion node in response to a transfer control signal activated during a read period of the image sensor; The floating diffusion node receiving the signal charge transmitted by the transfer transistor; A reset transistor configured to reset the floating diffusion node in response to a reset control signal activated in a predetermined reset period in which the readout period is not conflicted with the read period; The driving transistor controlled by the voltage level of the floating diffusion node; A selection transistor that transmits a voltage transmitted by the driving transistor to a corresponding data line in response to a predetermined row selection signal; And a control signal generator for generating the reset control signal and the transmission control signal. The reset period is a timing period of the reset control signal and the transfer control signal generated in the read period, and forms a potential barrier corresponding to the size of the potential barrier formed between the photodiode and the transfer transistor. And a timing interval of a reset control signal and the transmission control signal.

In order to fully understand the present invention, the operational advantages of the present invention, and the objects achieved by the practice of the present invention, reference should be made to the accompanying drawings which illustrate preferred embodiments of the present invention and the contents described in the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. For each figure, like reference numerals denote like elements.

3 is a circuit diagram illustrating an image sensor using a four-transistor CMOS active pixel 20. Referring to FIG. 3, the four-transistor CMOS active pixel 20 includes a photo diode PH, a transfer transistor 25, a reset transistor 27, a floating diffusion node FD, a driving transistor 28, and a selection transistor. (29) is provided.

The photodiode PH forms a signal charge according to the photons received. Preferably, the photodiode PH has a fin structure. That is, the photodiode PH forms an impurity layer by implanting an N-type impurity formed on a P-WELL or P-type substrate, thereby forming an intrinsic semiconductor layer at the boundary of the PN junction. As described above, the pinned photodiode forms a PN junction at both the lower and upper interfaces of the N-type impurity layer, thereby increasing the quantum efficiency.

The transfer transistor 25 is gated by a predetermined transfer control signal GTX. Therefore, when the transmission control signal GTX is activated "high", the photodiode PH forms a current path with the floating diffusion node FD. The floating diffusion node FD receives signal charges generated by the photodiode PH.

The reset transistor 27 is gated by a predetermined reset control signal GRX. That is, when the reset control signal GRX is activated "high", the charge remaining in the floating diffusion node FD is discharged toward the power supply voltage VDD. Therefore, when the reset control signal GRX is activated and the transmission control signal GTX is activated "high", the potential energy of the photodiode PH is initialized.

The driving transistor 28 is gated by the floating diffusion node FD. That is, the driving transistor 28 is controlled by the voltage level of the floating diffusion node FD, and ultimately the voltage level transmitted to the data line DL is determined.

The select transistor 29 responds to a voltage transmitted by the driving transistor 28 in response to a predetermined row select signal GSX, so that the data line DL corresponds to a column of the CMOS active pixel 20. To transmit. The row select signal GSX is a signal for selecting a row including the CMOS active pixel 20. When the row select signal GSX is activated, data of all CMOS active pixels in the same row is selected. Are transmitted to their respective data lines DL.

In response to the reset sampling signal RSH and the data sampling signal DSH, the voltage of the data line DL is sampled with the reset voltage and the data voltage, respectively, so that the first capacitor C1 and the second capacitor C2 are respectively. Are stored in. The stored reset voltage and the data voltage are compared by the comparator 40 to generate a first output signal VOUT1 and a second output signal VOUT2.

FIG. 4 is a timing diagram according to an embodiment of the present invention, and is a timing diagram of signals for driving an image sensor using the 4-transistor CMOS active pixel of FIG. 3. As shown in FIG. 4, the reset transistor GRX and the transfer transistor GTX are " turned on " at the same time during the period A where light is not sensed. Therefore, in the section A, the photodiode PH is initialized. And. Just before entering the section C for detecting the electrons generated by the photodiode PH, section B for generating the timing of the reset control signal GRX and the transmission control signal GTX continues.

The essential effect of the present invention is caused by the presence of section B. The timing of the section B takes into account the timing of the section D, which reads data according to the sensed photoelectrons, so that the potential barrier of the photodiode and the transmission transistor having the same size as the section B is formed.

In order to form such a potential barrier, the section B forms a timing in the same environment as that of the section D when reading data. That is, the section B includes timings for turning the transfer transistor 25 "turned on" and then "turned off" while the reset transistor 27 is "turned off". This timing operation causes the potential barrier between the photodiode and the transfer transistor to rise, as described in connection with the prior art.

Therefore, in the photodiode PH, before the C section starts, the electron potential of the interface between the photodiode PH and the transfer transistor 25 is raised in advance by the electron potential formed in the D section. Therefore, as in the read operation of the section D, the amount of charges which cannot be taken out by the potential barrier w1 + w2 when reading data according to the photoelectrons generated in the photodiode PH is previously photodiode in the section C. (PH) is filled.

The reset transistor 27 may then maintain a " turn off " state and may " turn on " again. When the reset transistor 27 is kept in the " turned off " state, the generation of dark current can be reduced, so that the loss of power as a whole can be reduced.

The sensing operation of the C section is terminated, and the charges stored in the photodiode PH are read out according to the timing diagram of the D section of FIG. 4. That is, the reset sampling signal RSH and the signal sampling signal DSH are activated, and the data in the pixel is output through the correlation overlap sampling method.

In the present specification, the A section and the B section are added together, and are referred to as "reset sections". Section C is referred to as a "sensing section" and section D is referred to as a "read section".

FIG. 5 is a modified timing diagram of FIG. 4, which shows that the present invention can be normally performed even if the width of the B ′ section decreases due to a delay of deactivation of the transmission control signal GTX in the reset period.

When the operations of the reset control signal GRX and the transmission control signal GTX in the present invention shown in FIGS. 4 and 5 are summarized, the reset control signal GRX is maintained in an inactive state and the transmission control is performed. The signal GTX is activated and then deactivated is included in both the reset section (B section) and the read section (D).

On the other hand, in order to control the timing of the section B and the section D separately, a control signal generator as in the example shown in FIG. 6 is required. In FIG. 6, the integrated transmission signal Integ-TX and the integrated reset signal Integ-RX are signal lines for applying control signals of the section B in FIGS. 4 and 5 to the pixel. That is, the control signal generator of FIG. 6 is controlled by the integrated transmission signal Integ-Tx and the integrated reset signal Integ-Rx for controlling the reset period in order to generate the control signals in the B period. In addition, the control signal generator of FIG. 6 is provided with the scan transmission control signal Scan-Tx, the scan reset control signal Scan-Rx, and the scan selection signal Scan-Sx as in the normal case. The scan transmission control signal Scan-Tx, the scan reset control signal Scan-Rx, and the scan selection signal Scan-Sx are signals for applying a control signal of the section D of FIGS. 4 and 5 to the pixel. , Signals are well known in the art. (N) in parentheses indicates the corresponding row in the sensor array. An and An + 1 are signals for selecting a specific row in a reset period, and Bn and Bn + 1 are signals for selecting a specific row in a read period.

Then, the effect of this invention is as follows.

1. According to the present invention, it is possible to manufacture an image sensor using a complementary thin film transistor process that can be sensed even in a darker environment. According to the present invention, it is expected that the characteristics of the minimum light amount corresponding to the CCD image sensor can be expected in the CMOS image sensor.

2. The problem that the characteristics of the image sensor are greatly shaken by the slight deviation of the process which has been the most obstacle in mass production of the CMOS image sensor before the present invention is solved, thereby enabling the mass production of the CMOS image sensor.

3. In general, there is a difference in the sensitivity of the image sensor to the color pigment blue, red, and green. In an image sensor in which such an unresponsive region exists, the unresponsive region is different for each color, and thus the signal output from the unit pixel is used. Although there are considerable limitations in image processing, the present invention makes it easier and easier to process the image as the red, blue, and green unresponsive regions are almost matched.

4. The image is replayed through the screen after detection. In this process, gamma processing (nonlinear conversion according to the reproduction value of each pixel) is performed because of the characteristics of the display device. The pixel-to-pixel difference of the non-response region (screen in a dark environment) with respect to light is expressed as a large difference on the screen. By reducing the typical deviation of the non-response region for each pixel of the present invention, the image after the gamma treatment can also obtain good image quality.

5. Normally, noise in image data can be expressed as the deviation between pixels in the pixel array constituting the screen (when the same amount of light is incident). Severe noise has been caused by this. However, according to the present invention, since the non-response region between pixels is almost coincident, the data deviation due to the same incident light amount can be controlled to a large extent, thereby providing a better quality screen.

Although the present invention has been described with reference to one embodiment shown in the drawings, this is merely exemplary, and those skilled in the art will understand that various modifications and equivalent other embodiments are possible therefrom. Therefore, the true technical protection scope of the present invention will be defined by the technical spirit of the appended claims.

In the CMOS active pixel and the driving method thereof according to the present invention as described above, the timing of the transmission control signal and the reset control signal, which may occur in the read period, is realized in advance in the reset period. Therefore, the potential barrier between the photodiode region and the transfer transistor of the size generated in the readout section is formed in advance in the reset section, and the charges are filled in the photodiode region. Therefore, the dead zone is minimized in the reading section. Therefore, the minimum light quantity characteristic of the image sensor is improved.

Claims (6)

A method of driving a CMOS active pixel included in an image sensor, the CMOS active pixel comprising: a photodiode generating signal charge according to photons received; A transfer transistor configured to provide the signal charge to a predetermined floating diffusion node in response to a transfer control signal activated during a read period of the image sensor; The floating diffusion node receiving the signal charge transmitted by the transfer transistor; A reset transistor configured to reset the floating diffusion node in response to a reset control signal activated in a predetermined reset period in which the readout period is not conflicted with the read period; The driving transistor controlled by the voltage level of the floating diffusion node; And a selection transistor configured to transfer a voltage transmitted by the driving transistor to a corresponding data line in response to a predetermined row selection signal, the method of driving the CMOS active pixel. The reset section is The reset control signal and the transmission which form a potential barrier corresponding to the magnitude of the potential barrier formed between the photodiode and the transfer transistor as a timing interval of the reset control signal and the transfer control signal generated in the readout period. And a timing section of a control signal. The method of claim 1, wherein the read period and the reset period each is And the reset control signal maintains an inactive state, and the transmission control signal includes a period of being activated and then inactivated again. The method of claim 1 or 2, wherein the reset control signal is And inactivating the CMOS active pixel until the readout period ends even after the transmission control signal is inactivated. In the CMOS active pixel included in the image sensor, A photodiode for generating signal charges in accordance with the photons received; A transfer transistor configured to provide the signal charge to a predetermined floating diffusion node in response to a transfer control signal activated during a read period of the image sensor; The floating diffusion node receiving the signal charge transmitted by the transfer transistor; A reset transistor configured to reset the floating diffusion node in response to a reset control signal activated in a predetermined reset period that is not in conflict with the read period; The driving transistor controlled by the voltage level of the floating diffusion node; A selection transistor that transmits a voltage transmitted by the driving transistor to a corresponding data line in response to a predetermined row selection signal; And A control signal generator for generating the reset control signal and the transmission control signal; The reset period is a timing period of the reset control signal and the transfer control signal generated in the read period, and the reset control to form a potential barrier corresponding to the magnitude of the potential barrier formed between the photodiode and the transfer transistor. And the timing section of the signal and the transmission control signal. The method of claim 4, wherein Each of the read section and the reset section And the reset control signal maintains an inactive state, and the transmission control signal includes a period of being activated and then inactivated again. The method of claim 4 or 5, wherein the control signal generator In response to a predetermined integrated reset signal and a predetermined integrated transmission signal, The integrated reset signal controls the generation of the reset control signal in the reset period, and the integrated transmission signal controls the generation of the transmission control signal in the reset period. .