KR20040060412A - Method for forming photoresist pattern for hard mask - Google Patents
Method for forming photoresist pattern for hard mask Download PDFInfo
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- KR20040060412A KR20040060412A KR1020020087202A KR20020087202A KR20040060412A KR 20040060412 A KR20040060412 A KR 20040060412A KR 1020020087202 A KR1020020087202 A KR 1020020087202A KR 20020087202 A KR20020087202 A KR 20020087202A KR 20040060412 A KR20040060412 A KR 20040060412A
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- photoresist pattern
- hard mask
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- photoresist
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- 238000000034 method Methods 0.000 title claims abstract description 65
- 229920002120 photoresistant polymer Polymers 0.000 title claims abstract description 57
- 238000005530 etching Methods 0.000 claims abstract description 25
- 229910052814 silicon oxide Inorganic materials 0.000 claims abstract description 15
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 14
- 238000006884 silylation reaction Methods 0.000 claims abstract description 10
- 239000003795 chemical substances by application Substances 0.000 claims description 5
- 239000007789 gas Substances 0.000 claims description 5
- JOOMLFKONHCLCJ-UHFFFAOYSA-N N-(trimethylsilyl)diethylamine Chemical compound CCN(CC)[Si](C)(C)C JOOMLFKONHCLCJ-UHFFFAOYSA-N 0.000 claims description 4
- GJWAPAVRQYYSTK-UHFFFAOYSA-N [(dimethyl-$l^{3}-silanyl)amino]-dimethylsilicon Chemical compound C[Si](C)N[Si](C)C GJWAPAVRQYYSTK-UHFFFAOYSA-N 0.000 claims description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 4
- 229910052782 aluminium Inorganic materials 0.000 claims description 4
- KAHVZNKZQFSBFW-UHFFFAOYSA-N n-methyl-n-trimethylsilylmethanamine Chemical compound CN(C)[Si](C)(C)C KAHVZNKZQFSBFW-UHFFFAOYSA-N 0.000 claims description 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 4
- 229920005591 polysilicon Polymers 0.000 claims description 4
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 4
- 239000010937 tungsten Substances 0.000 claims description 4
- 229910052721 tungsten Inorganic materials 0.000 claims description 4
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 claims description 3
- 150000004767 nitrides Chemical class 0.000 claims description 3
- 229910052760 oxygen Inorganic materials 0.000 claims description 3
- KTYGFJNCQYGODD-UHFFFAOYSA-N C[SiH](C)CCN Chemical compound C[SiH](C)CCN KTYGFJNCQYGODD-UHFFFAOYSA-N 0.000 claims description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 2
- FFUAGWLWBBFQJT-UHFFFAOYSA-N hexamethyldisilazane Chemical compound C[Si](C)(C)N[Si](C)(C)C FFUAGWLWBBFQJT-UHFFFAOYSA-N 0.000 claims description 2
- 239000001301 oxygen Substances 0.000 claims description 2
- 230000007261 regionalization Effects 0.000 claims description 2
- 150000001412 amines Chemical class 0.000 claims 1
- 239000004065 semiconductor Substances 0.000 description 6
- 239000000460 chlorine Substances 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- XLLXMBCBJGATSP-UHFFFAOYSA-N 2-phenylethenol Chemical compound OC=CC1=CC=CC=C1 XLLXMBCBJGATSP-UHFFFAOYSA-N 0.000 description 2
- 238000001459 lithography Methods 0.000 description 2
- JESXATFQYMPTNL-UHFFFAOYSA-N mono-hydroxyphenyl-ethylene Natural products OC1=CC=CC=C1C=C JESXATFQYMPTNL-UHFFFAOYSA-N 0.000 description 2
- 229910021332 silicide Inorganic materials 0.000 description 2
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 description 1
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 1
- 229910018557 Si O Inorganic materials 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 229910052801 chlorine Inorganic materials 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 229910052731 fluorine Inorganic materials 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 238000006116 polymerization reaction Methods 0.000 description 1
- 125000006239 protecting group Chemical group 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Inorganic materials [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
- H01L21/0274—Photolithographic processes
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/26—Processing photosensitive materials; Apparatus therefor
- G03F7/265—Selective reaction with inorganic or organometallic reagents after image-wise exposure, e.g. silylation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02252—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by plasma treatment, e.g. plasma oxidation of the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31144—Etching the insulating layers by chemical or physical means using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
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- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Organic Chemistry (AREA)
- Inorganic Chemistry (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Chemical & Material Sciences (AREA)
- Plasma & Fusion (AREA)
- Photosensitive Polymer And Photoresist Processing (AREA)
- Drying Of Semiconductors (AREA)
Abstract
Description
본 발명은 하드 마스크용 포토레지스트 패턴 형성 방법에 관한 것으로, 보다 상세하게는 반도체 소자의 피식각층 패턴을 형성하기 위하여 하드 마스크로 사용되는 포토레지스트 막 상부에 실리콘 산화막(silicon oxide film)을 형성시킴으로써, 얇은 포토레지스트 막을 형성하여도 피식각층에 대한 식각 선택비를 향상시킬 수 있는 하드 마스크용 포토레지스트 패턴 형성 방법에 대한 것이다.The present invention relates to a method for forming a photoresist pattern for a hard mask, and more particularly, by forming a silicon oxide film on a photoresist film used as a hard mask to form an etched layer pattern of a semiconductor device. The present invention relates to a method for forming a photoresist pattern for a hard mask that can improve an etching selectivity with respect to an etched layer even when a thin photoresist film is formed.
현재, 반도체 소자가 고집적화 및 고속화가 되어감에 따라, 배선의 선폭 및 간격이 감소될 뿐만 아니라, 리소그래피(lithography) 공정 시에 마스크들 간에 정확하고 엄격한 정렬이 요구되기 때문에, 공정 여유 부분은 점점 감소되었고, 배선을 형성할 때에도 낮은 저항을 가지는 물질을 이용하게 되었다.At present, as semiconductor devices become more integrated and faster, process margins are gradually reduced because not only the line width and spacing of wiring are reduced, but also accurate and tight alignment between masks is required during the lithography process. As a result, a low resistance material was used to form the wiring.
상기 낮은 저항을 가지는 물질로는 다결정실리콘(polysilicon), 텅스텐(tungsten) 및 알루미늄(aluminum) 등을 이용하였는데, 상기 물질들로 형성된 층은 반도체 소자의 제조 공정 중에서 포토 마스킹 공정을 수행하는 경우 하드 마스크로 사용되는 포토레지스트 막에 대해 낮은 식각 선택비(etch selectivity)를 가진다는 단점이 있다.Polysilicon, tungsten, aluminum, and the like were used as materials having low resistance, and the layer formed of the materials may be a hard mask when a photomasking process is performed in a manufacturing process of a semiconductor device. There is a disadvantage in that it has a low etch selectivity for the photoresist film used as.
일반적으로, 반도체 소자는 소정의 피식각층 상부에 그 피식각층의 식각 영역을 정의하는 포토레지스트 패턴을 형성한 다음, 포토레지스트 패턴에 따라 상기 피식각층을 식각하여 제조한다.In general, a semiconductor device is fabricated by forming a photoresist pattern defining an etched region of an etched layer on a predetermined etched layer and then etching the etched layer according to the photoresist pattern.
이때, 상기 하드 마스크인 포토레지스트 막이 피식각층에 대해 식각 선택비가 낮기 때문에, 패턴 형성 시에 포토레지스트 막을 2000∼5000Å정도로 두껍게 형성해야만 식각 마스크로 이용할 수 있다.In this case, since the etching selectivity of the photoresist film, which is the hard mask, is low with respect to the etching target layer, the photoresist film may be used as an etching mask only when the photoresist film is thickly formed at a thickness of about 2000 to 5000 kPa during pattern formation.
그러나, 상기 포토레지스트 막의 두께가 두꺼워지는 경우, 리소그래피 공정 시에 공정 마진(margin)이 감소되어 공정 여유도(process window)가 저하될 뿐만 아니라, 피식각층이 식각되는 도중에 포토레지스트가 변형되어 피식각층의 패턴 구조가 변형된다. 또한, 상기 하부 피식각층 패턴이 임계치수(critical dimension) 이하로 줄어들기 때문에 소자의 특성을 열화시켜 생산성이 저하된다.However, when the thickness of the photoresist film is thick, not only the process margin is reduced during the lithography process, but also the process window is lowered, and the photoresist is deformed while the etching layer is etched. The pattern structure of is deformed. In addition, since the lower etched layer pattern is reduced below a critical dimension, the characteristics of the device are deteriorated, thereby reducing productivity.
본 발명은 포토레지스트 막 상부에 실리콘 산화막을 형성하여 피식각층에 대한 식각 선택비를 향상시킬 수 있는 하드 마스크용 포토레지스트 패턴 형성 방법을 제공하는 것을 목적으로 한다.An object of the present invention is to provide a method for forming a photoresist pattern for a hard mask that can form a silicon oxide film on the photoresist film to improve the etching selectivity with respect to the etched layer.
도 1a 내지 도 1e는 본 발명의 피식각층 패턴 형성 방법을 도시한 단면도.1A to 1E are cross-sectional views illustrating a method for forming an etched layer pattern of the present invention.
< 도면의 주요 부분에 대한 간단한 설명 ><Brief description of the main parts of the drawing>
1 : 기판 3 : 피식각층1 substrate 3 etching target layer
3-1 : 피식각층 패턴 5 : 포토레지스트 패턴3-1: Etched layer pattern 5: Photoresist pattern
7 : 실릴레이션 공정 9 : 실릴레이션 막7: Silylation Process 9: Silylation Film
10 : O2플라즈마 공정 11 : PHOST-실리콘 산화막(SiO2)10: O 2 plasma process 11: PHOST-silicon oxide film (SiO 2 )
상기 목적을 달성하기 위하여 본 발명에서는In the present invention to achieve the above object
(a) 피식각층 상부에 포토레지스트 패턴을 형성하는 단계;(a) forming a photoresist pattern on the etched layer;
(b) 상기 포토레지스트 패턴에 대해 노광 및 베이크 공정을 수행하는 단계;(b) performing an exposure and bake process on the photoresist pattern;
(c) 상기 결과물에 대해 실릴레이션 공정을 수행하는 단계;(c) performing a silylation process on the resultant;
(d) 상기 결과물에 대해 O2플라즈마 공정을 수행하여 포토레지스트 패턴 상부에 실리콘 산화막을 형성하는 단계; 및(d) forming a silicon oxide film on the photoresist pattern by performing an O 2 plasma process on the resultant product; And
(e) 상기 실리콘 산화막이 형성된 포토레지스트 패턴을 하드마스크로 피식각층에 대한 식각 공정을 실시하여 피식각층 패턴을 형성하는 단계를 포함하는 하드마스크용 포토레지스트 패턴 형성 방법을 제공한다.(e) providing a method of forming a photoresist pattern for a hard mask, comprising: forming an etched layer pattern by performing an etching process on an etched layer with a hard mask on the photoresist pattern on which the silicon oxide film is formed.
상기 피식각층은 폴리실리콘층, 알루미늄층, 티타늄나이트라이드층(TiN), 텅스텐층, 산화막 및 질화막 등을 이용하여 형성할 수 있다.The etched layer may be formed using a polysilicon layer, an aluminum layer, a titanium nitride layer (TiN), a tungsten layer, an oxide film, a nitride film, or the like.
상기 포토레지스트 막은 KrF(248nm), ArF(193nm), F2(157nm), EUV(13nm) 및 e-빔(e-beam)용 화학증폭형 포토레지스트 조성물이면 무엇이든 가능하다.The photoresist film may be any chemically amplified photoresist composition for KrF (248 nm), ArF (193 nm), F 2 (157 nm), EUV (13 nm) and e-beam.
상기 (b) 단계의 노광 공정은 10∼100mJ/cm2의 노광에너지를 이용하였으며,이때의 노광원은 KrF(248nm), ArF(193nm), F2(157nm), EUV(13nm) 및 e-빔(e-beam) 등을 이용하는 것이 바람직하다.The exposure process of step (b) used an exposure energy of 10 ~ 100mJ / cm 2 , the exposure source at this time is KrF (248nm), ArF (193nm), F2 (157nm), EUV (13nm) and e-beam (e-beam) or the like is preferably used.
상기 (b) 단계의 베이크 공정은 100∼150℃에서 60∼90 초간 수행되는 것이 바람직하다.The baking process of step (b) is preferably performed at 100 to 150 ° C. for 60 to 90 seconds.
상기 (c) 단계의 실릴레이션 공정은 압력 10∼100Torr의 압력 및 50∼150℃의 온도 조건하에서 수행되는 것이 바람직하며, 상기 공정에 사용되는 실릴화제는 헥사메틸디실라잔(hexa methyl disilazane ; HMDS), 트리메틸실릴디메틸아민(trimethyl silyl dimethyl amine ; TMSDMA), 트리메틸실릴디에틸아민(trimethyl silyl diethyl amine ; TMSDEA) 및 테트라메틸디실라잔(tetramethyl disilazane ; TMDS) 및 디메틸실릴에틸아민(dimethylsilylethylamine ; DMSDMA) 등을 사용할 수 있다.The silylation process of step (c) is preferably carried out under a pressure of 10 to 100 Torr and a temperature of 50 to 150 ℃, the silylating agent used in the process is hexa methyl disilazane (HMDS ), Trimethyl silyl dimethyl amine (TMSDMA), trimethyl silyl diethyl amine (TMSDEA) and tetramethyl disilazane (TMDS) and dimethylsilylethylamine (DMSDMA) Etc. can be used.
또한, 상기 (d) 단계의 O2플라즈마 공정은 압력 10∼30 mTorr 및 전압 500∼800W의 조건하에서 산소 유량(flow rate)을 10∼50sccm로 가하여 수행하는 것이 바람직하다.In addition, the O 2 plasma process of step (d) is preferably performed by adding an oxygen flow rate of 10 to 50 sccm under conditions of a pressure of 10 to 30 mTorr and a voltage of 500 to 800 W.
상기 (e) 단계의 식각 공정은 상기 피식각층이 폴리실리콘층, 알루미늄층 또는 티타늄나이트라이드층인 경우 염소(chlorine)계 플라즈마, 예를 들면 Cl2및 BCl3가스등을 이용하여 수행된다.The etching process of step (e) is performed using a chlorine-based plasma, for example, Cl 2 and BCl 3 gas when the etching layer is a polysilicon layer, an aluminum layer or a titanium nitride layer.
그리고, 상기 피식각층이 텅스텐층, 산화막 및 질화막인 경우 불소(fluorine)계 플라즈마, 예를 들면 CF4, C4F8및 C4F6가스등을 이용하여 수행되는 것이 바람직하다.In addition, when the etched layer is a tungsten layer, an oxide film, and a nitride film, it is preferable to use a fluorine-based plasma such as CF 4 , C 4 F 8, and C 4 F 6 gas.
이와 같은 방법에 의해 상기 포토레지스트 패턴 상부에 형성된 실리콘 산화막에 대한 피식각층의 식각 선택비는 1 : 3∼10, 바람직하게는 1 : 5를 가지므로, 얇은 두께의 포토레지스트 패턴으로도 양호한 피식각층 패턴을 확보할 수 있다.The etching selectivity of the etching target layer with respect to the silicon oxide film formed on the photoresist pattern by the above method is 1: 3 to 10, preferably 1: 5, so that the etching target layer is good even with a thin photoresist pattern. A pattern can be secured.
이하 본 발명을 도면을 들어 상세히 설명한다.Hereinafter, the present invention will be described in detail with reference to the drawings.
첨부 도면 도 1a 내지 도 1f는 본 발명의 하드 마스크용 포토레지스트 패턴을 형성하여 피식각층 패턴을 형성하는 방법을 도시한 것이다.1A to 1F illustrate a method of forming an etched layer pattern by forming a photoresist pattern for a hard mask of the present invention.
우선, 도 1a를 참조하면, 반도체 기판(1) 상부에 피식각층(3) 형성 및 1000∼2000Å 두께의 포토레지스트 막(미도시)을 순차적으로 형성한 다음, 노광 및 베이크 하여 포토레지스트 패턴(5)을 형성한다.First, referring to FIG. 1A, an etched layer 3 is formed on a semiconductor substrate 1, and a photoresist film (not shown) having a thickness of 1000 to 2000 μs is sequentially formed, followed by exposure and baking to form a photoresist pattern 5. ).
이때, 상기 포토레지스트 막은 화학증폭형 수지를 포함하는 것으로, 예를 들면 하기 화학식 1의 중합반복단위를 포함하는 중합체로 이루어진 조성물을 이용하여 형성한다.In this case, the photoresist film includes a chemically amplified resin, and is formed using, for example, a composition made of a polymer including a polymerization repeating unit represented by the following Chemical Formula 1.
[화학식 1][Formula 1]
R은 산에 민감한 보호기이고,R is an acid sensitive protecting group,
n은 10 내지 500 중에서 선택된 정수이다.n is an integer selected from 10 to 500.
도 1 b를 참조하면, 상기 공정으로 형성된 포토레지스트 패턴(5)에 대해 노광 공정 및 현상 공정을 실시하면, 하기 반응식 1과 같이 실릴화제와 반응하기 용이한 폴리(히드록시스티렌) [poly(hydroxystyrene) ; PHOST]이 생성된다.Referring to FIG. 1B, when the exposure process and the development process are performed on the photoresist pattern 5 formed by the above process, the poly (hydroxystyrene) [poly (hydroxystyrene) which is easy to react with the silylating agent as shown in Scheme 1 below ); PHOST] is created.
[반응식 1]Scheme 1
그 후, 포토레지스트 패턴(5)에 대해 상기 실릴화제를 사용하여 상온, 상압 조건하에서 실릴레이션 공정(7)을 수행한다.Thereafter, the silylation process 7 is performed on the photoresist pattern 5 using the silylating agent under normal temperature and atmospheric pressure conditions.
이와 같은 공정으로 실리콘 성분이 포토레지스트 패턴 표면으로 침투하여, 하기 반응식 1에 도시한 바와 같이 포토레지스트 막의 -OH 반응기와 실릴화제의 Si 그룹이 반응하게 되므로 Si-O 결합이 발생하여 포토레지스트 패턴(5) 상부에 실릴레이션 막(9)이 형성된다.In this process, the silicon component penetrates into the surface of the photoresist pattern, and as shown in Scheme 1 below, the -OH reactor of the photoresist film reacts with the Si group of the silylating agent, so that Si-O bonds occur to form a photoresist pattern ( 5) The silylation film 9 is formed on top.
[반응식 2]Scheme 2
도 1c를 참조하면, 상기 실릴레이션 막(9)에 O2플라즈마 공정(10)을 수행하면, 상기 실릴레이션 막(9)의 Si와 O2가 반응하여 실리콘 산화막(11)이 형성된다.Referring to FIG. 1C, when the O 2 plasma process 10 is performed on the silicide film 9, Si and O 2 of the silicide film 9 react to form a silicon oxide film 11.
도 1d를 참조하면, 실리콘 산화막(11) 상부에 형성된 포토레지스트 패턴(5)을 하드마스크로 피식각층(3)을 식각하여, 피식각층 패턴(3-1)을 형성한다.Referring to FIG. 1D, the etched layer 3 is etched using the photoresist pattern 5 formed on the silicon oxide layer 11 with a hard mask to form the etched layer pattern 3-1.
상기 식각 공정은 Cl2, BCl3,CF4, C4F8및 C4F6가스등을 이용하여 수행되는 것이 바람직하다.The etching process is preferably performed using Cl 2 , BCl 3, CF 4 , C 4 F 8 and C 4 F 6 gas.
도 1e를 참조하면, 실리콘 산화막(11)이 상부에 형성된 하드마스크용 포토레지스트 패턴(5)을 제거하여 수직한 모양의 피식각층 패턴(3-1)을 얻을 수 있다.Referring to FIG. 1E, the etching mask layer pattern 3-1 having a vertical shape may be obtained by removing the hard mask photoresist pattern 5 having the silicon oxide layer 11 formed thereon.
이상에서 살펴본 바와 같이, 본 발명에서는 얇은 두께의 포토레지스트 패턴 상부에 실리콘 산화막을 형성하여 하드 마스크로 이용함으로써, 피식각층에 대해 높은 식각 선택비를 가져 리소그래피 공정 진행 시에 노광 여유도(exposure latitude) 및 초점 여유도(depth of focus) 등의 공정 여유도가 향상된 수직한 모양을 가지는 피식각층 패턴 프로파일을 얻을 수 있으므로 반도체 소자의 전기적 특성을 향상시킬 수 있다.As described above, in the present invention, a silicon oxide film is formed on a thin photoresist pattern and used as a hard mask, thereby having a high etching selectivity with respect to the layer to be etched. And an etched layer pattern profile having a vertical shape with improved process margin such as depth of focus, thereby improving electrical characteristics of the semiconductor device.
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